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Searched refs:M_SCD_TIMER_ENABLE (Results 1 – 4 of 4) sorted by relevance

/arch/mips/kernel/
Dcevt-sb1250.c52 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, in sibyte_set_mode()
78 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); in sibyte_next_event()
91 tmode = M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS; in sibyte_counter_handler()
Dcevt-bcm1480.c54 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, in sibyte_set_mode()
80 __raw_writeq(M_SCD_TIMER_ENABLE, cfg); in sibyte_next_event()
93 tmode = M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS; in sibyte_counter_handler()
Dcsrc-sb1250.c64 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS, in sb1250_clocksource_init()
/arch/mips/include/asm/sibyte/
Dsb1250_scd.h376 #define M_SCD_TIMER_ENABLE _SB_MAKEMASK1(0) macro