1 /*
2 * Copyright (C) 2000, 2001 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
17 */
18 #include <linux/clocksource.h>
19
20 #include <asm/addrspace.h>
21 #include <asm/io.h>
22 #include <asm/time.h>
23
24 #include <asm/sibyte/sb1250.h>
25 #include <asm/sibyte/sb1250_regs.h>
26 #include <asm/sibyte/sb1250_int.h>
27 #include <asm/sibyte/sb1250_scd.h>
28
29 #define SB1250_HPT_NUM 3
30 #define SB1250_HPT_VALUE M_SCD_TIMER_CNT /* max value */
31
32 /*
33 * The HPT is free running from SB1250_HPT_VALUE down to 0 then starts over
34 * again.
35 */
sb1250_hpt_read(void)36 static cycle_t sb1250_hpt_read(void)
37 {
38 unsigned int count;
39
40 count = G_SCD_TIMER_CNT(__raw_readq(IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM, R_SCD_TIMER_CNT))));
41
42 return SB1250_HPT_VALUE - count;
43 }
44
45 struct clocksource bcm1250_clocksource = {
46 .name = "bcm1250-counter-3",
47 .rating = 200,
48 .read = sb1250_hpt_read,
49 .mask = CLOCKSOURCE_MASK(23),
50 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
51 };
52
sb1250_clocksource_init(void)53 void __init sb1250_clocksource_init(void)
54 {
55 struct clocksource *cs = &bcm1250_clocksource;
56
57 /* Setup hpt using timer #3 but do not enable irq for it */
58 __raw_writeq(0,
59 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
60 R_SCD_TIMER_CFG)));
61 __raw_writeq(SB1250_HPT_VALUE,
62 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
63 R_SCD_TIMER_INIT)));
64 __raw_writeq(M_SCD_TIMER_ENABLE | M_SCD_TIMER_MODE_CONTINUOUS,
65 IOADDR(A_SCD_TIMER_REGISTER(SB1250_HPT_NUM,
66 R_SCD_TIMER_CFG)));
67
68 clocksource_set_clock(cs, V_SCD_TIMER_FREQ);
69 clocksource_register(cs);
70 }
71