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Searched refs:PLL_CTL (Results 1 – 17 of 17) sorted by relevance

/arch/blackfin/include/asm/
Ddpmc.h39 R0 = [P0 + (x - PLL_CTL)];\
44 [P0 + (x - PLL_CTL)] = R0;\
47 R0 = w[P0 + (x - PLL_CTL)];\
52 w[P0 + (x - PLL_CTL)] = R0;\
/arch/blackfin/mach-common/
Ddpmc_modes.S23 P0.H = hi(PLL_CTL);
24 P0.L = lo(PLL_CTL);
42 P0.H = hi(PLL_CTL);
43 P0.L = lo(PLL_CTL);
107 P0.H = hi(PLL_CTL);
108 P0.L = lo(PLL_CTL);
139 P0.H = hi(PLL_CTL);
140 P0.L = lo(PLL_CTL);
168 P0.H = hi(PLL_CTL);
169 P0.L = lo(PLL_CTL);
[all …]
Dclocks-init.c75 bfin_write16(PLL_CTL, PLL_CTL_VAL); in init_clocks()
/arch/blackfin/mach-bf533/include/mach/
DdefBF532.h58 #define PLL_CTL 0xFFC00000 /* PLL Control register (16-bit) */ macro
DcdefBF532.h43 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
738 bfin_write16(PLL_CTL, val);
/arch/blackfin/mach-bf561/include/mach/
DdefBF561.h48 #define PLL_CTL 0xFFC00000 /* PLL Control register (16-bit) */ macro
DcdefBF561.h47 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
1548 bfin_write16(PLL_CTL, val); in bfin_write_PLL_CTL()
/arch/blackfin/mach-bf518/include/mach/
DdefBF51x_base.h40 #define PLL_CTL 0xFFC00000 /* PLL Control Register */ macro
DcdefBF51x_base.h44 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
1174 bfin_write16(PLL_CTL, val); in bfin_write_PLL_CTL()
/arch/blackfin/mach-bf527/include/mach/
DdefBF52x_base.h42 #define PLL_CTL 0xFFC00000 /* PLL Control Register */ macro
DcdefBF52x_base.h44 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
1174 bfin_write16(PLL_CTL, val); in bfin_write_PLL_CTL()
/arch/blackfin/mach-bf537/include/mach/
DdefBF534.h41 #define PLL_CTL 0xFFC00000 /* PLL Control Register */ macro
DcdefBF534.h44 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
1792 bfin_write16(PLL_CTL, val); in bfin_write_PLL_CTL()
/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h41 #define PLL_CTL 0xffc00000 /* PLL Control Register */ macro
DcdefBF54x_base.h44 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
2715 bfin_write16(PLL_CTL, val); in bfin_write_PLL_CTL()
/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h58 #define PLL_CTL 0xFFC00000 /* PLL Control register (16-bit) */ macro
DcdefBF538.h44 #define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
2074 bfin_write16(PLL_CTL, val); in bfin_write_PLL_CTL()