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Searched refs:REG_OFFSET (Results 1 – 13 of 13) sorted by relevance

/arch/mips/lemote/lm2e/
Ddbg_io.c71 #define REG_OFFSET 1 macro
77 #define OFS_INTR_ENABLE (1*REG_OFFSET)
78 #define OFS_INTR_ID (2*REG_OFFSET)
79 #define OFS_DATA_FORMAT (3*REG_OFFSET)
80 #define OFS_LINE_CONTROL (3*REG_OFFSET)
81 #define OFS_MODEM_CONTROL (4*REG_OFFSET)
82 #define OFS_RS232_OUTPUT (4*REG_OFFSET)
83 #define OFS_LINE_STATUS (5*REG_OFFSET)
84 #define OFS_MODEM_STATUS (6*REG_OFFSET)
85 #define OFS_RS232_INPUT (6*REG_OFFSET)
[all …]
/arch/arm/mach-ixp4xx/
Dgtwx5715-setup.c58 #define REG_OFFSET 3 macro
60 #define REG_OFFSET 0 macro
85 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dcoyote-setup.c56 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
93 (char*)(IXP4XX_UART1_BASE_VIRT + REG_OFFSET); in coyote_init()
Davila-setup.c80 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
89 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Ddsmg600-setup.c111 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
120 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dnslu2-setup.c126 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
135 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dnas100d-setup.c119 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
128 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dfsg-setup.c87 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
96 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dwg302v2-setup.c60 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dgateway7001-setup.c59 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
Dixdp425-setup.c153 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
162 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
/arch/ia64/hp/sim/boot/
Dfw-emu.c105 #define REG_OFFSET(addr) (0x00000000000000FF & (addr)) macro
210 r9 = inb(0xCFC + ((REG_OFFSET(in1) & 3))); in sal_emulator()
212 r9 = inw(0xCFC + ((REG_OFFSET(in1) & 2))); in sal_emulator()
224 outb(in3, 0xCFC + ((REG_OFFSET(in1) & 3))); in sal_emulator()
226 outw(in3, 0xCFC + ((REG_OFFSET(in1) & 2))); in sal_emulator()
/arch/arm/mach-ixp4xx/include/mach/
Dplatform.h19 #define REG_OFFSET 0 macro
21 #define REG_OFFSET 3 macro