1 /*
2 * arch/arm/mach-ixp4xx/fsg-setup.c
3 *
4 * FSG board-setup
5 *
6 * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
7 *
8 * based on ixdp425-setup.c:
9 * Copyright (C) 2003-2004 MontaVista Software, Inc.
10 * based on nslu2-power.c
11 * Copyright (C) 2005 Tower Technologies
12 *
13 * Author: Rod Whitby <rod@whitby.id.au>
14 * Maintainers: http://www.nslu2-linux.org/
15 *
16 */
17
18 #include <linux/if_ether.h>
19 #include <linux/irq.h>
20 #include <linux/serial.h>
21 #include <linux/serial_8250.h>
22 #include <linux/leds.h>
23 #include <linux/reboot.h>
24 #include <linux/i2c.h>
25 #include <linux/i2c-gpio.h>
26 #include <linux/io.h>
27
28 #include <asm/mach-types.h>
29 #include <asm/mach/arch.h>
30 #include <asm/mach/flash.h>
31 #include <asm/gpio.h>
32
33 static struct flash_platform_data fsg_flash_data = {
34 .map_name = "cfi_probe",
35 .width = 2,
36 };
37
38 static struct resource fsg_flash_resource = {
39 .flags = IORESOURCE_MEM,
40 };
41
42 static struct platform_device fsg_flash = {
43 .name = "IXP4XX-Flash",
44 .id = 0,
45 .dev = {
46 .platform_data = &fsg_flash_data,
47 },
48 .num_resources = 1,
49 .resource = &fsg_flash_resource,
50 };
51
52 static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
53 .sda_pin = FSG_SDA_PIN,
54 .scl_pin = FSG_SCL_PIN,
55 };
56
57 static struct platform_device fsg_i2c_gpio = {
58 .name = "i2c-gpio",
59 .id = 0,
60 .dev = {
61 .platform_data = &fsg_i2c_gpio_data,
62 },
63 };
64
65 static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
66 {
67 I2C_BOARD_INFO("isl1208", 0x6f),
68 },
69 };
70
71 static struct resource fsg_uart_resources[] = {
72 {
73 .start = IXP4XX_UART1_BASE_PHYS,
74 .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
75 .flags = IORESOURCE_MEM,
76 },
77 {
78 .start = IXP4XX_UART2_BASE_PHYS,
79 .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
80 .flags = IORESOURCE_MEM,
81 }
82 };
83
84 static struct plat_serial8250_port fsg_uart_data[] = {
85 {
86 .mapbase = IXP4XX_UART1_BASE_PHYS,
87 .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
88 .irq = IRQ_IXP4XX_UART1,
89 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
90 .iotype = UPIO_MEM,
91 .regshift = 2,
92 .uartclk = IXP4XX_UART_XTAL,
93 },
94 {
95 .mapbase = IXP4XX_UART2_BASE_PHYS,
96 .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
97 .irq = IRQ_IXP4XX_UART2,
98 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
99 .iotype = UPIO_MEM,
100 .regshift = 2,
101 .uartclk = IXP4XX_UART_XTAL,
102 },
103 { }
104 };
105
106 static struct platform_device fsg_uart = {
107 .name = "serial8250",
108 .id = PLAT8250_DEV_PLATFORM,
109 .dev = {
110 .platform_data = fsg_uart_data,
111 },
112 .num_resources = ARRAY_SIZE(fsg_uart_resources),
113 .resource = fsg_uart_resources,
114 };
115
116 static struct platform_device fsg_leds = {
117 .name = "fsg-led",
118 .id = -1,
119 };
120
121 /* Built-in 10/100 Ethernet MAC interfaces */
122 static struct eth_plat_info fsg_plat_eth[] = {
123 {
124 .phy = 5,
125 .rxq = 3,
126 .txreadyq = 20,
127 }, {
128 .phy = 4,
129 .rxq = 4,
130 .txreadyq = 21,
131 }
132 };
133
134 static struct platform_device fsg_eth[] = {
135 {
136 .name = "ixp4xx_eth",
137 .id = IXP4XX_ETH_NPEB,
138 .dev = {
139 .platform_data = fsg_plat_eth,
140 },
141 }, {
142 .name = "ixp4xx_eth",
143 .id = IXP4XX_ETH_NPEC,
144 .dev = {
145 .platform_data = fsg_plat_eth + 1,
146 },
147 }
148 };
149
150 static struct platform_device *fsg_devices[] __initdata = {
151 &fsg_i2c_gpio,
152 &fsg_flash,
153 &fsg_leds,
154 &fsg_eth[0],
155 &fsg_eth[1],
156 };
157
fsg_power_handler(int irq,void * dev_id)158 static irqreturn_t fsg_power_handler(int irq, void *dev_id)
159 {
160 /* Signal init to do the ctrlaltdel action, this will bypass init if
161 * it hasn't started and do a kernel_restart.
162 */
163 ctrl_alt_del();
164
165 return IRQ_HANDLED;
166 }
167
fsg_reset_handler(int irq,void * dev_id)168 static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
169 {
170 /* This is the paper-clip reset which does an emergency reboot. */
171 printk(KERN_INFO "Restarting system.\n");
172 machine_restart(NULL);
173
174 /* This should never be reached. */
175 return IRQ_HANDLED;
176 }
177
fsg_init(void)178 static void __init fsg_init(void)
179 {
180 uint8_t __iomem *f;
181
182 ixp4xx_sys_init();
183
184 fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
185 fsg_flash_resource.end =
186 IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
187
188 *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
189 *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
190
191 /* Configure CS2 for operation, 8bit and writable */
192 *IXP4XX_EXP_CS2 = 0xbfff0002;
193
194 i2c_register_board_info(0, fsg_i2c_board_info,
195 ARRAY_SIZE(fsg_i2c_board_info));
196
197 /* This is only useful on a modified machine, but it is valuable
198 * to have it first in order to see debug messages, and so that
199 * it does *not* get removed if platform_add_devices fails!
200 */
201 (void)platform_device_register(&fsg_uart);
202
203 platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
204
205 if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
206 IRQF_DISABLED | IRQF_TRIGGER_LOW,
207 "FSG reset button", NULL) < 0) {
208
209 printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
210 gpio_to_irq(FSG_RB_GPIO));
211 }
212
213 if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
214 IRQF_DISABLED | IRQF_TRIGGER_LOW,
215 "FSG power button", NULL) < 0) {
216
217 printk(KERN_DEBUG "Power Button IRQ %d not available\n",
218 gpio_to_irq(FSG_SB_GPIO));
219 }
220
221 /*
222 * Map in a portion of the flash and read the MAC addresses.
223 * Since it is stored in BE in the flash itself, we need to
224 * byteswap it if we're in LE mode.
225 */
226 f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
227 if (f) {
228 #ifdef __ARMEB__
229 int i;
230 for (i = 0; i < 6; i++) {
231 fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
232 fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
233 }
234 #else
235
236 /*
237 Endian-swapped reads from unaligned addresses are
238 required to extract the two MACs from the big-endian
239 Redboot config area in flash.
240 */
241
242 fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
243 fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
244 fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
245 fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
246 fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
247 fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
248
249 fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
250 fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
251 fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
252 fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
253 fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
254 fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
255 #endif
256 iounmap(f);
257 }
258 printk(KERN_INFO "FSG: Using MAC address %pM for port 0\n",
259 fsg_plat_eth[0].hwaddr);
260 printk(KERN_INFO "FSG: Using MAC address %pM for port 1\n",
261 fsg_plat_eth[1].hwaddr);
262
263 }
264
265 MACHINE_START(FSG, "Freecom FSG-3")
266 /* Maintainer: www.nslu2-linux.org */
267 .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
268 .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
269 .map_io = ixp4xx_map_io,
270 .init_irq = ixp4xx_init_irq,
271 .timer = &ixp4xx_timer,
272 .boot_params = 0x0100,
273 .init_machine = fsg_init,
274 MACHINE_END
275
276