| /arch/sh/kernel/cpu/sh5/ |
| D | entry.S | 256 putcon SP, KCR1
259 movi reg_save_area, SP
260 st.q SP, SAVED_R2, r2
261 st.q SP, SAVED_R3, r3
262 st.q SP, SAVED_R4, r4
263 st.q SP, SAVED_R5, r5
264 st.q SP, SAVED_R6, r6
265 st.q SP, SAVED_R18, r18
267 st.q SP, SAVED_TR0, r3
274 or SP, ZERO, r5
[all …]
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| /arch/blackfin/kernel/ |
| D | entry.S | 47 SP += 4;
49 SP += -12;
51 SP += 12;
84 SP += -12;
86 SP += 12;
95 SP += -12;
97 SP += 12;
106 SP += -12;
108 SP += 12;
|
| /arch/blackfin/lib/ |
| D | modsi3.S | 63 [--SP] = (R7:6); /* Push R7 and R6 */
64 [--SP] = RETS; /* and return address */
67 SP += -12; /* Should always provide this space */
69 SP += 12;
72 RETS = [SP++]; /* Get back return address */
73 (R7:6) = [SP++]; /* Pop registers R7 and R4 */
|
| D | umodsi3.S | 53 [--SP] = (R7:6); /* Push registers and */
54 [--SP] = RETS; /* Return address */
57 SP += -12; /* Should always provide this space */
59 SP += 12;
62 RETS = [SP++]; /* Pop return address */
63 ( R7:6) = [SP++]; /* And registers */
|
| D | muldi3.S | 45 A0 = R2.H * R1.L, A1 = R2.L * R1.H (FU) || R3 = [SP + 12]; /* E1 */
46 A0 += R3.H * R0.L, A1 += R3.L * R0.H (FU) || [SP] = R4; /* E1 */
65 R1.h = R1.h + R4.l (NS) || R4 = [SP];
|
| D | divsi3.S | 131 [--SP] = (R7:5); /* Push registers R5-R7 */
133 [--SP] = R2;
145 R0 = R0 << 1 || R5 = [SP];
163 SP += 4;
164 (R7:5)= [SP++]; /* Pop registers R6-R7 */
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| D | udivsi3.S | 139 [--SP] = (R7:5); /* Push registers R5-R7 */
158 [--SP] = R3;
175 R3 = R3 << 1 || R5 = [SP];
201 SP += 4;
202 (R7:5) = [SP++]; /* Pop registers R5-R7 */
|
| /arch/powerpc/platforms/cell/spufs/ |
| D | spu_save_crt0.S | 77 il $SP, 16368
78 stqd $0, 0($SP)
84 stqd $SP, -160($SP)
85 ai $SP, $SP, -160
|
| D | spu_restore_crt0.S | 43 il $SP, 16368
44 stqd $0, 0($SP)
50 stqd $SP, -160($SP)
51 ai $SP, $SP, -160
|
| /arch/blackfin/include/asm/ |
| D | dpmc.h | 32 [--SP] = R0;\
35 R0 = [SP++];\
40 [--SP] = R0;\
43 R0 = [SP++];\
48 [--SP] = R0;\
51 R0 = [SP++];\
|
| D | context.S | 291 ( R7 : 0, P5 : 0) = [ SP ++ ];
354 ( R7 : 0, P5 : 0) = [ SP ++ ];
397 (R7:0, P5:0) = [SP++];
|
| /arch/blackfin/mach-common/ |
| D | lock.S | 41 [--SP]=( R7:0,P5:0 );
56 SP += -12;
57 [--SP] = RETS;
59 RETS = [SP++];
60 SP += 12;
152 ( R7:0,P5:0 ) = [SP++];
165 [--SP]=( R7:0,P5:0 );
185 ( R7:0,P5:0 ) = [SP++];
193 [--SP] = ( R7:5);
221 ( R7:5) = [SP++];
|
| D | entry.S | 121 R1 = SP;
144 ASTAT = [SP++];
145 SP = EX_SCRATCH_REG; define
393 SP = EX_SCRATCH_REG; define
406 SP += -12;
408 SP += 12;
444 SP += -12;
446 SP += 12;
543 SP += 16;
573 [SP + PT_SYSCFG] = r0;
[all …]
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| D | dpmc_modes.S | 15 [--SP] = ( R7:0, P5:0 );
16 [--SP] = RETS;
51 RETS = [SP++];
52 ( R7:0, P5:0 ) = [SP++];
57 [--SP] = ( R7:0, P5:0 );
58 [--SP] = RETS;
82 [--SP] = ( R7:0, P5:0 );
83 [--SP] = RETS;
178 RETS = [SP++];
179 ( R7:0, P5:0 ) = [SP++];
[all …]
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| D | interrupt.S | 131 SP += -12;
134 SP += 12;
139 SP += 12;
176 SP += -12;
178 SP += 12;
|
| /arch/mn10300/mm/ |
| D | misalignment.c | 122 SP, /* stack pointer */ enumerator
191 { "mov", 0x4200, 0xf300, 0, FMT_S1, 0, {DM1, MEM2(IMM8, SP)}},
192 { "mov", 0x4300, 0xf300, 0, FMT_S1, 0, {AM1, MEM2(IMM8, SP)}},
193 { "mov", 0x5800, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), DN0}},
194 { "mov", 0x5c00, 0xfc00, 0, FMT_S1, 0, {MEM2(IMM8, SP), AN0}},
215 { "mov", 0xfa900000, 0xfff30000, 0, FMT_D2, 0, {AM1, MEM2(IMM16, SP)}},
216 { "mov", 0xfa910000, 0xfff30000, 0, FMT_D2, 0, {DM1, MEM2(IMM16, SP)}},
217 { "mov", 0xfab00000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), AN0}},
218 { "mov", 0xfab40000, 0xfffc0000, 0, FMT_D2, 0, {MEM2(IMM16, SP), DN0}},
223 { "mov", 0xfb8a0000, 0xffff0f00, 0, FMT_D7, AM33, {MEM2(IMM8, SP), RN2}},
[all …]
|
| /arch/mn10300/lib/ |
| D | __ucmpdi2.S | 19 # unsigned long long b [(SP,12),(SP,16)])
|
| D | __ashldi3.S | 19 # unsigned by [(12,SP)])
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| D | __lshrdi3.S | 20 # unsigned by [(12,SP)])
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| D | __ashrdi3.S | 19 # unsigned by [(12,SP)])
|
| /arch/x86/kernel/ |
| D | vm86_32.c | 77 #define SP(regs) (*(unsigned short *)&((regs)->pt.sp)) macro
540 SP(regs) -= 6; in do_int()
556 do_int(regs, trapno, (unsigned char __user *) (regs->pt.ss << 4), SP(regs)); in handle_vm86_trap()
589 sp = SP(regs); in handle_vm86_fault()
616 SP(regs) -= 4; in handle_vm86_fault()
619 SP(regs) -= 2; in handle_vm86_fault()
630 SP(regs) += 4; in handle_vm86_fault()
633 SP(regs) += 2; in handle_vm86_fault()
667 SP(regs) += 12; in handle_vm86_fault()
672 SP(regs) += 6; in handle_vm86_fault()
|
| /arch/sh/kernel/ |
| D | head_64.S | 286 movi init_thread_union, SP
287 putcon SP, KCR0 /* Set current to init_task */
289 add SP, r22, SP
|
| /arch/m68k/ifpsp060/ |
| D | fpsp.doc | 169 - documented in 3.5 of 060SP spec.
177 - documented in 3.5 of 060SP spec.
185 - documented in 3.7 of 060SP spec.
193 - documented in 3.6 of 060SP spec.
202 - documented in 3.4 of 060SP spec.
214 - documented in 3.4 of 060SP spec.
227 - not fully documented in 060SP spec.
264 - documented in 3.1 of 060SP spec.
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| /arch/mn10300/kernel/ |
| D | kernel_execve.S | 22 # On entry: D0/D1/8(SP): arguments to function
|
| /arch/cris/arch-v32/boot/compressed/ |
| D | head.S | 44 ;; the SP at the top for now.
|