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Searched refs:TYPE (Results 1 – 13 of 13) sorted by relevance

/arch/powerpc/lib/
Dfeature-fixups-test.S175 #define MAKE_MACRO_TEST(TYPE) \ argument
176 globl(ftr_fixup_test_ ##TYPE##_macros) \
179 BEGIN_##TYPE##_SECTION \
183 END_##TYPE##_SECTION(0, 1) \
187 BEGIN_##TYPE##_SECTION \
191 END_##TYPE##_SECTION(0, 0) \
195 BEGIN_##TYPE##_SECTION \
198 BEGIN_##TYPE##_SECTION_NESTED(80) \
201 END_##TYPE##_SECTION_NESTED(0, 1, 80) \
204 END_##TYPE##_SECTION(0, 0) \
[all …]
/arch/sparc/math-emu/
Dmath_32.c278 #define TYPE(dummy, r, ru, b, bu, a, au) type = (au << 2) | (a << 0) | (bu << 5) | (b << 3) | (ru <… in do_one_mathemu() macro
294 case FSQRTQ: TYPE(3,3,1,3,1,0,0); break; in do_one_mathemu()
298 case FDIVQ: TYPE(3,3,1,3,1,3,1); break; in do_one_mathemu()
299 case FDMULQ: TYPE(3,3,1,2,1,2,1); break; in do_one_mathemu()
300 case FQTOS: TYPE(3,1,1,3,1,0,0); break; in do_one_mathemu()
301 case FQTOD: TYPE(3,2,1,3,1,0,0); break; in do_one_mathemu()
302 case FITOQ: TYPE(3,3,1,1,0,0,0); break; in do_one_mathemu()
303 case FSTOQ: TYPE(3,3,1,1,1,0,0); break; in do_one_mathemu()
304 case FDTOQ: TYPE(3,3,1,2,1,0,0); break; in do_one_mathemu()
305 case FQTOI: TYPE(3,1,0,3,1,0,0); break; in do_one_mathemu()
[all …]
Dmath_64.c173 #define TYPE(ftt, r, ru, b, bu, a, au) type = (au << 2) | (a << 0) | (bu << 5) | (b << 3) | (ru << … in do_mathemu() macro
194 case FABSQ: TYPE(3,3,0,3,0,0,0); break; in do_mathemu()
195 case FSQRTQ: TYPE(3,3,1,3,1,0,0); break; in do_mathemu()
199 case FDIVQ: TYPE(3,3,1,3,1,3,1); break; in do_mathemu()
200 case FDMULQ: TYPE(3,3,1,2,1,2,1); break; in do_mathemu()
201 case FQTOX: TYPE(3,2,0,3,1,0,0); break; in do_mathemu()
202 case FXTOQ: TYPE(3,3,1,2,0,0,0); break; in do_mathemu()
203 case FQTOS: TYPE(3,1,1,3,1,0,0); break; in do_mathemu()
204 case FQTOD: TYPE(3,2,1,3,1,0,0); break; in do_mathemu()
205 case FITOQ: TYPE(3,3,1,1,0,0,0); break; in do_mathemu()
[all …]
/arch/sparc/include/asm/
Dasm.h9 #define BRANCH32(TYPE, PREDICT, DEST) \ argument
10 TYPE,PREDICT %icc, DEST
11 #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \ argument
12 TYPE,a,PREDICT %icc, DEST
22 #define BRANCH32(TYPE, PREDICT, DEST) \ argument
23 TYPE DEST
24 #define BRANCH32_ANNUL(TYPE, PREDICT, DEST) \ argument
25 TYPE,a DEST
Dvio.h370 #define viodbg(TYPE, f, a...) \ argument
371 do { if (vio->debug & VIO_DEBUG_##TYPE) \
/arch/mips/include/asm/octeon/
Dcvmx.h210 #define CVMX_BUILD_WRITE64(TYPE, ST) \ argument
211 static inline void cvmx_write64_##TYPE(uint64_t addr, TYPE##_t val) \
213 *CASTPTR(volatile TYPE##_t, addr) = val; \
224 #define CVMX_BUILD_READ64(TYPE, LT) \ argument
225 static inline TYPE##_t cvmx_read64_##TYPE(uint64_t addr) \
227 return *CASTPTR(volatile TYPE##_t, addr); \
/arch/powerpc/mm/
Dinit_32.c225 #define FREESEC(TYPE) \ in free_initmem() argument
226 free_sec((unsigned long)(&__ ## TYPE ## _begin), \ in free_initmem()
227 (unsigned long)(&__ ## TYPE ## _end), \ in free_initmem()
228 #TYPE); in free_initmem()
/arch/alpha/include/asm/
Dio.h145 #define REMAP1(TYPE, NAME, QUAL) \ argument
146 static inline TYPE generic_##NAME(QUAL void __iomem *addr) \
151 #define REMAP2(TYPE, NAME, QUAL) \ argument
152 static inline void generic_##NAME(TYPE b, QUAL void __iomem *addr) \
Dsystem.h186 #define __CALL_PAL_R0(NAME, TYPE) \ argument
187 extern inline TYPE NAME(void) \
189 register TYPE __r0 __asm__("$0"); \
/arch/mips/pci/
Dpci-vr41xx.h106 #define TYPE 0x6U macro
/arch/h8300/include/asm/
Dio.h13 #error UNKNOWN CPU TYPE
/arch/sparc/kernel/
Dldc.c170 #define ldcdbg(TYPE, f, a...) \ argument
171 do { if (lp->cfg.debug & LDC_DEBUG_##TYPE) \
/arch/m68k/ifpsp060/src/
Dfpsp.S4061 # bftst %d0{&7:&3} # test TYPE
4066 # TYPE == 0: General instructions #
4254 # TYPE == 1: FDB<cc>, FS<cc>, FTRAP<cc>