/arch/sh/kernel/cpu/sh3/ |
D | probe.c | 53 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() 54 boot_cpu_data.dcache.entry_shift = 4; in detect_cpu_and_cache_system() 55 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in detect_cpu_and_cache_system() 56 boot_cpu_data.dcache.flags = 0; in detect_cpu_and_cache_system() 63 boot_cpu_data.dcache.way_incr = (1 << 11); in detect_cpu_and_cache_system() 64 boot_cpu_data.dcache.entry_mask = 0x7f0; in detect_cpu_and_cache_system() 65 boot_cpu_data.dcache.sets = 128; in detect_cpu_and_cache_system() 70 boot_cpu_data.dcache.way_incr = (1 << 12); in detect_cpu_and_cache_system() 71 boot_cpu_data.dcache.entry_mask = 0xff0; in detect_cpu_and_cache_system() 72 boot_cpu_data.dcache.sets = 256; in detect_cpu_and_cache_system() [all …]
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/arch/sh/kernel/cpu/sh2/ |
D | probe.c | 20 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() 21 boot_cpu_data.dcache.way_incr = (1<<12); in detect_cpu_and_cache_system() 22 boot_cpu_data.dcache.sets = 256; in detect_cpu_and_cache_system() 23 boot_cpu_data.dcache.entry_shift = 4; in detect_cpu_and_cache_system() 24 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in detect_cpu_and_cache_system() 25 boot_cpu_data.dcache.flags = 0; in detect_cpu_and_cache_system() 30 boot_cpu_data.dcache.flags |= SH_CACHE_COMBINED; in detect_cpu_and_cache_system() 31 boot_cpu_data.icache = boot_cpu_data.dcache; in detect_cpu_and_cache_system()
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/arch/mips/mm/ |
D | c-octeon.c | 193 c->dcache.linesz = 128; in probe_octeon() 195 c->dcache.sets = 1; /* CN3XXX has one Dcache set */ in probe_octeon() 197 c->dcache.sets = 2; /* CN5XXX has two Dcache sets */ in probe_octeon() 198 c->dcache.ways = 64; in probe_octeon() 200 c->dcache.sets * c->dcache.ways * c->dcache.linesz; in probe_octeon() 201 c->dcache.waybit = ffs(dcache_size / c->dcache.ways) - 1; in probe_octeon() 212 c->dcache.waysize = dcache_size / c->dcache.ways; in probe_octeon() 215 c->dcache.sets = dcache_size / (c->dcache.linesz * c->dcache.ways); in probe_octeon() 227 dcache_size >> 10, c->dcache.ways, in probe_octeon() 228 c->dcache.sets, c->dcache.linesz); in probe_octeon()
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D | c-r4k.c | 764 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 765 c->dcache.ways = 2; in probe_pcache() 766 c->dcache.waybit= __ffs(dcache_size/2); in probe_pcache() 779 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 780 c->dcache.ways = 2; in probe_pcache() 781 c->dcache.waybit = 0; in probe_pcache() 793 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() 794 c->dcache.ways = 4; in probe_pcache() 795 c->dcache.waybit = 0; in probe_pcache() 814 c->dcache.linesz = 16 << ((config & CONF_DB) >> 4); in probe_pcache() [all …]
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D | c-tx39.c | 292 unsigned long dc_lsize = current_cpu_data.dcache.linesz; in tx39_flush_cache_sigtramp() 323 current_cpu_data.dcache.ways = 1; in tx39_probe_cache() 324 current_cpu_data.dcache.linesz = 4; in tx39_probe_cache() 329 current_cpu_data.dcache.ways = 2; in tx39_probe_cache() 330 current_cpu_data.dcache.linesz = 16; in tx39_probe_cache() 336 current_cpu_data.dcache.ways = 1; in tx39_probe_cache() 337 current_cpu_data.dcache.linesz = 16; in tx39_probe_cache() 405 (dcache_size / current_cpu_data.dcache.ways) - 1, in tx39_cache_init() 412 current_cpu_data.dcache.waysize = dcache_size / current_cpu_data.dcache.ways; in tx39_cache_init() 416 current_cpu_data.dcache.sets = in tx39_cache_init() [all …]
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/arch/sh/mm/ |
D | cache-sh4.c | 67 boot_cpu_data.dcache.ways, in emit_cache_params() 68 boot_cpu_data.dcache.sets, in emit_cache_params() 69 boot_cpu_data.dcache.way_incr); in emit_cache_params() 71 boot_cpu_data.dcache.entry_mask, in emit_cache_params() 72 boot_cpu_data.dcache.alias_mask, in emit_cache_params() 73 boot_cpu_data.dcache.n_aliases); in emit_cache_params() 99 compute_alias(&boot_cpu_data.dcache); in p3_cache_init() 102 switch (boot_cpu_data.dcache.ways) { in p3_cache_init() 255 n = boot_cpu_data.dcache.n_aliases; in flush_dcache_page() 287 (*__flush_dcache_segment_fn)(0UL, boot_cpu_data.dcache.way_size); in flush_dcache_all() [all …]
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D | cache-sh7705.c | 35 ways = current_cpu_data.dcache.ways; in cache_wback_all() 36 waysize = current_cpu_data.dcache.sets; in cache_wback_all() 37 waysize <<= current_cpu_data.dcache.entry_shift; in cache_wback_all() 46 addr += current_cpu_data.dcache.linesz) { in cache_wback_all() 57 addrstart += current_cpu_data.dcache.way_incr; in cache_wback_all() 97 ways = current_cpu_data.dcache.ways; in __flush_dcache_page() 98 waysize = current_cpu_data.dcache.sets; in __flush_dcache_page() 99 waysize <<= current_cpu_data.dcache.entry_shift; in __flush_dcache_page() 108 addr += current_cpu_data.dcache.linesz) { in __flush_dcache_page() 118 addrstart += current_cpu_data.dcache.way_incr; in __flush_dcache_page()
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D | cache-sh3.c | 47 for (j = 0; j < current_cpu_data.dcache.ways; j++) { in __flush_wback_region() 51 addr = addrstart | (v & current_cpu_data.dcache.entry_mask); in __flush_wback_region() 63 addrstart += current_cpu_data.dcache.way_incr; in __flush_wback_region() 88 (v & current_cpu_data.dcache.entry_mask) | SH_CACHE_ASSOC; in __flush_purge_region()
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D | cache-sh5.c | 310 cpu_data->dcache.entry_mask) >> in sh64_dcache_purge_sets() 311 cpu_data->dcache.entry_shift; in sh64_dcache_purge_sets() 315 set_offset &= (cpu_data->dcache.sets - 1); in sh64_dcache_purge_sets() 317 (set_offset << cpu_data->dcache.entry_shift); in sh64_dcache_purge_sets() 326 eaddr1 = eaddr0 + cpu_data->dcache.way_size * in sh64_dcache_purge_sets() 327 cpu_data->dcache.ways; in sh64_dcache_purge_sets() 330 eaddr += cpu_data->dcache.way_size) { in sh64_dcache_purge_sets() 335 eaddr1 = eaddr0 + cpu_data->dcache.way_size * in sh64_dcache_purge_sets() 336 cpu_data->dcache.ways; in sh64_dcache_purge_sets() 339 eaddr += cpu_data->dcache.way_size) { in sh64_dcache_purge_sets() [all …]
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D | pg-sh7705.c | 49 ways = current_cpu_data.dcache.ways; in __flush_purge_virtual_region() 55 addr |= (v & current_cpu_data.dcache.entry_mask); in __flush_purge_virtual_region() 64 addr += current_cpu_data.dcache.way_incr; in __flush_purge_virtual_region()
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D | pg-sh4.c | 18 #define CACHE_ALIAS (current_cpu_data.dcache.alias_mask) 42 idx = (addr & current_cpu_data.dcache.alias_mask) >> PAGE_SHIFT; in kmap_coherent()
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D | cache-debugfs.c | 50 cache = ¤t_cpu_data.dcache; in cache_seq_show()
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/arch/sh/kernel/cpu/sh4/ |
D | probe.c | 47 boot_cpu_data.dcache.way_incr = (1 << 14); in detect_cpu_and_cache_system() 48 boot_cpu_data.dcache.entry_shift = 5; in detect_cpu_and_cache_system() 49 boot_cpu_data.dcache.sets = 512; in detect_cpu_and_cache_system() 50 boot_cpu_data.dcache.ways = 1; in detect_cpu_and_cache_system() 51 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in detect_cpu_and_cache_system() 97 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() 111 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() 121 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() 128 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() 134 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() [all …]
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/arch/sh/kernel/cpu/ |
D | init.c | 90 waysize = current_cpu_data.dcache.sets; in cache_init() 101 waysize <<= current_cpu_data.dcache.entry_shift; in cache_init() 109 ways = current_cpu_data.dcache.ways; in cache_init() 117 addr += current_cpu_data.dcache.linesz) in cache_init() 120 addrstart += current_cpu_data.dcache.way_incr; in cache_init() 132 if (current_cpu_data.dcache.ways > 1) in cache_init() 164 l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache); in detect_cache_shape() 166 if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED) in detect_cache_shape() 254 current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr - in sh_cpu_init() 255 current_cpu_data.dcache.linesz; in sh_cpu_init() [all …]
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/arch/sh/kernel/cpu/sh2a/ |
D | probe.c | 38 boot_cpu_data.dcache.ways = 4; in detect_cpu_and_cache_system() 39 boot_cpu_data.dcache.way_incr = (1 << 11); in detect_cpu_and_cache_system() 40 boot_cpu_data.dcache.sets = 128; in detect_cpu_and_cache_system() 41 boot_cpu_data.dcache.entry_shift = 4; in detect_cpu_and_cache_system() 42 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; in detect_cpu_and_cache_system() 43 boot_cpu_data.dcache.flags = 0; in detect_cpu_and_cache_system() 51 boot_cpu_data.icache = boot_cpu_data.dcache; in detect_cpu_and_cache_system()
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/arch/sh/kernel/cpu/sh5/ |
D | probe.c | 60 boot_cpu_data.dcache = boot_cpu_data.icache; in detect_cpu_and_cache_system() 66 set_bit(SH_CACHE_MODE_WT, &(boot_cpu_data.dcache.flags)); in detect_cpu_and_cache_system() 68 set_bit(SH_CACHE_MODE_WB, &(boot_cpu_data.dcache.flags)); in detect_cpu_and_cache_system()
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/arch/avr32/mm/ |
D | cache.c | 28 linesz = boot_cpu_data.dcache.linesz; in invalidate_dcache_region() 56 linesz = boot_cpu_data.dcache.linesz; in clean_dcache_region() 69 linesz = boot_cpu_data.dcache.linesz; in flush_dcache_region() 94 linesz = boot_cpu_data.dcache.linesz; in __flush_icache_range() 110 linesz = boot_cpu_data.dcache.linesz; in flush_icache_range()
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/arch/mips/include/asm/ |
D | r4kcache.h | 396 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) 399 __BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) 406 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) 407 __BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32) 434 __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_) 437 __BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, ) 440 __BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
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D | cpu-features.h | 99 #define cpu_has_dc_aliases (cpu_data[0].dcache.flags & MIPS_CACHE_ALIASES) 105 #define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX) 215 #define cpu_dcache_line_size() cpu_data[0].dcache.linesz
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D | cpu-info.h | 56 struct cache_desc dcache; /* Primary D or combined I/D cache */ member
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/arch/avr32/kernel/ |
D | cpu.c | 285 boot_cpu_data.dcache.ways = 1 << SYSREG_BFEXT(DASS, config1); in setup_processor() 286 boot_cpu_data.dcache.sets = 1 << SYSREG_BFEXT(DSET, config1); in setup_processor() 287 boot_cpu_data.dcache.linesz = 1 << (tmp + 1); in setup_processor() 340 dcache_size = boot_cpu_data.dcache.ways * in c_show() 341 boot_cpu_data.dcache.sets * in c_show() 342 boot_cpu_data.dcache.linesz; in c_show() 368 boot_cpu_data.dcache.ways, in c_show() 369 boot_cpu_data.dcache.sets, in c_show() 370 boot_cpu_data.dcache.linesz); in c_show()
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/arch/frv/lib/ |
D | cache.S | 20 # Write back a range of dcache 40 # Invalidate a range of dcache and icache 81 # Write back and invalidate a range of dcache and icache
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/arch/mn10300/mm/ |
D | cache-mn10300.S | 86 # Invalidate the entire dcache 102 # disable the dcache 139 # Invalidate a range of addresses on a page in the dcache 188 # disable the dcache
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/arch/powerpc/kernel/ |
D | cacheinfo.c | 339 struct cache *dcache, *icache; in cache_do_one_devnode_split() local 344 dcache = new_cache(CACHE_TYPE_DATA, level, node); in cache_do_one_devnode_split() 347 if (!dcache || !icache) in cache_do_one_devnode_split() 350 dcache->next_local = icache; in cache_do_one_devnode_split() 352 return dcache; in cache_do_one_devnode_split() 354 release_cache(dcache); in cache_do_one_devnode_split()
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/arch/sh/include/asm/ |
D | processor.h | 70 struct cache_info dcache; /* Primary D-cache */ member
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