| /arch/avr32/mach-at32ap/ |
| D | pdc.c | 16 struct clk *pclk, *hclk; in pdc_probe() local
23 hclk = clk_get(&pdev->dev, "hclk"); in pdc_probe()
24 if (IS_ERR(hclk)) { in pdc_probe()
27 return PTR_ERR(hclk); in pdc_probe()
31 clk_enable(hclk); in pdc_probe()
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| D | at32ap700x.c | 609 DEV_CLK(hclk, dw_dmac0, hsb, 10);
714 DEV_CLK(hclk, pdc, hsb, 4);
1055 DEV_CLK(hclk, macb0, hsb, 8);
1064 DEV_CLK(hclk, macb1, hsb, 9);
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| /arch/arm/mach-s3c2410/ |
| D | s3c2410.c | 77 unsigned long hclk; in s3c2410_setup_clocks() local
93 hclk = fclk / ((tmp & S3C2410_CLKDIVN_HDIVN) ? 2 : 1); in s3c2410_setup_clocks()
94 pclk = hclk / ((tmp & S3C2410_CLKDIVN_PDIVN) ? 2 : 1); in s3c2410_setup_clocks()
99 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); in s3c2410_setup_clocks()
105 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c2410_setup_clocks()
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| /arch/arm/mach-s3c2412/ |
| D | s3c2412.c | 168 unsigned long hclk; in s3c2412_setup_clocks() local
186 hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1); in s3c2412_setup_clocks()
187 hclk /= ((tmp & S3C2412_CLKDIVN_ARMDIVN) ? 2 : 1); in s3c2412_setup_clocks()
188 pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1); in s3c2412_setup_clocks()
193 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); in s3c2412_setup_clocks()
195 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c2412_setup_clocks()
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| /arch/arm/plat-s3c24xx/ |
| D | s3c244x.c | 82 unsigned long hclk, fclk, pclk; in s3c244x_setup_clocks() local
114 hclk = fclk / hdiv; in s3c244x_setup_clocks()
115 pclk = hclk / ((clkdiv & S3C2440_CLKDIVN_PDIVN) ? 2 : 1); in s3c244x_setup_clocks()
120 print_mhz(fclk), print_mhz(hclk), print_mhz(pclk)); in s3c244x_setup_clocks()
122 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c244x_setup_clocks()
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| D | clock.c | 49 unsigned long hclk, in s3c24xx_setup_clocks() argument
56 clk_h.rate = hclk; in s3c24xx_setup_clocks()
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| /arch/arm/mach-mv78xx0/ |
| D | common.c | 45 int hclk; in get_hclk() local
52 hclk = 166666667; in get_hclk()
55 hclk = 200000000; in get_hclk()
58 hclk = 266666667; in get_hclk()
61 hclk = 333333333; in get_hclk()
64 hclk = 400000000; in get_hclk()
71 return hclk; in get_hclk()
74 static void get_pclk_l2clk(int hclk, int core_index, int *pclk, int *l2clk) in get_pclk_l2clk() argument
92 *pclk = ((u64)hclk * (2 + (cfg & 0xf))) >> 1; in get_pclk_l2clk()
730 int hclk; in mv78xx0_init() local
[all …]
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| /arch/arm/mach-mx1/ |
| D | clock.c | 266 static struct clk hclk = { variable
454 &hclk,
492 .parent = &hclk,
503 .parent = &hclk,
514 .parent = &hclk,
550 .parent = &hclk,
578 .parent = &hclk,
603 &hclk,
652 clk_enable(&hclk); in mxc_clocks_init()
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| /arch/arm/mach-lh7a40x/ |
| D | clocks.c | 56 unsigned int hclk = fclkfreq_get () / (HCLKDIV(clkset) + 1); in hclkfreq_get() local
58 return hclk; in hclkfreq_get()
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| /arch/arm/mach-s3c2443/ |
| D | clock.c | 1009 unsigned long hclk; in s3c2443_setup_clocks() local
1020 hclk = s3c2443_prediv_getrate(&clk_prediv); in s3c2443_setup_clocks()
1021 hclk /= s3c2443_get_hdiv(clkdiv0); in s3c2443_setup_clocks()
1022 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); in s3c2443_setup_clocks()
1024 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c2443_setup_clocks()
1029 print_mhz(hclk), print_mhz(pclk)); in s3c2443_setup_clocks()
1031 s3c24xx_setup_clocks(fclk, hclk, pclk); in s3c2443_setup_clocks()
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| /arch/arm/plat-s3c/include/plat/ |
| D | cpu-freq.h | 24 unsigned long hclk; member
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| D | clock.h | 73 unsigned long hclk,
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| /arch/arm/plat-s3c64xx/ |
| D | s3c6400-clock.c | 569 unsigned long hclk; in s3c6400_setup_clocks() local
601 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); in s3c6400_setup_clocks()
605 hclk2, hclk, pclk); in s3c6400_setup_clocks()
611 clk_h.rate = hclk; in s3c6400_setup_clocks()
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