/arch/mips/kernel/ |
D | cpu-bugs64.c | 48 int m1, m2; in mult_sh_align_mod() local 72 : "=r" (m1), "=r" (m2), "=r" (s) in mult_sh_align_mod() 93 : "r" (m1), "r" (m2), "r" (s), "I" (0) in mult_sh_align_mod() 103 : "=r" (m1), "=r" (m2), "=r" (s) in mult_sh_align_mod() 104 : "0" (m1), "1" (m2), "2" (s)); in mult_sh_align_mod() 106 p = m1 * m2; in mult_sh_align_mod()
|
/arch/blackfin/kernel/ |
D | mcount.S | 27 [--sp] = m2; 58 m2 = [sp++]; define
|
D | signal.c | 92 RESTORE(m0); RESTORE(m1); RESTORE(m2); RESTORE(m3); in rt_restore_sigcontext() 157 SETUP(m0); SETUP(m1); SETUP(m2); SETUP(m3); in rt_setup_sigcontext()
|
D | asm-offsets.c | 93 DEFINE(PT_M2, offsetof(struct pt_regs, m2)); in main()
|
D | kgdb.c | 70 gdb_regs[BFIN_M2] = regs->m2; in pt_regs_to_gdb_regs() 146 regs->m2 = gdb_regs[BFIN_M2]; in gdb_regs_to_pt_regs()
|
D | traps.c | 1157 fp->b2, fp->l2, fp->m2, fp->i2); in show_regs()
|
/arch/arm/plat-omap/include/mach/ |
D | sram.h | 26 u32 sdrc_actim_ctrlb, u32 m2); 63 u32 sdrc_actim_ctrlb, u32 m2);
|
/arch/blackfin/include/asm/ |
D | context.S | 57 [--sp] = m2; 124 [--sp] = m2; 183 [--sp] = m2; 279 m2 = [sp++]; define 342 m2 = [sp++]; define
|
D | user.h | 48 long m0, m1, m2, m3; member
|
D | ptrace.h | 54 long m2; member
|
/arch/sh/kernel/cpu/sh4a/ |
D | clock-sh7722.c | 45 int m1, int m2, int round_flag) in adjust_pair_of_clocks() argument 53 if (m1 == m2) { in adjust_pair_of_clocks() 56 } else if ((m2 == N && m1 == 1) || in adjust_pair_of_clocks() 57 (m2 == NM && m1 == N)) { /* N:1 or NM:N */ in adjust_pair_of_clocks() 76 } else if ((m2 == 1 && m1 == N) || in adjust_pair_of_clocks() 77 (m2 == N && m1 == NM)) { /* 1:N or N:NM */ in adjust_pair_of_clocks() 97 pr_debug( "Setting rates as %d:%d\n", m1, m2); in adjust_pair_of_clocks() 99 r2 = div * m2; in adjust_pair_of_clocks()
|
/arch/powerpc/boot/dtc-src/ |
D | data.c | 234 struct marker *m2 = d2.markers; in data_merge() local 236 d = data_append_markers(data_append_data(d1, d2.val, d2.len), m2); in data_merge() 239 for_each_marker(m2) in data_merge() 240 m2->offset += d1.len; in data_merge()
|
/arch/arm/plat-omap/ |
D | sram.c | 359 u32 m2); 361 u32 sdrc_actim_ctrlb, u32 m2) in omap3_configure_core_dpll() argument 368 sdrc_actim_ctrlb, m2); in omap3_configure_core_dpll()
|
/arch/xtensa/variants/dc232b/include/variant/ |
D | tie.h | 98 XCHAL_SA_REG(s,0,0,0,1, m2, 4, 4, 4,0x0222, sr,34 , 32,0,0,0) \
|
/arch/blackfin/mach-common/ |
D | interrupt.S | 68 [--sp] = m2;
|
D | dpmc_modes.S | 517 [--sp] = m2; 605 m2 = [sp++]; define
|
/arch/arm/mach-omap2/ |
D | sram34xx.S | 96 ldr r6, core_m2_mask_val @ modify m2 for core dpll
|
/arch/sh/ |
D | Makefile | 27 cflags-$(CONFIG_CPU_SH2) := $(call cc-option,-m2,)
|