1 /*
2 * linux/arch/arm/plat-omap/sram.c
3 *
4 * OMAP SRAM detection and management
5 *
6 * Copyright (C) 2005 Nokia Corporation
7 * Written by Tony Lindgren <tony@atomide.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13 #undef DEBUG
14
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/io.h>
19
20 #include <asm/tlb.h>
21 #include <asm/cacheflush.h>
22
23 #include <asm/mach/map.h>
24
25 #include <mach/sram.h>
26 #include <mach/board.h>
27 #include <mach/cpu.h>
28
29 #include <mach/control.h>
30
31 #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
32 # include "../mach-omap2/prm.h"
33 # include "../mach-omap2/cm.h"
34 # include "../mach-omap2/sdrc.h"
35 #endif
36
37 #define OMAP1_SRAM_PA 0x20000000
38 #define OMAP1_SRAM_VA VMALLOC_END
39 #define OMAP2_SRAM_PA 0x40200000
40 #define OMAP2_SRAM_PUB_PA 0x4020f800
41 #define OMAP2_SRAM_VA VMALLOC_END
42 #define OMAP2_SRAM_PUB_VA (VMALLOC_END + 0x800)
43 #define OMAP3_SRAM_PA 0x40200000
44 #define OMAP3_SRAM_VA 0xd7000000
45 #define OMAP3_SRAM_PUB_PA 0x40208000
46 #define OMAP3_SRAM_PUB_VA 0xd7008000
47
48 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
49 #define SRAM_BOOTLOADER_SZ 0x00
50 #else
51 #define SRAM_BOOTLOADER_SZ 0x80
52 #endif
53
54 #define OMAP24XX_VA_REQINFOPERM0 IO_ADDRESS(0x68005048)
55 #define OMAP24XX_VA_READPERM0 IO_ADDRESS(0x68005050)
56 #define OMAP24XX_VA_WRITEPERM0 IO_ADDRESS(0x68005058)
57
58 #define OMAP34XX_VA_REQINFOPERM0 IO_ADDRESS(0x68012848)
59 #define OMAP34XX_VA_READPERM0 IO_ADDRESS(0x68012850)
60 #define OMAP34XX_VA_WRITEPERM0 IO_ADDRESS(0x68012858)
61 #define OMAP34XX_VA_ADDR_MATCH2 IO_ADDRESS(0x68012880)
62 #define OMAP34XX_VA_SMS_RG_ATT0 IO_ADDRESS(0x6C000048)
63 #define OMAP34XX_VA_CONTROL_STAT IO_ADDRESS(0x480022F0)
64
65 #define GP_DEVICE 0x300
66
67 #define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
68
69 static unsigned long omap_sram_start;
70 static unsigned long omap_sram_base;
71 static unsigned long omap_sram_size;
72 static unsigned long omap_sram_ceil;
73
74 extern unsigned long omapfb_reserve_sram(unsigned long sram_pstart,
75 unsigned long sram_vstart,
76 unsigned long sram_size,
77 unsigned long pstart_avail,
78 unsigned long size_avail);
79
80 /*
81 * Depending on the target RAMFS firewall setup, the public usable amount of
82 * SRAM varies. The default accessible size for all device types is 2k. A GP
83 * device allows ARM11 but not other initiators for full size. This
84 * functionality seems ok until some nice security API happens.
85 */
is_sram_locked(void)86 static int is_sram_locked(void)
87 {
88 int type = 0;
89
90 if (cpu_is_omap242x())
91 type = omap_rev() & OMAP2_DEVICETYPE_MASK;
92
93 if (type == GP_DEVICE) {
94 /* RAMFW: R/W access to all initiators for all qualifier sets */
95 if (cpu_is_omap242x()) {
96 __raw_writel(0xFF, OMAP24XX_VA_REQINFOPERM0); /* all q-vects */
97 __raw_writel(0xCFDE, OMAP24XX_VA_READPERM0); /* all i-read */
98 __raw_writel(0xCFDE, OMAP24XX_VA_WRITEPERM0); /* all i-write */
99 }
100 if (cpu_is_omap34xx()) {
101 __raw_writel(0xFFFF, OMAP34XX_VA_REQINFOPERM0); /* all q-vects */
102 __raw_writel(0xFFFF, OMAP34XX_VA_READPERM0); /* all i-read */
103 __raw_writel(0xFFFF, OMAP34XX_VA_WRITEPERM0); /* all i-write */
104 __raw_writel(0x0, OMAP34XX_VA_ADDR_MATCH2);
105 __raw_writel(0xFFFFFFFF, OMAP34XX_VA_SMS_RG_ATT0);
106 }
107 return 0;
108 } else
109 return 1; /* assume locked with no PPA or security driver */
110 }
111
112 /*
113 * The amount of SRAM depends on the core type.
114 * Note that we cannot try to test for SRAM here because writes
115 * to secure SRAM will hang the system. Also the SRAM is not
116 * yet mapped at this point.
117 */
omap_detect_sram(void)118 void __init omap_detect_sram(void)
119 {
120 unsigned long reserved;
121
122 if (cpu_class_is_omap2()) {
123 if (is_sram_locked()) {
124 if (cpu_is_omap34xx()) {
125 omap_sram_base = OMAP3_SRAM_PUB_VA;
126 omap_sram_start = OMAP3_SRAM_PUB_PA;
127 omap_sram_size = 0x8000; /* 32K */
128 } else {
129 omap_sram_base = OMAP2_SRAM_PUB_VA;
130 omap_sram_start = OMAP2_SRAM_PUB_PA;
131 omap_sram_size = 0x800; /* 2K */
132 }
133 } else {
134 if (cpu_is_omap34xx()) {
135 omap_sram_base = OMAP3_SRAM_VA;
136 omap_sram_start = OMAP3_SRAM_PA;
137 omap_sram_size = 0x10000; /* 64K */
138 } else {
139 omap_sram_base = OMAP2_SRAM_VA;
140 omap_sram_start = OMAP2_SRAM_PA;
141 if (cpu_is_omap242x())
142 omap_sram_size = 0xa0000; /* 640K */
143 else if (cpu_is_omap243x())
144 omap_sram_size = 0x10000; /* 64K */
145 }
146 }
147 } else {
148 omap_sram_base = OMAP1_SRAM_VA;
149 omap_sram_start = OMAP1_SRAM_PA;
150
151 if (cpu_is_omap730())
152 omap_sram_size = 0x32000; /* 200K */
153 else if (cpu_is_omap15xx())
154 omap_sram_size = 0x30000; /* 192K */
155 else if (cpu_is_omap1610() || cpu_is_omap1621() ||
156 cpu_is_omap1710())
157 omap_sram_size = 0x4000; /* 16K */
158 else if (cpu_is_omap1611())
159 omap_sram_size = 0x3e800; /* 250K */
160 else {
161 printk(KERN_ERR "Could not detect SRAM size\n");
162 omap_sram_size = 0x4000;
163 }
164 }
165 reserved = omapfb_reserve_sram(omap_sram_start, omap_sram_base,
166 omap_sram_size,
167 omap_sram_start + SRAM_BOOTLOADER_SZ,
168 omap_sram_size - SRAM_BOOTLOADER_SZ);
169 omap_sram_size -= reserved;
170 omap_sram_ceil = omap_sram_base + omap_sram_size;
171 }
172
173 static struct map_desc omap_sram_io_desc[] __initdata = {
174 { /* .length gets filled in at runtime */
175 .virtual = OMAP1_SRAM_VA,
176 .pfn = __phys_to_pfn(OMAP1_SRAM_PA),
177 .type = MT_MEMORY
178 }
179 };
180
181 /*
182 * Note that we cannot use ioremap for SRAM, as clock init needs SRAM early.
183 */
omap_map_sram(void)184 void __init omap_map_sram(void)
185 {
186 unsigned long base;
187
188 if (omap_sram_size == 0)
189 return;
190
191 if (cpu_is_omap24xx()) {
192 omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
193
194 base = OMAP2_SRAM_PA;
195 base = ROUND_DOWN(base, PAGE_SIZE);
196 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
197 }
198
199 if (cpu_is_omap34xx()) {
200 omap_sram_io_desc[0].virtual = OMAP3_SRAM_VA;
201 base = OMAP3_SRAM_PA;
202 base = ROUND_DOWN(base, PAGE_SIZE);
203 omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
204 }
205
206 omap_sram_io_desc[0].length = 1024 * 1024; /* Use section desc */
207 iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
208
209 printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
210 __pfn_to_phys(omap_sram_io_desc[0].pfn),
211 omap_sram_io_desc[0].virtual,
212 omap_sram_io_desc[0].length);
213
214 /*
215 * Normally devicemaps_init() would flush caches and tlb after
216 * mdesc->map_io(), but since we're called from map_io(), we
217 * must do it here.
218 */
219 local_flush_tlb_all();
220 flush_cache_all();
221
222 /*
223 * Looks like we need to preserve some bootloader code at the
224 * beginning of SRAM for jumping to flash for reboot to work...
225 */
226 memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
227 omap_sram_size - SRAM_BOOTLOADER_SZ);
228 }
229
omap_sram_push(void * start,unsigned long size)230 void * omap_sram_push(void * start, unsigned long size)
231 {
232 if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
233 printk(KERN_ERR "Not enough space in SRAM\n");
234 return NULL;
235 }
236
237 omap_sram_ceil -= size;
238 omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
239 memcpy((void *)omap_sram_ceil, start, size);
240 flush_icache_range((unsigned long)start, (unsigned long)(start + size));
241
242 return (void *)omap_sram_ceil;
243 }
244
omap_sram_error(void)245 static void omap_sram_error(void)
246 {
247 panic("Uninitialized SRAM function\n");
248 }
249
250 #ifdef CONFIG_ARCH_OMAP1
251
252 static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
253
omap_sram_reprogram_clock(u32 dpllctl,u32 ckctl)254 void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
255 {
256 if (!_omap_sram_reprogram_clock)
257 omap_sram_error();
258
259 _omap_sram_reprogram_clock(dpllctl, ckctl);
260 }
261
omap1_sram_init(void)262 int __init omap1_sram_init(void)
263 {
264 _omap_sram_reprogram_clock =
265 omap_sram_push(omap1_sram_reprogram_clock,
266 omap1_sram_reprogram_clock_sz);
267
268 return 0;
269 }
270
271 #else
272 #define omap1_sram_init() do {} while (0)
273 #endif
274
275 #if defined(CONFIG_ARCH_OMAP2)
276
277 static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
278 u32 base_cs, u32 force_unlock);
279
omap2_sram_ddr_init(u32 * slow_dll_ctrl,u32 fast_dll_ctrl,u32 base_cs,u32 force_unlock)280 void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
281 u32 base_cs, u32 force_unlock)
282 {
283 if (!_omap2_sram_ddr_init)
284 omap_sram_error();
285
286 _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
287 base_cs, force_unlock);
288 }
289
290 static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
291 u32 mem_type);
292
omap2_sram_reprogram_sdrc(u32 perf_level,u32 dll_val,u32 mem_type)293 void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
294 {
295 if (!_omap2_sram_reprogram_sdrc)
296 omap_sram_error();
297
298 _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
299 }
300
301 static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
302
omap2_set_prcm(u32 dpll_ctrl_val,u32 sdrc_rfr_val,int bypass)303 u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
304 {
305 if (!_omap2_set_prcm)
306 omap_sram_error();
307
308 return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
309 }
310 #endif
311
312 #ifdef CONFIG_ARCH_OMAP2420
omap242x_sram_init(void)313 int __init omap242x_sram_init(void)
314 {
315 _omap2_sram_ddr_init = omap_sram_push(omap242x_sram_ddr_init,
316 omap242x_sram_ddr_init_sz);
317
318 _omap2_sram_reprogram_sdrc = omap_sram_push(omap242x_sram_reprogram_sdrc,
319 omap242x_sram_reprogram_sdrc_sz);
320
321 _omap2_set_prcm = omap_sram_push(omap242x_sram_set_prcm,
322 omap242x_sram_set_prcm_sz);
323
324 return 0;
325 }
326 #else
omap242x_sram_init(void)327 static inline int omap242x_sram_init(void)
328 {
329 return 0;
330 }
331 #endif
332
333 #ifdef CONFIG_ARCH_OMAP2430
omap243x_sram_init(void)334 int __init omap243x_sram_init(void)
335 {
336 _omap2_sram_ddr_init = omap_sram_push(omap243x_sram_ddr_init,
337 omap243x_sram_ddr_init_sz);
338
339 _omap2_sram_reprogram_sdrc = omap_sram_push(omap243x_sram_reprogram_sdrc,
340 omap243x_sram_reprogram_sdrc_sz);
341
342 _omap2_set_prcm = omap_sram_push(omap243x_sram_set_prcm,
343 omap243x_sram_set_prcm_sz);
344
345 return 0;
346 }
347 #else
omap243x_sram_init(void)348 static inline int omap243x_sram_init(void)
349 {
350 return 0;
351 }
352 #endif
353
354 #ifdef CONFIG_ARCH_OMAP3
355
356 static u32 (*_omap3_sram_configure_core_dpll)(u32 sdrc_rfr_ctrl,
357 u32 sdrc_actim_ctrla,
358 u32 sdrc_actim_ctrlb,
359 u32 m2);
omap3_configure_core_dpll(u32 sdrc_rfr_ctrl,u32 sdrc_actim_ctrla,u32 sdrc_actim_ctrlb,u32 m2)360 u32 omap3_configure_core_dpll(u32 sdrc_rfr_ctrl, u32 sdrc_actim_ctrla,
361 u32 sdrc_actim_ctrlb, u32 m2)
362 {
363 if (!_omap3_sram_configure_core_dpll)
364 omap_sram_error();
365
366 return _omap3_sram_configure_core_dpll(sdrc_rfr_ctrl,
367 sdrc_actim_ctrla,
368 sdrc_actim_ctrlb, m2);
369 }
370
371 /* REVISIT: Should this be same as omap34xx_sram_init() after off-idle? */
restore_sram_functions(void)372 void restore_sram_functions(void)
373 {
374 omap_sram_ceil = omap_sram_base + omap_sram_size;
375
376 _omap3_sram_configure_core_dpll =
377 omap_sram_push(omap3_sram_configure_core_dpll,
378 omap3_sram_configure_core_dpll_sz);
379 }
380
omap34xx_sram_init(void)381 int __init omap34xx_sram_init(void)
382 {
383 _omap3_sram_configure_core_dpll =
384 omap_sram_push(omap3_sram_configure_core_dpll,
385 omap3_sram_configure_core_dpll_sz);
386
387 return 0;
388 }
389 #else
omap34xx_sram_init(void)390 static inline int omap34xx_sram_init(void)
391 {
392 return 0;
393 }
394 #endif
395
omap_sram_init(void)396 int __init omap_sram_init(void)
397 {
398 omap_detect_sram();
399 omap_map_sram();
400
401 if (!(cpu_class_is_omap2()))
402 omap1_sram_init();
403 else if (cpu_is_omap242x())
404 omap242x_sram_init();
405 else if (cpu_is_omap2430())
406 omap243x_sram_init();
407 else if (cpu_is_omap34xx())
408 omap34xx_sram_init();
409
410 return 0;
411 }
412