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Searched refs:read_c0_ebase (Results 1 – 5 of 5) sorted by relevance

/arch/mips/kernel/
Dsmp-cmp.c156 c->core = (read_c0_ebase() >> 1) & 0xff; in cmp_init_secondary()
Dtraps.c1606 uncached_ebase += (read_c0_ebase() & 0x3ffff000); in set_uncached_handler()
1643 ebase += (read_c0_ebase() & 0x3ffff000); in trap_init()
Dsmtc.c396 cpu_data[cpu].core = (read_c0_ebase() >> 1) & 0xff; in smtc_prepare_cpus()
/arch/mips/cavium-octeon/
Dsetup.c534 uint32_t ebase = read_c0_ebase() & 0x3ffff000; in prom_init()
/arch/mips/include/asm/
Dmipsregs.h1000 #define read_c0_ebase() __read_32bit_c0_register($15, 1) macro