| /arch/alpha/lib/ |
| D | ev67-strrchr.S | 41 sll t5, 8, t3 # U : 00000000ch000000
45 or t5, t3, t3 # E : 00000000chch0000
50 or t2, t3, t2 # E : 0000chchchch0000
59 cmpbge zero, t2, t3 # E : bits set iff byte == c
61 andnot t3, t4, t3 # E : clear garbage from char test
67 cmovne t3, v0, t6 # E : save previous comparisons match
71 cmovne t3, t3, t8 # E : Latency=2, extra map slot
77 cmpbge zero, t2, t3 # E : bits set iff byte == c
88 and t3, t4, t3 # E : mask out char matches after null
89 cmovne t3, t3, t8 # E : save it, if match found Latency=2, extra map slot
[all …]
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| D | strrchr.S | 37 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
39 andnot t3, t4, t3 # e0 : clear garbage from char test
45 cmovne t3, v0, t6 # .. e1 : save previous comparisons match
46 cmovne t3, t3, t8 # e0 :
50 cmpbge zero, t2, t3 # e0 : bits set iff byte == c
60 and t3, t4, t3 # e0 : mask out char matches after null
61 cmovne t3, t3, t8 # .. e1 : save it, if match found
62 cmovne t3, v0, t6 # e0 :
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| D | ev67-strchr.S | 32 and a1, 0xff, t3 # E : 00000000000000ch
36 insbl t3, 6, a3 # U : 00ch000000000000
37 or t5, t3, a1 # E : 000000000000chch
54 cmpbge zero, t1, t3 # E : bits set iff byte == c
55 or t2, t3, t0 # E : bits set iff char match or zero match
73 cmpbge zero, t1, t3 # E : bits set iff byte == c
74 or t2, t3, t0 # E :
75 cttz t3, a2 # U0 : speculative (in case we get a match)
80 and t0, t3, t1 # E : bit set iff byte was the char
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| D | strchr.S | 35 cmpbge zero, t1, t3 # e0 : bits set iff byte == c
36 or t2, t3, t0 # e1 : bits set iff char match or zero match
45 cmpbge zero, t1, t3 # .. e1 : bits set iff byte == c
46 or t2, t3, t0 # e0 :
52 and t0, t3, t1 # e0 : bit set iff byte was the char
56 and t0, 0xcc, t3 # .. e1 :
59 cmovne t3, 2, t3 # e0 :
61 addq t2, t3, t2 # e0 :
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| D | strlen_user.S | 73 and t1, 0xcc, t3
76 cmovne t3, 2, t3
78 addq t2, t3, t2
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| D | ev6-strncpy_from_user.S | 53 and a0, 7, t3 # E : find dest misalignment
62 addq a2, t3, a2 # E : bias count by dest misalignment
85 mskqh t1, a1, t3 # U :
91 or t0, t3, t0 # E :
238 extql t2, a1, t3 # U : extract low bits for next time
247 mov t3, t1 # E :
356 cmpbge zero, t2, t3 # E :
360 andnot t8, t3, t8 # E :
387 and t12, 0xf0, t3 # E : binary search for the address of the
393 cmovne t3, 4, t3 # E : Latency=2, extra map slot
[all …]
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| D | strncpy_from_user.S | 45 mskqh t1, a1, t3 # e0 :
49 or t0, t3, t0 # e0 :
191 extql t2, a1, t3 # e0 : extract low bits for next time
196 mov t3, t1 # .. e1 :
291 cmpbge zero, t2, t3 # e0 :
293 andnot t8, t3, t8 # e0 :
319 and t12, 0xf0, t3 # binary search for the address of the
323 cmovne t3, 4, t3
326 addq t0, t3, t0
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| D | stxcpy.S | 48 mskqh t1, a1, t3 # e0 :
52 or t0, t3, t1 # e0 :
180 extql t2, a1, t3 # e0 : extract low bits for next time
185 mov t3, t0 # .. e1 :
261 ornot t1, t2, t3 # .. e1 :
262 cmpbge zero, t3, t8 # e0 : is there a zero?
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| D | ev6-stxcpy.S | 59 mskqh t1, a1, t3 # U :
64 or t0, t3, t1 # E : (stall)
204 extql t2, a1, t3 # U : extract low bits for next time (stall)
210 mov t3, t0 # E :
291 ornot t1, t2, t3 # E : (stall)
292 cmpbge zero, t3, t8 # E : is there a zero? (stall)
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| /arch/mips/kernel/ |
| D | octeon_switch.S | 163 dmfc2 t3, 0x0082
170 sd t3, OCTEON_CP2_3DES_KEY+16(a0)
171 dmfc2 t3, 0x0103
178 sd t3, OCTEON_CP2_AES_IV+8(a0)
179 dmfc2 t3, 0x0107
186 sd t3, OCTEON_CP2_AES_KEY+24(a0)
187 mfc0 t3, $15,0 /* Get the processor ID register */
193 beq t3, t0, 2f
198 dmfc2 t3, 0x0242
204 sd t3, OCTEON_CP2_HSH_DATW+16(a0)
[all …]
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| D | r2300_switch.S | 60 lw t3, TASK_THREAD_INFO(a0)
61 lw t0, TI_FLAGS(t3)
68 sw t0, TI_FLAGS(t3)
73 lw t0, ST_OFF(t3)
76 sw t0, ST_OFF(t3)
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| D | r4k_switch.S | 59 PTR_L t3, TASK_THREAD_INFO(a0)
60 LONG_L t0, TI_FLAGS(t3)
67 LONG_S t0, TI_FLAGS(t3)
72 LONG_L t0, ST_OFF(t3)
75 LONG_S t0, ST_OFF(t3)
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| /arch/mips/include/asm/mach-pnx8550/ |
| D | kernel-entry-init.h | 123 mfc0 t3, CP0_CONFIG, 1
128 srl t1, t3, 19 /* C0_CONFIGPR_IL_SHIFT */
137 srl t2, t3, 22 /* C0_CONFIGPR_IS_SHIFT */
144 srl t3, t3, 16 /* C0_CONFIGPR_IA_SHIFT */
145 andi t3, t3, 0x7 /* C0_CONFIGPR_IA_MASK */
146 addiu t3, t3, 1
149 multu t2, t3 /* max index * max way */
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| /arch/alpha/include/asm/ |
| D | swab.h | 26 __u64 t0, t1, t2, t3; in __arch_swab32() local
33 t3 = t2 & 0x00FF00FF; /* t3 : 0000000000CC00AA */ in __arch_swab32()
34 t1 = t0 + t3; /* t1 : ssssssssDDCCBBAA */ in __arch_swab32()
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| /arch/mips/lib/ |
| D | csum_partial.S | 26 #undef t3
30 #define t3 $11 macro
173 CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4)
184 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
185 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
186 CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
187 CSUM_BIGCHUNK(src, 0x60, sum, t0, t1, t3, t4)
199 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
200 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
208 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
[all …]
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| D | memcpy-inatomic.S | 127 #undef t3
131 #define t3 $11 macro
234 EXC( LOAD t3, UNIT(3)(src), .Ll_exc_copy)
245 STORE t3, UNIT(-5)(dst)
269 EXC( LOAD t3, UNIT(3)(src), .Ll_exc_copy)
275 STORE t3, UNIT(3)(dst)
329 EXC( LDFIRST t3, FIRST(0)(src), .Ll_exc)
331 EXC( LDREST t3, REST(0)(src), .Ll_exc_copy)
334 STFIRST t3, FIRST(0)(dst)
360 EXC( LDFIRST t3, FIRST(3)(src), .Ll_exc_copy)
[all …]
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| D | memcpy.S | 127 #undef t3
131 #define t3 $11 macro
239 EXC( LOAD t3, UNIT(3)(src), .Ll_exc_copy)
250 EXC( STORE t3, UNIT(-5)(dst), .Ls_exc_p5u)
274 EXC( LOAD t3, UNIT(3)(src), .Ll_exc_copy)
281 EXC( STORE t3, UNIT(3)(dst), .Ls_exc_p1u)
336 EXC( LDFIRST t3, FIRST(0)(src), .Ll_exc)
338 EXC( LDREST t3, REST(0)(src), .Ll_exc_copy)
342 EXC( STFIRST t3, FIRST(0)(dst), .Ls_exc)
369 EXC( LDFIRST t3, FIRST(3)(src), .Ll_exc_copy)
[all …]
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| /arch/mips/cavium-octeon/ |
| D | octeon-memcpy.S | 112 #undef t3
116 #define t3 $11 macro
210 EXC( LOAD t3, UNIT(3)(src), l_exc_copy)
215 EXC( STORE t3, UNIT(3)(dst), s_exc_p13u)
219 EXC( LOAD t3, UNIT(7)(src), l_exc_copy)
224 EXC( STORE t3, UNIT(7)(dst), s_exc_p9u)
229 EXC( LOAD t3, UNIT(-5)(src), l_exc_copy)
233 EXC( STORE t3, UNIT(-5)(dst), s_exc_p5u)
237 EXC( LOAD t3, UNIT(-1)(src), l_exc_copy)
241 EXC( STORE t3, UNIT(-1)(dst), s_exc_p1u)
[all …]
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| /arch/mips/alchemy/common/ |
| D | sleeper.S | 70 lui t3, 0xb190 /* sys_xxx */
71 sw sp, 0x0018(t3)
73 sw k0, 0x001c(t3)
120 sw zero, 0x0078(t3) /* sys_slppwr */
122 sw zero, 0x007c(t3) /* sys_sleep */
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| /arch/mips/dec/ |
| D | int-handler.S | 255 1: srlv t3,t1,t2
256 2: xor t1,t3
257 and t3,t0,t1
258 beqz t3,3f
260 move t0,t3
264 srlv t3,t1,t2
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| /arch/mips/include/asm/ |
| D | regdef.h | 31 #define t3 $11 macro
78 #define t3 $15 macro
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| /arch/ia64/lib/ |
| D | copy_page.S | 42 .rotr t1[PIPE_DEPTH], t2[PIPE_DEPTH], t3[PIPE_DEPTH], t4[PIPE_DEPTH], \
75 (p[0]) ld8 t3[0]=[src1],16
76 (EPI) st8 [tgt1]=t3[PIPE_DEPTH-1],16
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| D | copy_page_mck.S | 77 #define t3 r19 macro
81 #define t7 t3 // alias!
149 (p[D]) st8 [dst1] = t3, 8 // M3
177 (p[D-1])ld8 t3 = [src1], 8
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| /arch/parisc/lib/ |
| D | memcpy.c | 280 register unsigned long src, dst, t1, t2, t3; in pa_memcpy() local
313 ldbma(s_space, pcs, t3, pmc_load_exc); in pa_memcpy()
315 stbma(d_space, t3, pcd, pmc_store_exc); in pa_memcpy()
399 ldbma(s_space, pcs, t3, pmc_load_exc); in pa_memcpy()
400 stbma(d_space, t3, pcd, pmc_store_exc); in pa_memcpy()
415 ldbma(s_space, pcs, t3, pmc_load_exc); in pa_memcpy()
416 stbma(d_space, t3, pcd, pmc_store_exc); in pa_memcpy()
432 ldbma(s_space, pcs, t3, pmc_load_exc); in pa_memcpy()
433 stbma(d_space, t3, pcd, pmc_store_exc); in pa_memcpy()
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| /arch/mips/dec/prom/ |
| D | call_o32.S | 68 lw t3,(t0)
70 sw t3,(t1)
|