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/arch/mips/include/asm/
Dstackframe.h46 mflhxu v1
47 LONG_S v1, PT_LO(sp)
48 mflhxu v1
49 LONG_S v1, PT_HI(sp)
50 mflhxu v1
51 LONG_S v1, PT_ACX(sp)
53 mfhi v1
54 LONG_S v1, PT_HI(sp)
55 mflo v1
56 LONG_S v1, PT_LO(sp)
[all …]
Dregdef.h23 #define v1 $3 macro
62 #define v1 $3 macro
/arch/mips/kernel/
Dcpu-bugs64.c44 static inline void mult_sh_align_mod(long *v1, long *v2, long *w, in mult_sh_align_mod() argument
114 *v1 = lv1; in mult_sh_align_mod()
121 long v1[8], v2[8], w[8]; in check_mult_sh() local
135 mult_sh_align_mod(&v1[0], &v2[0], &w[0], 32, 0); in check_mult_sh()
136 mult_sh_align_mod(&v1[1], &v2[1], &w[1], 32, 1); in check_mult_sh()
137 mult_sh_align_mod(&v1[2], &v2[2], &w[2], 32, 2); in check_mult_sh()
138 mult_sh_align_mod(&v1[3], &v2[3], &w[3], 32, 3); in check_mult_sh()
139 mult_sh_align_mod(&v1[4], &v2[4], &w[4], 32, 4); in check_mult_sh()
140 mult_sh_align_mod(&v1[5], &v2[5], &w[5], 32, 5); in check_mult_sh()
141 mult_sh_align_mod(&v1[6], &v2[6], &w[6], 32, 6); in check_mult_sh()
[all …]
Dentry.S85 ori v1, v0, TCSTATUS_IXMT
86 mtc0 v1, CP0_TCSTATUS
101 mfc0 v1, CP0_TCSTATUS
103 xori v1, v1, TCSTATUS_IXMT
104 or v1, v0, v1
105 mtc0 v1, CP0_TCSTATUS
Docteon_switch.S483 ld v1, PT_MPL+8(sp) /* MPL1 */
493 MTM1 v1 /* MPL1 */
494 ld v1, PT_MTP(sp) /* P0 */
499 MTP0 v1 /* P0 */
Dgenex.S518 LONG_L v1, TI_TP_VALUE(k1)
526 .set at=v1
534 LONG_L v1, TI_TP_VALUE(k1)
/arch/powerpc/platforms/ps3/
Drepository.c66 u64 v1, u64 v2, const char *func, int line) in _dump_node() argument
73 pr_debug("%s:%d: v1: %016llx\n", func, line, v1); in _dump_node()
125 u64 v1; in read_node() local
134 result = lv1_get_repository_node_value(lpar_id, n1, n2, n3, n4, &v1, in read_node()
144 dump_node(lpar_id, n1, n2, n3, n4, v1, v2); in read_node()
147 *_v1 = v1; in read_node()
151 if (v1 && !_v1) in read_node()
153 __func__, __LINE__, v1); in read_node()
187 u64 v1; in ps3_repository_read_bus_type() local
193 &v1, NULL); in ps3_repository_read_bus_type()
[all …]
/arch/mips/lib/
Dcsum_partial.S59 sltu v1, sum, reg; \
60 ADD sum, v1; \
64 sltu v1, sum, reg; \
65 addu sum, v1; \
265 dsll32 v1, sum, 0
266 daddu sum, v1
267 sltu v1, sum, v1
269 addu sum, v1
274 wsbh v1, sum
275 movn sum, v1, t7
[all …]
Dstrncpy_user.S37 move v1, a1
39 1: EX(lbu, t0, (v1), .Lfault)
40 PTR_ADDIU v1, 1
Dmemcpy.S182 .set at=v1
484 li v1, 1
486 SUB src, src, v1
/arch/ia64/include/asm/sn/
Dsn_sal.h186 ret_stuff.v1 = 0; in ia64_sn_get_console_nasid()
208 ret_stuff.v1 = 0; in ia64_sn_get_master_baseio_nasid()
226 ret_stuff.v1 = 0; in ia64_sn_get_klconfig_addr()
242 ret_stuff.v1 = 0; in ia64_sn_console_getc()
264 ret_stuff.v1 = 0; in ia64_sn_console_readc()
282 ret_stuff.v1 = 0; in ia64_sn_console_putc()
299 ret_stuff.v1 = 0; in ia64_sn_console_putb()
319 ret_stuff.v1 = 0; in ia64_sn_plat_specific_err_print()
336 ret_stuff.v1 = 0; in ia64_sn_plat_cpei_handler()
353 ret_stuff.v1 = 0; in ia64_sn_plat_set_error_handling_features()
[all …]
/arch/um/drivers/
Dcow_user.c113 struct cow_header_v1 v1; member
292 if (n < offsetof(typeof(header->v1), backing_file)) { in read_cow_header()
297 magic = header->v1.magic; in read_cow_header()
299 version = header->v1.version; in read_cow_header()
301 version = ntohl(header->v1.version); in read_cow_header()
308 if (n < sizeof(header->v1)) { in read_cow_header()
313 *mtime_out = header->v1.mtime; in read_cow_header()
314 *size_out = header->v1.size; in read_cow_header()
315 *sectorsize_out = header->v1.sectorsize; in read_cow_header()
316 *bitmap_offset_out = sizeof(header->v1); in read_cow_header()
[all …]
/arch/ia64/kvm/
Dkvm_fw.c40 x.v1 = 0; \
48 x.v1 = 0; \
142 result.status = ia64_pal_cache_flush(gr29, gr30, &result.v1, in pal_cache_flush()
184 &result.v1); in pal_freq_base()
224 result.status = ia64_pal_proc_get_features(&result.v0, &result.v1, in pal_proc_get_features()
262 result.v1 = vminfo2.pvi2_val; in pal_vm_summary()
347 result.v1 = (1L << 32) | 1L; in kvm_pal_emul()
351 &result.v1); in kvm_pal_emul()
355 (pal_hints_u_t *)&result.v1); in kvm_pal_emul()
362 &result.v1); in kvm_pal_emul()
[all …]
Dvti.h175 *vp_env_info = iprv.v1; in ia64_pal_vp_env_info()
/arch/ia64/include/asm/
Dpal.h781 u64 v1; member
890 features_status->pal_bus_features_val = iprv.v1; in ia64_pal_bus_get_features()
916 conf->pcci_info_2.pcci2_data = iprv.v1; in ia64_pal_cache_config_info()
935 prot->pcp_info[2].pcpi_data = iprv.v1 & 0xffffffff; in ia64_pal_cache_prot_info()
936 prot->pcp_info[3].pcpi_data = iprv.v1 >> 32; in ia64_pal_cache_prot_info()
954 *progress = iprv.v1; in ia64_pal_cache_flush()
1000 *unique_caches = iprv.v1; in ia64_pal_cache_summary()
1025 *buffer_align = iprv.v1; in ia64_pal_copy_info()
1049 *data_regs = iprv.v1; in ia64_pal_debug_info()
1100 *(u64 *)bus_ratio = iprv.v1; in ia64_pal_freq_ratios()
[all …]
/arch/mips/include/asm/mach-cavium-octeon/
Dkernel-entry-init.h47 mfc0 v1, CP0_PRID_REG
51 beq v1, CP0_PRID_OCTEON_PASS1, skip
56 srl v1, 8
57 sll v1, 8
59 bne v1, CP0_PRID_OCTEON_CN30XX, skip
/arch/ia64/kernel/
Dpatch.c47 u64 m0, m1, v0, v1, b0, b1, *b = (u64 *) (insn_addr & -16); in ia64_patch() local
55 v1 = val << (shift - 64); in ia64_patch()
58 v0 = val << shift; v1 = val >> (64 - shift); in ia64_patch()
61 b[1] = (b1 & ~m1) | (v1 & m1); in ia64_patch()
/arch/arm/mach-pxa/
Dviper.c102 u8 v1, v2; in viper_hw_version() local
108 v1 = VIPER_VERSION; in viper_hw_version()
112 v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1; in viper_hw_version()
115 return v1; in viper_hw_version()
/arch/x86/kernel/
Dbios_uv.c83 u64 v0, v1; in uv_bios_get_sn_info() local
87 (u64)(&v0), (u64)(&v1), 0, 0); in uv_bios_get_sn_info()
/arch/x86/include/asm/
Datomic_64.h435 static inline void atomic_or_long(unsigned long *v1, unsigned long v2) in atomic_or_long() argument
437 asm(LOCK_PREFIX "orq %1, %0" : "+m" (*v1) : "r" (v2)); in atomic_or_long()
/arch/s390/include/asm/
Detr.h64 unsigned int v1 : 1; /* validity bit ETR data frame 1 */ member
/arch/arm/mach-at91/
DMakefile42 obj-$(CONFIG_MACH_AFEB9260) += board-afeb-9260v1.o
/arch/powerpc/boot/dts/
Dps3.dts21 /dts-v1/;
Dstorcenter.dts14 /dts-v1/;
/arch/x86/boot/
Dheader.S129 # with loadlin-1.5 (header v1.5). Don't

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