Searched refs:BIT15 (Results 1 – 11 of 11) sorted by relevance
249 #define HFA384x_CMD_BUSY ((u16)BIT15)260 #define HFA384x_OFFSET_BUSY ((u16)BIT15)264 #define HFA384x_EVSTAT_TICK ((u16)BIT15)279 #define HFA384x_intEN_TICK ((u16)BIT15)290 #define HFA384x_EVACK_TICK ((u16)BIT15)301 #define HFA384x_CONTROL_AUXEN ((u16)(BIT15 | BIT14))1523 #define HFA384x_TESTRESULT_COORDINATE BIT151696 #define HFA384x_RXSTATUS_MSGTYPE ((u16)(BIT15 | BIT14 | BIT13))2446 #define MM_GCSD_PCF (BIT15)2447 #define MM_GCSD_PCF_EB (BIT14 | BIT15)
70 #define BIT15 0x00008000 macro
179 #define WLAN_GET_FC_ORDER(n) ((((u16)(n)) & (BIT15)) >> 15)
730 hw->mm_mods = hw->ident_sta_fw.variant & (BIT14 | BIT15); in prism2sta_getcardinfo()731 hw->ident_sta_fw.variant &= ~((u16)(BIT14 | BIT15)); in prism2sta_getcardinfo()
561 #define MISCSTATUS_RXC_LATCHED BIT15581 #define SICR_RXC_ACTIVE BIT15583 #define SICR_RXC (BIT15+BIT14)638 #define DICR_MASTER BIT151849 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT15) | BIT14)); in shutdown()4735 RegValue |= BIT15; in usc_set_sdlc_mode()4737 RegValue |= BIT15 + BIT14; in usc_set_sdlc_mode()4779 case HDLC_ENCODING_BIPHASE_MARK: RegValue |= BIT15; break; in usc_set_sdlc_mode()4780 case HDLC_ENCODING_BIPHASE_SPACE: RegValue |= BIT15 + BIT13; break; in usc_set_sdlc_mode()4781 case HDLC_ENCODING_BIPHASE_LEVEL: RegValue |= BIT15 + BIT14; break; in usc_set_sdlc_mode()[all …]
219 #define desc_complete(a) (le16_to_cpu((a).status) & BIT15)4093 val = BIT15 + BIT14 + BIT0; in async_mode()4130 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()4196 case MGSL_MODE_BISYNC: val |= BIT15; break; in sync_mode()4302 wr_reg16(info, SCR, BIT15 + BIT14 + BIT0); in sync_mode()
468 #define BIT15 0x8000 macro
60 #define BIT15 0x00008000 macro
176 #define BIT15 0x00008000 macro
41 #define BIT15 0x00008000 macro
294 #define IRQ_BREAK_ON BIT15 // rx break detected