Home
last modified time | relevance | path

Searched refs:DP (Results 1 – 8 of 8) sorted by relevance

/drivers/net/
Dbnx2x_link.c208 DP(NETIF_MSG_LINK, "EMAC reset reg is %u\n", val); in bnx2x_emac_init()
210 DP(NETIF_MSG_LINK, "EMAC timeout!\n"); in bnx2x_emac_init()
236 DP(NETIF_MSG_LINK, "enabling EMAC\n"); in bnx2x_emac_enable()
253 DP(NETIF_MSG_LINK, "bnx2x_emac_enable: Setting FPGA\n"); in bnx2x_emac_enable()
265 DP(NETIF_MSG_LINK, "XGXS\n"); in bnx2x_emac_enable()
274 DP(NETIF_MSG_LINK, "SerDes\n"); in bnx2x_emac_enable()
371 DP(NETIF_MSG_LINK, "Enabling BigMAC\n"); in bnx2x_bmac_enable()
413 DP(NETIF_MSG_LINK, "enable bmac loopback\n"); in bnx2x_bmac_enable()
485 DP(NETIF_MSG_LINK, "bnx2x_phy_deassert:XGXS\n"); in bnx2x_phy_deassert()
489 DP(NETIF_MSG_LINK, "bnx2x_phy_deassert:SerDes\n"); in bnx2x_phy_deassert()
[all …]
Dbnx2x_main.c171 DP(BNX2X_MSG_OFF, "DMAE cmd[%d].%d (0x%08x) : 0x%08x\n", in bnx2x_post_dmae()
187 DP(BNX2X_MSG_OFF, "DMAE is not ready (dst_addr %08x len32 %d)" in bnx2x_write_dmae()
216 DP(BNX2X_MSG_OFF, "dmae: opcode 0x%08x\n" in bnx2x_write_dmae()
223 DP(BNX2X_MSG_OFF, "data [0x%08x 0x%08x 0x%08x 0x%08x]\n", in bnx2x_write_dmae()
234 DP(BNX2X_MSG_OFF, "wb_comp 0x%08x\n", *wb_comp); in bnx2x_write_dmae()
261 DP(BNX2X_MSG_OFF, "DMAE is not ready (src_addr %08x len32 %d)" in bnx2x_read_dmae()
292 DP(BNX2X_MSG_OFF, "dmae: opcode 0x%08x\n" in bnx2x_read_dmae()
319 DP(BNX2X_MSG_OFF, "data [0x%08x 0x%08x 0x%08x 0x%08x]\n", in bnx2x_read_dmae()
501 DP(BNX2X_MSG_STATS, "stats_state - DISABLED\n"); in bnx2x_panic_dump()
604 DP(NETIF_MSG_INTR, "write %x to HC %d (addr 0x%x) MSI-X %d\n", in bnx2x_int_enable()
[all …]
Dbnx2x_init.h387 DP(NETIF_MSG_HW, "skipping init operation " in bnx2x_init_block()
569 DP(NETIF_MSG_HW, "read 0x%x from devctl\n", devctl); in bnx2x_init_pxp()
574 DP(NETIF_MSG_HW, "read order of %d order adjusted to %d\n", in bnx2x_init_pxp()
579 DP(NETIF_MSG_HW, "write order of %d order adjusted to %d\n", in bnx2x_init_pxp()
584 DP(NETIF_MSG_HW, "write order adjusted to 1 for FPGA\n"); in bnx2x_init_pxp()
587 DP(NETIF_MSG_HW, "read order %d write order %d\n", r_order, w_order); in bnx2x_init_pxp()
Dsunbmac.c59 #define DP(x) printk x macro
61 #define DP(x) macro
Dbnx2x.h45 #define DP(__mask, __fmt, __args...) do { \ macro
DKconfig513 <http://www.national.com/pf/DP/DP83902A.html>.
/drivers/block/
Dfloppy.c293 #define DP (&drive_params[current_drive]) macro
625 if (DP->flags & DEBUGT) in debugt()
829 if (DP->select_delay) in twaddle()
981 if (DP->select_delay) in scandrives()
1029 if (DP->flags & FD_DEBUG) { in fd_watchdog()
1367 srt = 16 - DIV_ROUND_UP(DP->srt * scale_dtr / 1000, NOMINAL_DTR); in fdc_specify()
1374 hlt = DIV_ROUND_UP(DP->hlt * scale_dtr / 2, NOMINAL_DTR); in fdc_specify()
1380 hut = DIV_ROUND_UP(DP->hut * scale_dtr / 16, NOMINAL_DTR); in fdc_specify()
1458 if (DP->flags & FTD_MSG) in interpret_errors()
1461 } else if (*errors >= DP->max_errors.reporting) { in interpret_errors()
[all …]
/drivers/net/wan/
Dsbni.h10 #define DP( A ) A macro
12 #define DP( A ) macro