Searched refs:ep0_state (Results 1 – 13 of 13) sorted by relevance
200 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_ep0_giveback()461 musb->ep0_state = MUSB_EP0_STAGE_STATUSIN; in ep0_rxstate()513 musb->ep0_state = MUSB_EP0_STAGE_STATUSOUT; in ep0_txstate()578 musb->ep0_state = MUSB_EP0_STAGE_ACKWAIT; in musb_read_setup()580 musb->ep0_state = MUSB_EP0_STAGE_TX; in musb_read_setup()587 musb->ep0_state = MUSB_EP0_STAGE_RX; in musb_read_setup()624 decode_ep0stage(musb->ep0_state)); in musb_g_ep0_irq()631 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_ep0_irq()639 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_ep0_irq()648 switch (musb->ep0_state) { in musb_g_ep0_irq()[all …]
427 enum musb_g_ep0_state ep0_state; member
2009 musb->ep0_state = MUSB_EP0_STAGE_SETUP; in musb_g_reset()
190 udc_controller->ep0_state = WAIT_FOR_SETUP; in qe_ep0_stall()653 udc->ep0_state = WAIT_FOR_SETUP; in qe_ep_init()808 && (udc->ep0_state == WAIT_FOR_SETUP)) { in ep0_setup_handle()846 udc->ep0_state = WAIT_FOR_SETUP; in qe_ep0_rx()1113 if ((ep->epnum == 0) && (udc->ep0_state == DATA_STATE_NEED_ZLP)) in qe_ep_tx()1244 udc->ep0_state = DATA_STATE_NEED_ZLP; in ep0_prime_status()1249 udc->ep0_state = WAIT_FOR_OUT_STATUS; in ep0_prime_status()1261 switch (udc->ep0_state) { in ep0_req_complete()1271 udc->ep0_state = WAIT_FOR_SETUP; in ep0_req_complete()1283 udc->ep0_state = WAIT_FOR_SETUP; in ep0_req_complete()[all …]
79 enum ep0_state { enum113 enum ep0_state ep0state;
824 udc->ep0_state = DATA_STATE_XMIT; in fsl_ep_queue()955 udc->ep0_state = WAIT_FOR_SETUP; in fsl_ep_set_halt()1136 udc->ep0_state = WAIT_FOR_SETUP; in ep0stall()1152 udc->ep0_state = WAIT_FOR_OUT_STATUS; in ep0_prime_status()1245 udc->ep0_state = DATA_STATE_XMIT; in ch9getstatus()1340 udc->ep0_state = (setup->bRequestType & USB_DIR_IN) in setup_received_irq()1350 udc->ep0_state = WAIT_FOR_OUT_STATUS; in setup_received_irq()1368 switch (udc->ep0_state) { in ep0_req_complete()1380 udc->ep0_state = WAIT_FOR_SETUP; in ep0_req_complete()1632 udc->ep0_state = WAIT_FOR_SETUP; in reset_irq()[all …]
71 enum ep0_state { enum
37 enum ep0_state { enum61 enum ep0_state ep0state;
382 enum ep0_state { enum447 enum ep0_state ep0state;
341 u32 ep0_state; /* Enpoint zero state */ member
488 u32 ep0_state; /* Endpoint zero state */ member
91 enum ep0_state { enum124 enum ep0_state state; /* P: lock */979 enum ep0_state state; in ep0_read()
44 enum ep0_state stat);933 struct imx_udc_struct *imx_usb, enum ep0_state stat) in ep0_chg_stat()