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Searched refs:r24 (Results 1 – 25 of 66) sorted by relevance

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/arch/ia64/lib/
Dflush.S39 shl r24=r23,r20 // r24: addresses for "fc.i" =
51 .Loop: fc.i r24 // issuable on M0 only
52 add r24=r21,r24 // we flush "stride size" bytes per iteration
92 shl r24=r23,r20 // r24: addresses for "fc" =
106 fc r24 // issuable on M0 only
107 add r24=r21,r24 // we flush "stride size" bytes per iteration
Dip_fast_csum.S49 ld4 r24=[in0]
55 add r20=r20,r24
105 ld4 r24=[in0],4
113 add r18=r24,r25
/arch/parisc/lib/
Dlusercopy.S75 comib,= 0,%r24,$lsfu_done
76 copy %r24,%r23
82 addib,<>,n -1,%r24,$lsfu_loop
85 sub %r23,%r24,%r28
151 copy %r26,%r24
160 sub %r26,%r24,%r28
170 copy %r24,%r26 /* reset r26 so 0 is returned on fault */
/arch/powerpc/platforms/iseries/
Dexception.S51 mfmsr r24
52 ori r24,r24,MSR_RI
53 mtmsrd r24 /* RI on */
54 mr r24,r23
55 cmpwi 0,r24,0 /* Are we processor 0? */
72 sldi r28,r24,3 /* get current_set[cpu#] */
95 sldi r28,r24,3 /* get current_set[cpu#] */
/arch/ia64/kvm/
Doptvfault.S29 mov r18 = r24; \
36 mov r24 = ip; \
40 add r24=0x20, r24; \
45 mov r24 = r18; \
129 mov r24=b0
155 mov r24=b0
245 mov r24=r22
272 mov r24=b0
331 mov r24=b0
400 mov r24=b0
[all …]
Dvmm_ivt.S151 mov r24=cr.ipsr
175 mov r24=cr.ipsr
378 .mem.offset 0,0; st8.spill [r2]=r24,16
392 adds r24=PT(B6)-PT(F7),r3
404 st8 [r24]=r18,16 /* b6 */
407 st8 [r24]=r9 /* ar.csd */
612 cmp.eq p6,p0=EVENT_MOV_FROM_AR,r24
613 cmp.eq p7,p0=EVENT_MOV_FROM_RR,r24
614 cmp.eq p8,p0=EVENT_MOV_TO_RR,r24
615 cmp.eq p9,p0=EVENT_RSM,r24
[all …]
Dkvm_minstate.h58 mov r24=ip; \
62 add r24=0x20, r24; \
222 .mem.offset 0,0; st8.spill [r2] = r24,16; \
236 adds r24 = PT(B6)-PT(F7),r3; \
239 st8 [r24] = r18,16; /* b6 */ \
244 st8 [r24] = r9; /* ar.csd */ \
/arch/powerpc/kvm/
Dbooke_interrupts.S144 stw r24, VCPU_GPR(r24)(r4)
222 lwz r24, VCPU_GPR(r24)(r4)
252 stw r24, VCPU_GPR(r24)(r4)
272 lwz r24, HOST_NV_GPR(r24)(r1)
313 stw r24, HOST_NV_GPR(r24)(r1)
333 lwz r24, VCPU_GPR(r24)(r4)
/arch/ia64/kernel/
Dminstate.h71 (pUStk) mov.m r24=ar.rnat; \
118 (pUStk) st8 [r17]=r24,16; /* save ar.rnat */ \
181 .mem.offset 0,0; st8.spill [r2]=r24,16; \
195 adds r24=PT(B6)-PT(F7),r3; \
207 st8 [r24]=r18,16; /* b6 */ \
210 st8 [r24]=r9; /* ar.csd */ \
Divt.S187 ITC_I_AND_D(p10, p11, r18, r24) // insert the instruction TLB entry and
190 MOV_TO_IFA(r22, r24)
193 MOV_TO_ITIR(p8, r25, r24) // change to default page-size for VHPT
201 adds r24=__DIRTY_BITS_NO_ED|_PAGE_PL_0|_PAGE_AR_RW,r23
203 ITC_D(p7, r24, r25)
385 mov r24=PERCPU_ADDR
398 cmp.ge p10,p11=r16,r24 // access to per_cpu_data?
413 MOV_TO_ITIR(p10, r25, r24)
422 MOV_TO_IPSR(p6, r21, r24)
556 mov r24=PAGE_SHIFT<<2
[all …]
Drelocate_kernel.S75 mov r24=r0
81 cmp.ltu p6,p7=r24,r19
91 add r24=1,r24
294 st8 [in0]=r24, 8 // r24
/arch/parisc/hpux/
Dwrappers.S96 copy %r1,%r24
143 copy %r0,%r24 /* NULL environment */
159 STREG %r24,PT_GR24(%r1)
177 LDREG TASK_PT_GR24(%r1),%r24
/arch/powerpc/kernel/
Dhead_64.S135 mfmsr r24
136 ori r24,r24,MSR_RI
137 mtmsrd r24 /* RI on */
140 mr r24,r3
145 std r24,__secondary_hold_acknowledge-_stext(0)
156 mr r3,r24
1235 mr r24,r3
1250 cmpw r6,r24 /* Compare to our id */
1257 mr r3,r24 /* not found, copy phys to r3 */
1262 mr r24,r5
[all …]
Dmisc.S83 PPC_STL r24,15*SZL(r3)
109 PPC_LL r24,15*SZL(r3)
Dswsusp_asm64.S97 SAVE_REGISTER(r24)
203 RESTORE_REGISTER(r24)
Dhead_32.S139 li r24,0 /* cpu # */
168 li r24,0 /* cpu# */
223 mr r24,r3 /* cpu # */
885 mr r24, r3 /* cpu # */
891 li r24,0
893 li r24,1
895 li r24,2
897 li r24,3
913 mr r4,r24
/arch/powerpc/boot/
Dppc_asm.h53 #define r24 24 macro
/arch/parisc/include/asm/
Dasmregs.h26 arg2: .reg %r24
70 r24: .reg %r24
Dunistd.h892 #define K_LOAD_ARGS_3(r26,r25,r24) \ argument
893 register unsigned long __r24 __asm__("r24") = (unsigned long)(r24); \
895 #define K_LOAD_ARGS_4(r26,r25,r24,r23) \ argument
897 K_LOAD_ARGS_3(r26,r25,r24)
898 #define K_LOAD_ARGS_5(r26,r25,r24,r23,r22) \ argument
900 K_LOAD_ARGS_4(r26,r25,r24,r23)
901 #define K_LOAD_ARGS_6(r26,r25,r24,r23,r22,r21) \ argument
903 K_LOAD_ARGS_5(r26,r25,r24,r23,r22)
/arch/alpha/include/asm/
Dptrace.h34 unsigned long r24; member
/arch/parisc/kernel/
Dentry.S191 spc = r24 /* space for which the trap occured */
755 or %r26, %r24, %r26 /* will have kernel mappings. */
762 copy %r1, %r24 /* pt_regs */
815 STREG %r24, PT_GR24(%r16)
1071 ldo PT_FR0(%r29), %r24
1072 save_fp %r24
1194 spc = r24 /* space for which the trap occured */
1446 copy %r1,%r24
1451 add,l %r1,%r24,%r1 /* doesn't affect c/b bits */
1772 copy %r1,%r24
[all …]
Dsyscall.S107 depdi 0, 31, 32, %r24
155 STREG %r24, TASK_PT_GR24(%r1) /* 3rd argument */
305 LDREG TASK_PT_GR24(%r1), %r24
487 depdi 0, 31, 32, %r24
562 2: stw %r24, 0(%sr3,%r26)
Dperf_asm.S113 ;* %r24 - original DR2 value
136 or %r24,%r29,%r29
1369 ;* %r24 - DR2 | DR2_SLOW_RET
1384 depdi,z 1,DR2_SLOW_RET,1,%r24
1386 or %r24,%r23,%r24
/arch/ia64/include/asm/xen/
Dminstate.h50 (pUStk) mov.m r24=ar.rnat; \
102 (pUStk) st8 [r17]=r24,16; /* save ar.rnat */ \
/arch/powerpc/lib/
Dcopyuser_64.S412 std r24,-88(1)
429 27: ld r24,520(4)
449 45: std r24,528(3)
467 63: ld r24,536(4)
506 ld r24,-88(1)
525 ld r24,-88(1)

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