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1 /*
2  * arch/arm/mach-imx/include/mach/spi_imx.h
3  *
4  * Copyright (C) 2006 SWAPP
5  *	Andrea Paterniani <a.paterniani@swapp-eng.it>
6  *
7  * Initial version inspired by:
8  *	linux-2.6.17-rc3-mm1/arch/arm/mach-pxa/include/mach/pxa2xx_spi.h
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License as published by
12  * the Free Software Foundation; either version 2 of the License, or
13  * (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23  */
24 
25 #ifndef SPI_IMX_H_
26 #define SPI_IMX_H_
27 
28 
29 /*-------------------------------------------------------------------------*/
30 /**
31  * struct spi_imx_master - device.platform_data for SPI controller devices.
32  * @num_chipselect: chipselects are used to distinguish individual
33  *	SPI slaves, and are numbered from zero to num_chipselects - 1.
34  *	each slave has a chipselect signal, but it's common that not
35  *	every chipselect is connected to a slave.
36  * @enable_dma: if true enables DMA driven transfers.
37 */
38 struct spi_imx_master {
39 	u8 num_chipselect;
40 	u8 enable_dma:1;
41 };
42 /*-------------------------------------------------------------------------*/
43 
44 
45 /*-------------------------------------------------------------------------*/
46 /**
47  * struct spi_imx_chip - spi_board_info.controller_data for SPI
48  * slave devices, copied to spi_device.controller_data.
49  * @enable_loopback : used for test purpouse to internally connect RX and TX
50  *	sections.
51  * @enable_dma : enables dma transfer (provided that controller driver has
52  *	dma enabled too).
53  * @ins_ss_pulse : enable /SS pulse insertion between SPI burst.
54  * @bclk_wait : number of bclk waits between each bits_per_word SPI burst.
55  * @cs_control : function pointer to board-specific function to assert/deassert
56  *	I/O port to control HW generation of devices chip-select.
57 */
58 struct spi_imx_chip {
59 	u8	enable_loopback:1;
60 	u8	enable_dma:1;
61 	u8	ins_ss_pulse:1;
62 	u16	bclk_wait:15;
63 	void (*cs_control)(u32 control);
64 };
65 
66 /* Chip-select state */
67 #define SPI_CS_ASSERT			(1 << 0)
68 #define SPI_CS_DEASSERT			(1 << 1)
69 /*-------------------------------------------------------------------------*/
70 
71 
72 #endif /* SPI_IMX_H_*/
73