1 /* 2 * OMAP2/3 common powerdomain definitions 3 * 4 * Copyright (C) 2007-8 Texas Instruments, Inc. 5 * Copyright (C) 2007-8 Nokia Corporation 6 * 7 * Written by Paul Walmsley 8 * Debugging and integration fixes by Jouni Högander 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS 16 #define ARCH_ARM_MACH_OMAP2_POWERDOMAINS 17 18 /* 19 * This file contains all of the powerdomains that have some element 20 * of software control for the OMAP24xx and OMAP34XX chips. 21 * 22 * A few notes: 23 * 24 * This is not an exhaustive listing of powerdomains on the chips; only 25 * powerdomains that can be controlled in software. 26 * 27 * A useful validation rule for struct powerdomain: 28 * Any powerdomain referenced by a wkdep_srcs or sleepdep_srcs array 29 * must have a dep_bit assigned. So wkdep_srcs/sleepdep_srcs are really 30 * just software-controllable dependencies. Non-software-controllable 31 * dependencies do exist, but they are not encoded below (yet). 32 * 33 * 24xx does not support programmable sleep dependencies (SLEEPDEP) 34 * 35 */ 36 37 /* 38 * The names for the DSP/IVA2 powerdomains are confusing. 39 * 40 * Most OMAP chips have an on-board DSP. 41 * 42 * On the 2420, this is a 'C55 DSP called, simply, the DSP. Its 43 * powerdomain is called the "DSP power domain." On the 2430, the 44 * on-board DSP is a 'C64 DSP, now called the IVA2 or IVA2.1. Its 45 * powerdomain is still called the "DSP power domain." On the 3430, 46 * the DSP is a 'C64 DSP like the 2430, also known as the IVA2; but 47 * its powerdomain is now called the "IVA2 power domain." 48 * 49 * The 2420 also has something called the IVA, which is a separate ARM 50 * core, and has nothing to do with the DSP/IVA2. 51 * 52 * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM 53 * address offset is different between the C55 and C64 DSPs. 54 * 55 * The overly-specific dep_bit names are due to a bit name collision 56 * with CM_FCLKEN_{DSP,IVA2}. The DSP/IVA2 PM_WKDEP and CM_SLEEPDEP shift 57 * value are the same for all powerdomains: 2 58 */ 59 60 /* 61 * XXX should dep_bit be a mask, so we can test to see if it is 0 as a 62 * sanity check? 63 * XXX encode hardware fixed wakeup dependencies -- esp. for 3430 CORE 64 */ 65 66 #include <mach/powerdomain.h> 67 68 #include "prcm-common.h" 69 #include "prm.h" 70 #include "cm.h" 71 72 /* OMAP2/3-common powerdomains and wakeup dependencies */ 73 74 /* 75 * 2420/2430 PM_WKDEP_GFX: CORE, MPU, WKUP 76 * 3430ES1 PM_WKDEP_GFX: adds IVA2, removes CORE 77 * 3430ES2 PM_WKDEP_SGX: adds IVA2, removes CORE 78 */ 79 static struct pwrdm_dep gfx_sgx_wkdeps[] = { 80 { 81 .pwrdm_name = "core_pwrdm", 82 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX) 83 }, 84 { 85 .pwrdm_name = "iva2_pwrdm", 86 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) 87 }, 88 { 89 .pwrdm_name = "mpu_pwrdm", 90 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | 91 CHIP_IS_OMAP3430) 92 }, 93 { 94 .pwrdm_name = "wkup_pwrdm", 95 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | 96 CHIP_IS_OMAP3430) 97 }, 98 { NULL }, 99 }; 100 101 /* 102 * 3430: CM_SLEEPDEP_CAM: MPU 103 * 3430ES1: CM_SLEEPDEP_GFX: MPU 104 * 3430ES2: CM_SLEEPDEP_SGX: MPU 105 */ 106 static struct pwrdm_dep cam_gfx_sleepdeps[] = { 107 { 108 .pwrdm_name = "mpu_pwrdm", 109 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430) 110 }, 111 { NULL }, 112 }; 113 114 115 #include "powerdomains24xx.h" 116 #include "powerdomains34xx.h" 117 118 119 /* 120 * OMAP2/3 common powerdomains 121 */ 122 123 /* 124 * The GFX powerdomain is not present on 3430ES2, but currently we do not 125 * have a macro to filter it out at compile-time. 126 */ 127 static struct powerdomain gfx_pwrdm = { 128 .name = "gfx_pwrdm", 129 .prcm_offs = GFX_MOD, 130 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | 131 CHIP_IS_OMAP3430ES1), 132 .wkdep_srcs = gfx_sgx_wkdeps, 133 .sleepdep_srcs = cam_gfx_sleepdeps, 134 .pwrsts = PWRSTS_OFF_RET_ON, 135 .pwrsts_logic_ret = PWRDM_POWER_RET, 136 .banks = 1, 137 .pwrsts_mem_ret = { 138 [0] = PWRDM_POWER_RET, /* MEMRETSTATE */ 139 }, 140 .pwrsts_mem_on = { 141 [0] = PWRDM_POWER_ON, /* MEMONSTATE */ 142 }, 143 }; 144 145 static struct powerdomain wkup_pwrdm = { 146 .name = "wkup_pwrdm", 147 .prcm_offs = WKUP_MOD, 148 .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), 149 .dep_bit = OMAP_EN_WKUP_SHIFT, 150 }; 151 152 153 154 /* As powerdomains are added or removed above, this list must also be changed */ 155 static struct powerdomain *powerdomains_omap[] __initdata = { 156 157 &gfx_pwrdm, 158 &wkup_pwrdm, 159 160 #ifdef CONFIG_ARCH_OMAP24XX 161 &dsp_pwrdm, 162 &mpu_24xx_pwrdm, 163 &core_24xx_pwrdm, 164 #endif 165 166 #ifdef CONFIG_ARCH_OMAP2430 167 &mdm_pwrdm, 168 #endif 169 170 #ifdef CONFIG_ARCH_OMAP34XX 171 &iva2_pwrdm, 172 &mpu_34xx_pwrdm, 173 &neon_pwrdm, 174 &core_34xx_pwrdm, 175 &cam_pwrdm, 176 &dss_pwrdm, 177 &per_pwrdm, 178 &emu_pwrdm, 179 &sgx_pwrdm, 180 &usbhost_pwrdm, 181 #endif 182 183 NULL 184 }; 185 186 187 #endif 188