1 /*
2 * arch/arm/mach-pxa/pcm990-baseboard.c
3 * Support for the Phytec phyCORE-PXA270 Development Platform (PCM-990).
4 *
5 * Refer
6 * http://www.phytec.com/products/rdk/ARM-XScale/phyCORE-XScale-PXA270.html
7 * for additional hardware info
8 *
9 * Author: Juergen Kilb
10 * Created: April 05, 2005
11 * Copyright: Phytec Messtechnik GmbH
12 * e-Mail: armlinux@phytec.de
13 *
14 * based on Intel Mainstone Board
15 *
16 * Copyright 2007 Juergen Beisert @ Pengutronix (j.beisert@pengutronix.de)
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License version 2 as
20 * published by the Free Software Foundation.
21 */
22
23 #include <linux/irq.h>
24 #include <linux/platform_device.h>
25 #include <linux/i2c.h>
26 #include <linux/pwm_backlight.h>
27
28 #include <media/soc_camera.h>
29
30 #include <asm/gpio.h>
31 #include <mach/i2c.h>
32 #include <mach/camera.h>
33 #include <asm/mach/map.h>
34 #include <mach/pxa-regs.h>
35 #include <mach/audio.h>
36 #include <mach/mmc.h>
37 #include <mach/ohci.h>
38 #include <mach/pcm990_baseboard.h>
39 #include <mach/pxafb.h>
40 #include <mach/mfp-pxa27x.h>
41
42 #include "devices.h"
43 #include "generic.h"
44
45 static unsigned long pcm990_pin_config[] __initdata = {
46 /* MMC */
47 GPIO32_MMC_CLK,
48 GPIO112_MMC_CMD,
49 GPIO92_MMC_DAT_0,
50 GPIO109_MMC_DAT_1,
51 GPIO110_MMC_DAT_2,
52 GPIO111_MMC_DAT_3,
53 /* USB */
54 GPIO88_USBH1_PWR,
55 GPIO89_USBH1_PEN,
56 /* PWM0 */
57 GPIO16_PWM0_OUT,
58
59 /* I2C */
60 GPIO117_I2C_SCL,
61 GPIO118_I2C_SDA,
62 };
63
64 /*
65 * pcm990_lcd_power - control power supply to the LCD
66 * @on: 0 = switch off, 1 = switch on
67 *
68 * Called by the pxafb driver
69 */
70 #ifndef CONFIG_PCM990_DISPLAY_NONE
pcm990_lcd_power(int on,struct fb_var_screeninfo * var)71 static void pcm990_lcd_power(int on, struct fb_var_screeninfo *var)
72 {
73 if (on) {
74 /* enable LCD-Latches
75 * power on LCD
76 */
77 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) =
78 PCM990_CTRL_LCDPWR + PCM990_CTRL_LCDON;
79 } else {
80 /* disable LCD-Latches
81 * power off LCD
82 */
83 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG3) = 0x00;
84 }
85 }
86 #endif
87
88 #if defined(CONFIG_PCM990_DISPLAY_SHARP)
89 static struct pxafb_mode_info fb_info_sharp_lq084v1dg21 = {
90 .pixclock = 28000,
91 .xres = 640,
92 .yres = 480,
93 .bpp = 16,
94 .hsync_len = 20,
95 .left_margin = 103,
96 .right_margin = 47,
97 .vsync_len = 6,
98 .upper_margin = 28,
99 .lower_margin = 5,
100 .sync = 0,
101 .cmap_greyscale = 0,
102 };
103
104 static struct pxafb_mach_info pcm990_fbinfo __initdata = {
105 .modes = &fb_info_sharp_lq084v1dg21,
106 .num_modes = 1,
107 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
108 .pxafb_lcd_power = pcm990_lcd_power,
109 };
110 #elif defined(CONFIG_PCM990_DISPLAY_NEC)
111 struct pxafb_mode_info fb_info_nec_nl6448bc20_18d = {
112 .pixclock = 39720,
113 .xres = 640,
114 .yres = 480,
115 .bpp = 16,
116 .hsync_len = 32,
117 .left_margin = 16,
118 .right_margin = 48,
119 .vsync_len = 2,
120 .upper_margin = 12,
121 .lower_margin = 17,
122 .sync = 0,
123 .cmap_greyscale = 0,
124 };
125
126 static struct pxafb_mach_info pcm990_fbinfo __initdata = {
127 .modes = &fb_info_nec_nl6448bc20_18d,
128 .num_modes = 1,
129 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
130 .pxafb_lcd_power = pcm990_lcd_power,
131 };
132 #endif
133
134 static struct platform_pwm_backlight_data pcm990_backlight_data = {
135 .pwm_id = 0,
136 .max_brightness = 1023,
137 .dft_brightness = 1023,
138 .pwm_period_ns = 78770,
139 };
140
141 static struct platform_device pcm990_backlight_device = {
142 .name = "pwm-backlight",
143 .dev = {
144 .parent = &pxa27x_device_pwm0.dev,
145 .platform_data = &pcm990_backlight_data,
146 },
147 };
148
149 /*
150 * The PCM-990 development baseboard uses PCM-027's hardware in the
151 * following way:
152 *
153 * - LCD support is in use
154 * - GPIO16 is output for back light on/off with PWM
155 * - GPIO58 ... GPIO73 are outputs for display data
156 * - GPIO74 is output output for LCDFCLK
157 * - GPIO75 is output for LCDLCLK
158 * - GPIO76 is output for LCDPCLK
159 * - GPIO77 is output for LCDBIAS
160 * - MMC support is in use
161 * - GPIO32 is output for MMCCLK
162 * - GPIO92 is MMDAT0
163 * - GPIO109 is MMDAT1
164 * - GPIO110 is MMCS0
165 * - GPIO111 is MMCS1
166 * - GPIO112 is MMCMD
167 * - IDE/CF card is in use
168 * - GPIO48 is output /POE
169 * - GPIO49 is output /PWE
170 * - GPIO50 is output /PIOR
171 * - GPIO51 is output /PIOW
172 * - GPIO54 is output /PCE2
173 * - GPIO55 is output /PREG
174 * - GPIO56 is input /PWAIT
175 * - GPIO57 is output /PIOS16
176 * - GPIO79 is output PSKTSEL
177 * - GPIO85 is output /PCE1
178 * - FFUART is in use
179 * - GPIO34 is input FFRXD
180 * - GPIO35 is input FFCTS
181 * - GPIO36 is input FFDCD
182 * - GPIO37 is input FFDSR
183 * - GPIO38 is input FFRI
184 * - GPIO39 is output FFTXD
185 * - GPIO40 is output FFDTR
186 * - GPIO41 is output FFRTS
187 * - BTUART is in use
188 * - GPIO42 is input BTRXD
189 * - GPIO43 is output BTTXD
190 * - GPIO44 is input BTCTS
191 * - GPIO45 is output BTRTS
192 * - IRUART is in use
193 * - GPIO46 is input STDRXD
194 * - GPIO47 is output STDTXD
195 * - AC97 is in use*)
196 * - GPIO28 is input AC97CLK
197 * - GPIO29 is input AC97DatIn
198 * - GPIO30 is output AC97DatO
199 * - GPIO31 is output AC97SYNC
200 * - GPIO113 is output AC97_RESET
201 * - SSP is in use
202 * - GPIO23 is output SSPSCLK
203 * - GPIO24 is output chip select to Max7301
204 * - GPIO25 is output SSPTXD
205 * - GPIO26 is input SSPRXD
206 * - GPIO27 is input for Max7301 IRQ
207 * - GPIO53 is input SSPSYSCLK
208 * - SSP3 is in use
209 * - GPIO81 is output SSPTXD3
210 * - GPIO82 is input SSPRXD3
211 * - GPIO83 is output SSPSFRM
212 * - GPIO84 is output SSPCLK3
213 *
214 * Otherwise claimed GPIOs:
215 * GPIO1 -> IRQ from user switch
216 * GPIO9 -> IRQ from power management
217 * GPIO10 -> IRQ from WML9712 AC97 controller
218 * GPIO11 -> IRQ from IDE controller
219 * GPIO12 -> IRQ from CF controller
220 * GPIO13 -> IRQ from CF controller
221 * GPIO14 -> GPIO free
222 * GPIO15 -> /CS1 selects baseboard's Control CPLD (U7, 16 bit wide data path)
223 * GPIO19 -> GPIO free
224 * GPIO20 -> /SDCS2
225 * GPIO21 -> /CS3 PC card socket select
226 * GPIO33 -> /CS5 network controller select
227 * GPIO78 -> /CS2 (16 bit wide data path)
228 * GPIO80 -> /CS4 (16 bit wide data path)
229 * GPIO86 -> GPIO free
230 * GPIO87 -> GPIO free
231 * GPIO90 -> LED0 on CPU module
232 * GPIO91 -> LED1 on CPI module
233 * GPIO117 -> SCL
234 * GPIO118 -> SDA
235 */
236
237 static unsigned long pcm990_irq_enabled;
238
pcm990_mask_ack_irq(unsigned int irq)239 static void pcm990_mask_ack_irq(unsigned int irq)
240 {
241 int pcm990_irq = (irq - PCM027_IRQ(0));
242 PCM990_INTMSKENA = (pcm990_irq_enabled &= ~(1 << pcm990_irq));
243 }
244
pcm990_unmask_irq(unsigned int irq)245 static void pcm990_unmask_irq(unsigned int irq)
246 {
247 int pcm990_irq = (irq - PCM027_IRQ(0));
248 /* the irq can be acknowledged only if deasserted, so it's done here */
249 PCM990_INTSETCLR |= 1 << pcm990_irq;
250 PCM990_INTMSKENA = (pcm990_irq_enabled |= (1 << pcm990_irq));
251 }
252
253 static struct irq_chip pcm990_irq_chip = {
254 .mask_ack = pcm990_mask_ack_irq,
255 .unmask = pcm990_unmask_irq,
256 };
257
pcm990_irq_handler(unsigned int irq,struct irq_desc * desc)258 static void pcm990_irq_handler(unsigned int irq, struct irq_desc *desc)
259 {
260 unsigned long pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
261
262 do {
263 GEDR(PCM990_CTRL_INT_IRQ_GPIO) =
264 GPIO_bit(PCM990_CTRL_INT_IRQ_GPIO);
265 if (likely(pending)) {
266 irq = PCM027_IRQ(0) + __ffs(pending);
267 generic_handle_irq(irq);
268 }
269 pending = (~PCM990_INTSETCLR) & pcm990_irq_enabled;
270 } while (pending);
271 }
272
pcm990_init_irq(void)273 static void __init pcm990_init_irq(void)
274 {
275 int irq;
276
277 /* setup extra PCM990 irqs */
278 for (irq = PCM027_IRQ(0); irq <= PCM027_IRQ(3); irq++) {
279 set_irq_chip(irq, &pcm990_irq_chip);
280 set_irq_handler(irq, handle_level_irq);
281 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
282 }
283
284 PCM990_INTMSKENA = 0x00; /* disable all Interrupts */
285 PCM990_INTSETCLR = 0xFF;
286
287 set_irq_chained_handler(PCM990_CTRL_INT_IRQ, pcm990_irq_handler);
288 set_irq_type(PCM990_CTRL_INT_IRQ, PCM990_CTRL_INT_IRQ_EDGE);
289 }
290
pcm990_mci_init(struct device * dev,irq_handler_t mci_detect_int,void * data)291 static int pcm990_mci_init(struct device *dev, irq_handler_t mci_detect_int,
292 void *data)
293 {
294 int err;
295
296 err = request_irq(PCM027_MMCDET_IRQ, mci_detect_int, IRQF_DISABLED,
297 "MMC card detect", data);
298 if (err)
299 printk(KERN_ERR "pcm990_mci_init: MMC/SD: can't request MMC "
300 "card detect IRQ\n");
301
302 return err;
303 }
304
pcm990_mci_setpower(struct device * dev,unsigned int vdd)305 static void pcm990_mci_setpower(struct device *dev, unsigned int vdd)
306 {
307 struct pxamci_platform_data *p_d = dev->platform_data;
308
309 if ((1 << vdd) & p_d->ocr_mask)
310 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
311 PCM990_CTRL_MMC2PWR;
312 else
313 __PCM990_CTRL_REG(PCM990_CTRL_PHYS + PCM990_CTRL_REG5) =
314 ~PCM990_CTRL_MMC2PWR;
315 }
316
pcm990_mci_exit(struct device * dev,void * data)317 static void pcm990_mci_exit(struct device *dev, void *data)
318 {
319 free_irq(PCM027_MMCDET_IRQ, data);
320 }
321
322 #define MSECS_PER_JIFFY (1000/HZ)
323
324 static struct pxamci_platform_data pcm990_mci_platform_data = {
325 .detect_delay = 250 / MSECS_PER_JIFFY,
326 .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34,
327 .init = pcm990_mci_init,
328 .setpower = pcm990_mci_setpower,
329 .exit = pcm990_mci_exit,
330 };
331
332 static struct pxaohci_platform_data pcm990_ohci_platform_data = {
333 .port_mode = PMM_PERPORT_MODE,
334 .flags = ENABLE_PORT1 | POWER_CONTROL_LOW | POWER_SENSE_LOW,
335 .power_on_delay = 10,
336 };
337
338 /*
339 * PXA27x Camera specific stuff
340 */
341 #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
342 static unsigned long pcm990_camera_pin_config[] = {
343 /* CIF */
344 GPIO98_CIF_DD_0,
345 GPIO105_CIF_DD_1,
346 GPIO104_CIF_DD_2,
347 GPIO103_CIF_DD_3,
348 GPIO95_CIF_DD_4,
349 GPIO94_CIF_DD_5,
350 GPIO93_CIF_DD_6,
351 GPIO108_CIF_DD_7,
352 GPIO107_CIF_DD_8,
353 GPIO106_CIF_DD_9,
354 GPIO42_CIF_MCLK,
355 GPIO45_CIF_PCLK,
356 GPIO43_CIF_FV,
357 GPIO44_CIF_LV,
358 };
359
pcm990_pxacamera_init(struct device * dev)360 static int pcm990_pxacamera_init(struct device *dev)
361 {
362 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_camera_pin_config));
363 return 0;
364 }
365
366 /*
367 * CICR4: PCLK_EN: Pixel clock is supplied by the sensor
368 * MCLK_EN: Master clock is generated by PXA
369 * PCP: Data sampled on the falling edge of pixel clock
370 */
371 struct pxacamera_platform_data pcm990_pxacamera_platform_data = {
372 .init = pcm990_pxacamera_init,
373 .flags = PXA_CAMERA_MASTER | PXA_CAMERA_DATAWIDTH_8 | PXA_CAMERA_DATAWIDTH_10 |
374 PXA_CAMERA_PCLK_EN | PXA_CAMERA_MCLK_EN/* | PXA_CAMERA_PCP*/,
375 .mclk_10khz = 1000,
376 };
377
378 #include <linux/i2c/pca953x.h>
379
380 static struct pca953x_platform_data pca9536_data = {
381 .gpio_base = NR_BUILTIN_GPIO + 1,
382 };
383
384 static struct soc_camera_link iclink[] = {
385 {
386 .bus_id = 0, /* Must match with the camera ID above */
387 .gpio = NR_BUILTIN_GPIO + 1,
388 }, {
389 .bus_id = 0, /* Must match with the camera ID above */
390 .gpio = -ENXIO,
391 }
392 };
393
394 /* Board I2C devices. */
395 static struct i2c_board_info __initdata pcm990_i2c_devices[] = {
396 {
397 /* Must initialize before the camera(s) */
398 I2C_BOARD_INFO("pca9536", 0x41),
399 .platform_data = &pca9536_data,
400 }, {
401 I2C_BOARD_INFO("mt9v022", 0x48),
402 .platform_data = &iclink[0], /* With extender */
403 }, {
404 I2C_BOARD_INFO("mt9m001", 0x5d),
405 .platform_data = &iclink[0], /* With extender */
406 },
407 };
408 #endif /* CONFIG_VIDEO_PXA27x ||CONFIG_VIDEO_PXA27x_MODULE */
409
410 /*
411 * enable generic access to the base board control CPLDs U6 and U7
412 */
413 static struct map_desc pcm990_io_desc[] __initdata = {
414 {
415 .virtual = PCM990_CTRL_BASE,
416 .pfn = __phys_to_pfn(PCM990_CTRL_PHYS),
417 .length = PCM990_CTRL_SIZE,
418 .type = MT_DEVICE /* CPLD */
419 }, {
420 .virtual = PCM990_CF_PLD_BASE,
421 .pfn = __phys_to_pfn(PCM990_CF_PLD_PHYS),
422 .length = PCM990_CF_PLD_SIZE,
423 .type = MT_DEVICE /* CPLD */
424 }
425 };
426
427 /*
428 * system init for baseboard usage. Will be called by pcm027 init.
429 *
430 * Add platform devices present on this baseboard and init
431 * them from CPU side as far as required to use them later on
432 */
pcm990_baseboard_init(void)433 void __init pcm990_baseboard_init(void)
434 {
435 pxa2xx_mfp_config(ARRAY_AND_SIZE(pcm990_pin_config));
436
437 /* register CPLD access */
438 iotable_init(ARRAY_AND_SIZE(pcm990_io_desc));
439
440 /* register CPLD's IRQ controller */
441 pcm990_init_irq();
442
443 #ifndef CONFIG_PCM990_DISPLAY_NONE
444 set_pxa_fb_info(&pcm990_fbinfo);
445 #endif
446 platform_device_register(&pcm990_backlight_device);
447
448 /* MMC */
449 pxa_set_mci_info(&pcm990_mci_platform_data);
450
451 /* USB host */
452 pxa_set_ohci_info(&pcm990_ohci_platform_data);
453
454 pxa_set_i2c_info(NULL);
455 pxa_set_ac97_info(NULL);
456
457 #if defined(CONFIG_VIDEO_PXA27x) || defined(CONFIG_VIDEO_PXA27x_MODULE)
458 pxa_set_camera_info(&pcm990_pxacamera_platform_data);
459
460 i2c_register_board_info(0, ARRAY_AND_SIZE(pcm990_i2c_devices));
461 #endif
462
463 printk(KERN_INFO "PCM-990 Evaluation baseboard initialized\n");
464 }
465