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1 /* linux/arch/arm/mach-s3c2440/dma.c
2  *
3  * Copyright (c) 2006 Simtec Electronics
4  *	Ben Dooks <ben@simtec.co.uk>
5  *
6  * S3C2440 DMA selection
7  *
8  * http://armlinux.simtec.co.uk/
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13 */
14 
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/sysdev.h>
18 #include <linux/serial_core.h>
19 
20 #include <mach/dma.h>
21 
22 #include <plat/dma.h>
23 #include <plat/cpu.h>
24 
25 #include <plat/regs-serial.h>
26 #include <mach/regs-gpio.h>
27 #include <plat/regs-ac97.h>
28 #include <mach/regs-mem.h>
29 #include <mach/regs-lcd.h>
30 #include <mach/regs-sdi.h>
31 #include <asm/plat-s3c24xx/regs-iis.h>
32 #include <plat/regs-spi.h>
33 
34 static struct s3c24xx_dma_map __initdata s3c2440_dma_mappings[] = {
35 	[DMACH_XD0] = {
36 		.name		= "xdreq0",
37 		.channels[0]	= S3C2410_DCON_CH0_XDREQ0 | DMA_CH_VALID,
38 	},
39 	[DMACH_XD1] = {
40 		.name		= "xdreq1",
41 		.channels[1]	= S3C2410_DCON_CH1_XDREQ1 | DMA_CH_VALID,
42 	},
43 	[DMACH_SDI] = {
44 		.name		= "sdi",
45 		.channels[0]	= S3C2410_DCON_CH0_SDI | DMA_CH_VALID,
46 		.channels[1]	= S3C2440_DCON_CH1_SDI | DMA_CH_VALID,
47 		.channels[2]	= S3C2410_DCON_CH2_SDI | DMA_CH_VALID,
48 		.channels[3]	= S3C2410_DCON_CH3_SDI | DMA_CH_VALID,
49 		.hw_addr.to	= S3C2410_PA_IIS + S3C2410_IISFIFO,
50 		.hw_addr.from	= S3C2410_PA_IIS + S3C2410_IISFIFO,
51 	},
52 	[DMACH_SPI0] = {
53 		.name		= "spi0",
54 		.channels[1]	= S3C2410_DCON_CH1_SPI | DMA_CH_VALID,
55 		.hw_addr.to	= S3C2410_PA_SPI + S3C2410_SPTDAT,
56 		.hw_addr.from	= S3C2410_PA_SPI + S3C2410_SPRDAT,
57 	},
58 	[DMACH_SPI1] = {
59 		.name		= "spi1",
60 		.channels[3]	= S3C2410_DCON_CH3_SPI | DMA_CH_VALID,
61 		.hw_addr.to	= S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
62 		.hw_addr.from	= S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
63 	},
64 	[DMACH_UART0] = {
65 		.name		= "uart0",
66 		.channels[0]	= S3C2410_DCON_CH0_UART0 | DMA_CH_VALID,
67 		.hw_addr.to	= S3C2410_PA_UART0 + S3C2410_UTXH,
68 		.hw_addr.from	= S3C2410_PA_UART0 + S3C2410_URXH,
69 	},
70 	[DMACH_UART1] = {
71 		.name		= "uart1",
72 		.channels[1]	= S3C2410_DCON_CH1_UART1 | DMA_CH_VALID,
73 		.hw_addr.to	= S3C2410_PA_UART1 + S3C2410_UTXH,
74 		.hw_addr.from	= S3C2410_PA_UART1 + S3C2410_URXH,
75 	},
76       	[DMACH_UART2] = {
77 		.name		= "uart2",
78 		.channels[3]	= S3C2410_DCON_CH3_UART2 | DMA_CH_VALID,
79 		.hw_addr.to	= S3C2410_PA_UART2 + S3C2410_UTXH,
80 		.hw_addr.from	= S3C2410_PA_UART2 + S3C2410_URXH,
81 	},
82 	[DMACH_TIMER] = {
83 		.name		= "timer",
84 		.channels[0]	= S3C2410_DCON_CH0_TIMER | DMA_CH_VALID,
85 		.channels[2]	= S3C2410_DCON_CH2_TIMER | DMA_CH_VALID,
86 		.channels[3]	= S3C2410_DCON_CH3_TIMER | DMA_CH_VALID,
87 	},
88 	[DMACH_I2S_IN] = {
89 		.name		= "i2s-sdi",
90 		.channels[1]	= S3C2410_DCON_CH1_I2SSDI | DMA_CH_VALID,
91 		.channels[2]	= S3C2410_DCON_CH2_I2SSDI | DMA_CH_VALID,
92 		.hw_addr.from	= S3C2410_PA_IIS + S3C2410_IISFIFO,
93 	},
94 	[DMACH_I2S_OUT] = {
95 		.name		= "i2s-sdo",
96 		.channels[0]	= S3C2440_DCON_CH0_I2SSDO | DMA_CH_VALID,
97 		.channels[2]	= S3C2410_DCON_CH2_I2SSDO | DMA_CH_VALID,
98 		.hw_addr.to	= S3C2410_PA_IIS + S3C2410_IISFIFO,
99 	},
100 	[DMACH_PCM_IN] = {
101 		.name		= "pcm-in",
102 		.channels[0]	= S3C2440_DCON_CH0_PCMIN | DMA_CH_VALID,
103 		.channels[2]	= S3C2440_DCON_CH2_PCMIN | DMA_CH_VALID,
104 		.hw_addr.from	= S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
105 	},
106 	[DMACH_PCM_OUT] = {
107 		.name		= "pcm-out",
108 		.channels[1]	= S3C2440_DCON_CH1_PCMOUT | DMA_CH_VALID,
109 		.channels[3]	= S3C2440_DCON_CH3_PCMOUT | DMA_CH_VALID,
110 		.hw_addr.to	= S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
111 	},
112 	[DMACH_MIC_IN] = {
113 		.name		= "mic-in",
114 		.channels[2]	= S3C2440_DCON_CH2_MICIN | DMA_CH_VALID,
115 		.channels[3]	= S3C2440_DCON_CH3_MICIN | DMA_CH_VALID,
116 		.hw_addr.from	= S3C2440_PA_AC97 + S3C_AC97_MIC_DATA,
117 	},
118 	[DMACH_USB_EP1] = {
119 		.name		= "usb-ep1",
120 		.channels[0]	= S3C2410_DCON_CH0_USBEP1 | DMA_CH_VALID,
121 	},
122 	[DMACH_USB_EP2] = {
123 		.name		= "usb-ep2",
124 		.channels[1]	= S3C2410_DCON_CH1_USBEP2 | DMA_CH_VALID,
125 	},
126 	[DMACH_USB_EP3] = {
127 		.name		= "usb-ep3",
128 		.channels[2]	= S3C2410_DCON_CH2_USBEP3 | DMA_CH_VALID,
129 	},
130 	[DMACH_USB_EP4] = {
131 		.name		= "usb-ep4",
132 		.channels[3]	= S3C2410_DCON_CH3_USBEP4 | DMA_CH_VALID,
133 	},
134 };
135 
s3c2440_dma_select(struct s3c2410_dma_chan * chan,struct s3c24xx_dma_map * map)136 static void s3c2440_dma_select(struct s3c2410_dma_chan *chan,
137 			       struct s3c24xx_dma_map *map)
138 {
139 	chan->dcon = map->channels[chan->number] & ~DMA_CH_VALID;
140 }
141 
142 static struct s3c24xx_dma_selection __initdata s3c2440_dma_sel = {
143 	.select		= s3c2440_dma_select,
144 	.dcon_mask	= 7 << 24,
145 	.map		= s3c2440_dma_mappings,
146 	.map_size	= ARRAY_SIZE(s3c2440_dma_mappings),
147 };
148 
149 static struct s3c24xx_dma_order __initdata s3c2440_dma_order = {
150 	.channels	= {
151 		[DMACH_SDI]	= {
152 			.list	= {
153 				[0]	= 3 | DMA_CH_VALID,
154 				[1]	= 2 | DMA_CH_VALID,
155 				[2]	= 1 | DMA_CH_VALID,
156 				[3]	= 0 | DMA_CH_VALID,
157 			},
158 		},
159 		[DMACH_I2S_IN]	= {
160 			.list	= {
161 				[0]	= 1 | DMA_CH_VALID,
162 				[1]	= 2 | DMA_CH_VALID,
163 			},
164 		},
165 		[DMACH_I2S_OUT]	= {
166 			.list	= {
167 				[0]	= 2 | DMA_CH_VALID,
168 				[1]	= 1 | DMA_CH_VALID,
169 			},
170 		},
171 		[DMACH_PCM_IN] = {
172 			.list	= {
173 				[0]	= 2 | DMA_CH_VALID,
174 				[1]	= 1 | DMA_CH_VALID,
175 			},
176 		},
177 		[DMACH_PCM_OUT] = {
178 			.list	= {
179 				[0]	= 1 | DMA_CH_VALID,
180 				[1]	= 3 | DMA_CH_VALID,
181 			},
182 		},
183 		[DMACH_MIC_IN] = {
184 			.list	= {
185 				[0]	= 3 | DMA_CH_VALID,
186 				[1]	= 2 | DMA_CH_VALID,
187 			},
188 		},
189 	},
190 };
191 
s3c2440_dma_add(struct sys_device * sysdev)192 static int __init s3c2440_dma_add(struct sys_device *sysdev)
193 {
194 	s3c2410_dma_init();
195 	s3c24xx_dma_order_set(&s3c2440_dma_order);
196 	return s3c24xx_dma_init_map(&s3c2440_dma_sel);
197 }
198 
199 static struct sysdev_driver s3c2440_dma_driver = {
200 	.add	= s3c2440_dma_add,
201 };
202 
s3c2440_dma_init(void)203 static int __init s3c2440_dma_init(void)
204 {
205 	return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_dma_driver);
206 }
207 
208 arch_initcall(s3c2440_dma_init);
209 
210