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1 /*
2  * File:        include/asm/system.h
3  * Based on:
4  * Author:      Tony Kou (tonyko@lineo.ca)
5  *              Copyright (c) 2002 Arcturus Networks Inc.
6  *                    (www.arcturusnetworks.com)
7  *              Copyright (c) 2003 Metrowerks (www.metrowerks.com)
8  *              Copyright (c) 2004 Analog Device Inc.
9  * Created:     25Jan2001 - Tony Kou
10  * Description: system.h include file
11  *
12  * Modified:     22Sep2006 - Robin Getz
13  *                - move include blackfin.h down, so I can get access to
14  *                   irq functions in other include files.
15  *
16  * Bugs:         Enter bugs at http://blackfin.uclinux.org/
17  *
18  * This program is free software; you can redistribute it and/or modify
19  * it under the terms of the GNU General Public License as published by
20  * the Free Software Foundation; either version 2, or (at your option)
21  * any later version.
22  *
23  * This program is distributed in the hope that it will be useful,
24  * but WITHOUT ANY WARRANTY; without even the implied warranty of
25  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
26  * GNU General Public License for more details.
27  *
28  * You should have received a copy of the GNU General Public License
29  * along with this program; see the file COPYING.
30  * If not, write to the Free Software Foundation,
31  * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
32  */
33 
34 #ifndef _BLACKFIN_SYSTEM_H
35 #define _BLACKFIN_SYSTEM_H
36 
37 #include <linux/linkage.h>
38 #include <linux/compiler.h>
39 #include <mach/anomaly.h>
40 #include <asm/pda.h>
41 #include <asm/processor.h>
42 #include <asm/irq.h>
43 
44 /*
45  * Force strict CPU ordering.
46  */
47 #define nop()  __asm__ __volatile__ ("nop;\n\t" : : )
48 #define mb()   __asm__ __volatile__ (""   : : : "memory")
49 #define rmb()  __asm__ __volatile__ (""   : : : "memory")
50 #define wmb()  __asm__ __volatile__ (""   : : : "memory")
51 #define set_mb(var, value) do { (void) xchg(&var, value); } while (0)
52 #define read_barrier_depends() 		do { } while(0)
53 
54 #ifdef CONFIG_SMP
55 asmlinkage unsigned long __raw_xchg_1_asm(volatile void *ptr, unsigned long value);
56 asmlinkage unsigned long __raw_xchg_2_asm(volatile void *ptr, unsigned long value);
57 asmlinkage unsigned long __raw_xchg_4_asm(volatile void *ptr, unsigned long value);
58 asmlinkage unsigned long __raw_cmpxchg_1_asm(volatile void *ptr,
59 					unsigned long new, unsigned long old);
60 asmlinkage unsigned long __raw_cmpxchg_2_asm(volatile void *ptr,
61 					unsigned long new, unsigned long old);
62 asmlinkage unsigned long __raw_cmpxchg_4_asm(volatile void *ptr,
63 					unsigned long new, unsigned long old);
64 
65 #ifdef __ARCH_SYNC_CORE_DCACHE
66 # define smp_mb()	do { barrier(); smp_check_barrier(); smp_mark_barrier(); } while (0)
67 # define smp_rmb()	do { barrier(); smp_check_barrier(); } while (0)
68 # define smp_wmb()	do { barrier(); smp_mark_barrier(); } while (0)
69 #define smp_read_barrier_depends()	do { barrier(); smp_check_barrier(); } while (0)
70 
71 #else
72 # define smp_mb()	barrier()
73 # define smp_rmb()	barrier()
74 # define smp_wmb()	barrier()
75 #define smp_read_barrier_depends()	barrier()
76 #endif
77 
__xchg(unsigned long x,volatile void * ptr,int size)78 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
79 				   int size)
80 {
81 	unsigned long tmp;
82 
83 	switch (size) {
84 	case 1:
85 		tmp = __raw_xchg_1_asm(ptr, x);
86 		break;
87 	case 2:
88 		tmp = __raw_xchg_2_asm(ptr, x);
89 		break;
90 	case 4:
91 		tmp = __raw_xchg_4_asm(ptr, x);
92 		break;
93 	}
94 
95 	return tmp;
96 }
97 
98 /*
99  * Atomic compare and exchange.  Compare OLD with MEM, if identical,
100  * store NEW in MEM.  Return the initial value in MEM.  Success is
101  * indicated by comparing RETURN with OLD.
102  */
__cmpxchg(volatile void * ptr,unsigned long old,unsigned long new,int size)103 static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
104 				      unsigned long new, int size)
105 {
106 	unsigned long tmp;
107 
108 	switch (size) {
109 	case 1:
110 		tmp = __raw_cmpxchg_1_asm(ptr, new, old);
111 		break;
112 	case 2:
113 		tmp = __raw_cmpxchg_2_asm(ptr, new, old);
114 		break;
115 	case 4:
116 		tmp = __raw_cmpxchg_4_asm(ptr, new, old);
117 		break;
118 	}
119 
120 	return tmp;
121 }
122 #define cmpxchg(ptr, o, n) \
123 	((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
124 		(unsigned long)(n), sizeof(*(ptr))))
125 
126 #else /* !CONFIG_SMP */
127 
128 #define smp_mb()	barrier()
129 #define smp_rmb()	barrier()
130 #define smp_wmb()	barrier()
131 #define smp_read_barrier_depends()	do { } while(0)
132 
133 struct __xchg_dummy {
134 	unsigned long a[100];
135 };
136 #define __xg(x) ((volatile struct __xchg_dummy *)(x))
137 
__xchg(unsigned long x,volatile void * ptr,int size)138 static inline unsigned long __xchg(unsigned long x, volatile void *ptr,
139 				   int size)
140 {
141 	unsigned long tmp = 0;
142 	unsigned long flags = 0;
143 
144 	local_irq_save_hw(flags);
145 
146 	switch (size) {
147 	case 1:
148 		__asm__ __volatile__
149 			("%0 = b%2 (z);\n\t"
150 			 "b%2 = %1;\n\t"
151 			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
152 		break;
153 	case 2:
154 		__asm__ __volatile__
155 			("%0 = w%2 (z);\n\t"
156 			 "w%2 = %1;\n\t"
157 			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
158 		break;
159 	case 4:
160 		__asm__ __volatile__
161 			("%0 = %2;\n\t"
162 			 "%2 = %1;\n\t"
163 			 : "=&d" (tmp) : "d" (x), "m" (*__xg(ptr)) : "memory");
164 		break;
165 	}
166 	local_irq_restore_hw(flags);
167 	return tmp;
168 }
169 
170 #include <asm-generic/cmpxchg-local.h>
171 
172 /*
173  * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
174  * them available.
175  */
176 #define cmpxchg_local(ptr, o, n)				  	       \
177 	((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
178 			(unsigned long)(n), sizeof(*(ptr))))
179 #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
180 
181 #include <asm-generic/cmpxchg.h>
182 
183 #endif /* !CONFIG_SMP */
184 
185 #define xchg(ptr, x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x), (ptr), sizeof(*(ptr))))
186 #define tas(ptr) ((void)xchg((ptr), 1))
187 
188 #define prepare_to_switch()     do { } while(0)
189 
190 /*
191  * switch_to(n) should switch tasks to task ptr, first checking that
192  * ptr isn't the current task, in which case it does nothing.
193  */
194 
195 #include <asm/l1layout.h>
196 #include <asm/mem_map.h>
197 
198 asmlinkage struct task_struct *resume(struct task_struct *prev, struct task_struct *next);
199 
200 #ifndef CONFIG_SMP
201 #define switch_to(prev,next,last) \
202 do {    \
203 	memcpy (&task_thread_info(prev)->l1_task_info, L1_SCRATCH_TASK_INFO, \
204 		sizeof *L1_SCRATCH_TASK_INFO); \
205 	memcpy (L1_SCRATCH_TASK_INFO, &task_thread_info(next)->l1_task_info, \
206 		sizeof *L1_SCRATCH_TASK_INFO); \
207 	(last) = resume (prev, next);   \
208 } while (0)
209 #else
210 #define switch_to(prev, next, last) \
211 do {    \
212 	(last) = resume(prev, next);   \
213 } while (0)
214 #endif
215 
216 #endif	/* _BLACKFIN_SYSTEM_H */
217