1 /*
2 * linux/arch/mips/kernel/proc.c
3 *
4 * Copyright (C) 1995, 1996, 2001 Ralf Baechle
5 * Copyright (C) 2001, 2004 MIPS Technologies, Inc.
6 * Copyright (C) 2004 Maciej W. Rozycki
7 */
8 #include <linux/delay.h>
9 #include <linux/kernel.h>
10 #include <linux/sched.h>
11 #include <linux/seq_file.h>
12 #include <asm/bootinfo.h>
13 #include <asm/cpu.h>
14 #include <asm/cpu-features.h>
15 #include <asm/mipsregs.h>
16 #include <asm/processor.h>
17
18 unsigned int vced_count, vcei_count;
19
show_cpuinfo(struct seq_file * m,void * v)20 static int show_cpuinfo(struct seq_file *m, void *v)
21 {
22 unsigned long n = (unsigned long) v - 1;
23 unsigned int version = cpu_data[n].processor_id;
24 unsigned int fp_vers = cpu_data[n].fpu_id;
25 char fmt [64];
26 int i;
27
28 #ifdef CONFIG_SMP
29 if (!cpu_isset(n, cpu_online_map))
30 return 0;
31 #endif
32
33 /*
34 * For the first processor also print the system type
35 */
36 if (n == 0)
37 seq_printf(m, "system type\t\t: %s\n", get_system_type());
38 #ifdef CONFIG_MIPS_GOLDFISH
39 /*
40 * This is needed by the Android init process to run
41 * target specific startup code
42 */
43 if (n == 0) {
44 seq_printf(m, "Hardware\t\t: %s\n", "goldfish");
45 seq_printf(m, "Revison\t\t: %s\n", "1");
46 }
47 #endif
48
49 seq_printf(m, "processor\t\t: %ld\n", n);
50 sprintf(fmt, "cpu model\t\t: %%s V%%d.%%d%s\n",
51 cpu_data[n].options & MIPS_CPU_FPU ? " FPU V%d.%d" : "");
52 seq_printf(m, fmt, __cpu_name[n],
53 (version >> 4) & 0x0f, version & 0x0f,
54 (fp_vers >> 4) & 0x0f, fp_vers & 0x0f);
55 seq_printf(m, "BogoMIPS\t\t: %lu.%02lu\n",
56 cpu_data[n].udelay_val / (500000/HZ),
57 (cpu_data[n].udelay_val / (5000/HZ)) % 100);
58 seq_printf(m, "wait instruction\t: %s\n", cpu_wait ? "yes" : "no");
59 seq_printf(m, "microsecond timers\t: %s\n",
60 cpu_has_counter ? "yes" : "no");
61 seq_printf(m, "tlb_entries\t\t: %d\n", cpu_data[n].tlbsize);
62 seq_printf(m, "extra interrupt vector\t: %s\n",
63 cpu_has_divec ? "yes" : "no");
64 seq_printf(m, "hardware watchpoint\t: %s",
65 cpu_has_watch ? "yes, " : "no\n");
66 if (cpu_has_watch) {
67 seq_printf(m, "count: %d, address/irw mask: [",
68 cpu_data[n].watch_reg_count);
69 for (i = 0; i < cpu_data[n].watch_reg_count; i++)
70 seq_printf(m, "%s0x%04x", i ? ", " : "" ,
71 cpu_data[n].watch_reg_masks[i]);
72 seq_printf(m, "]\n");
73 }
74 seq_printf(m, "ASEs implemented\t:%s%s%s%s%s%s\n",
75 cpu_has_mips16 ? " mips16" : "",
76 cpu_has_mdmx ? " mdmx" : "",
77 cpu_has_mips3d ? " mips3d" : "",
78 cpu_has_smartmips ? " smartmips" : "",
79 cpu_has_dsp ? " dsp" : "",
80 cpu_has_mipsmt ? " mt" : ""
81 );
82 seq_printf(m, "shadow register sets\t: %d\n",
83 cpu_data[n].srsets);
84 seq_printf(m, "core\t\t\t: %d\n", cpu_data[n].core);
85
86 sprintf(fmt, "VCE%%c exceptions\t\t: %s\n",
87 cpu_has_vce ? "%u" : "not available");
88 seq_printf(m, fmt, 'D', vced_count);
89 seq_printf(m, fmt, 'I', vcei_count);
90 seq_printf(m, "\n");
91
92 return 0;
93 }
94
c_start(struct seq_file * m,loff_t * pos)95 static void *c_start(struct seq_file *m, loff_t *pos)
96 {
97 unsigned long i = *pos;
98
99 return i < NR_CPUS ? (void *) (i + 1) : NULL;
100 }
101
c_next(struct seq_file * m,void * v,loff_t * pos)102 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
103 {
104 ++*pos;
105 return c_start(m, pos);
106 }
107
c_stop(struct seq_file * m,void * v)108 static void c_stop(struct seq_file *m, void *v)
109 {
110 }
111
112 const struct seq_operations cpuinfo_op = {
113 .start = c_start,
114 .next = c_next,
115 .stop = c_stop,
116 .show = show_cpuinfo,
117 };
118