1 /*
2 * @file /arch/mips/pmc-sierra/msp71xx/gpio_extended.c
3 *
4 * Generic PMC MSP71xx EXTENDED (EXD) GPIO handling. The extended gpio is
5 * a set of hardware registers that have no need for explicit locking as
6 * it is handled by unique method of writing individual set/clr bits.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * @author Patrick Glass <patrickglass@gmail.com>
13 */
14
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/init.h>
18 #include <linux/gpio.h>
19 #include <linux/io.h>
20
21 #define MSP71XX_DATA_OFFSET(gpio) (2 * (gpio))
22 #define MSP71XX_READ_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 1)
23 #define MSP71XX_CFG_OUT_OFFSET(gpio) (MSP71XX_DATA_OFFSET(gpio) + 16)
24 #define MSP71XX_CFG_IN_OFFSET(gpio) (MSP71XX_CFG_OUT_OFFSET(gpio) + 1)
25
26 #define MSP71XX_EXD_GPIO_BASE 0x0BC000000L
27
28 #define to_msp71xx_exd_gpio_chip(c) \
29 container_of(c, struct msp71xx_exd_gpio_chip, chip)
30
31 /*
32 * struct msp71xx_exd_gpio_chip - container for gpio chip and registers
33 * @chip: chip structure for the specified gpio bank
34 * @reg: register for control and data of gpio pin
35 */
36 struct msp71xx_exd_gpio_chip {
37 struct gpio_chip chip;
38 void __iomem *reg;
39 };
40
41 /*
42 * msp71xx_exd_gpio_get() - return the chip's gpio value
43 * @chip: chip structure which controls the specified gpio
44 * @offset: gpio whose value will be returned
45 *
46 * It will return 0 if gpio value is low and other if high.
47 */
msp71xx_exd_gpio_get(struct gpio_chip * chip,unsigned offset)48 static int msp71xx_exd_gpio_get(struct gpio_chip *chip, unsigned offset)
49 {
50 struct msp71xx_exd_gpio_chip *msp71xx_chip =
51 to_msp71xx_exd_gpio_chip(chip);
52 const unsigned bit = MSP71XX_READ_OFFSET(offset);
53
54 return __raw_readl(msp71xx_chip->reg) & (1 << bit);
55 }
56
57 /*
58 * msp71xx_exd_gpio_set() - set the output value for the gpio
59 * @chip: chip structure who controls the specified gpio
60 * @offset: gpio whose value will be assigned
61 * @value: logic level to assign to the gpio initially
62 *
63 * This will set the gpio bit specified to the desired value. It will set the
64 * gpio pin low if value is 0 otherwise it will be high.
65 */
msp71xx_exd_gpio_set(struct gpio_chip * chip,unsigned offset,int value)66 static void msp71xx_exd_gpio_set(struct gpio_chip *chip,
67 unsigned offset, int value)
68 {
69 struct msp71xx_exd_gpio_chip *msp71xx_chip =
70 to_msp71xx_exd_gpio_chip(chip);
71 const unsigned bit = MSP71XX_DATA_OFFSET(offset);
72
73 __raw_writel(1 << (bit + (value ? 1 : 0)), msp71xx_chip->reg);
74 }
75
76 /*
77 * msp71xx_exd_direction_output() - declare the direction mode for a gpio
78 * @chip: chip structure which controls the specified gpio
79 * @offset: gpio whose value will be assigned
80 * @value: logic level to assign to the gpio initially
81 *
82 * This call will set the mode for the @gpio to output. It will set the
83 * gpio pin low if value is 0 otherwise it will be high.
84 */
msp71xx_exd_direction_output(struct gpio_chip * chip,unsigned offset,int value)85 static int msp71xx_exd_direction_output(struct gpio_chip *chip,
86 unsigned offset, int value)
87 {
88 struct msp71xx_exd_gpio_chip *msp71xx_chip =
89 to_msp71xx_exd_gpio_chip(chip);
90
91 msp71xx_exd_gpio_set(chip, offset, value);
92 __raw_writel(1 << MSP71XX_CFG_OUT_OFFSET(offset), msp71xx_chip->reg);
93 return 0;
94 }
95
96 /*
97 * msp71xx_exd_direction_input() - declare the direction mode for a gpio
98 * @chip: chip structure which controls the specified gpio
99 * @offset: gpio whose to which the value will be assigned
100 *
101 * This call will set the mode for the @gpio to input.
102 */
msp71xx_exd_direction_input(struct gpio_chip * chip,unsigned offset)103 static int msp71xx_exd_direction_input(struct gpio_chip *chip, unsigned offset)
104 {
105 struct msp71xx_exd_gpio_chip *msp71xx_chip =
106 to_msp71xx_exd_gpio_chip(chip);
107
108 __raw_writel(1 << MSP71XX_CFG_IN_OFFSET(offset), msp71xx_chip->reg);
109 return 0;
110 }
111
112 #define MSP71XX_EXD_GPIO_BANK(name, exd_reg, base_gpio, num_gpio) \
113 { \
114 .chip = { \
115 .label = name, \
116 .direction_input = msp71xx_exd_direction_input, \
117 .direction_output = msp71xx_exd_direction_output, \
118 .get = msp71xx_exd_gpio_get, \
119 .set = msp71xx_exd_gpio_set, \
120 .base = base_gpio, \
121 .ngpio = num_gpio, \
122 }, \
123 .reg = (void __iomem *)(MSP71XX_EXD_GPIO_BASE + exd_reg), \
124 }
125
126 /*
127 * struct msp71xx_exd_gpio_banks[] - container array of gpio banks
128 * @chip: chip structure for the specified gpio bank
129 * @reg: register for reading and writing the gpio pin value
130 *
131 * This array structure defines the extended gpio banks for the
132 * PMC MIPS Processor. We specify the bank name, the data/config
133 * register,the base starting gpio number, and the number of
134 * gpios exposed by the bank of gpios.
135 */
136 static struct msp71xx_exd_gpio_chip msp71xx_exd_gpio_banks[] = {
137
138 MSP71XX_EXD_GPIO_BANK("GPIO_23_16", 0x188, 16, 8),
139 MSP71XX_EXD_GPIO_BANK("GPIO_27_24", 0x18C, 24, 4),
140 };
141
msp71xx_init_gpio_extended(void)142 void __init msp71xx_init_gpio_extended(void)
143 {
144 int i;
145
146 for (i = 0; i < ARRAY_SIZE(msp71xx_exd_gpio_banks); i++)
147 gpiochip_add(&msp71xx_exd_gpio_banks[i].chip);
148 }
149