1 /*
2 * Copyright (C) 2004 IBM
3 *
4 * Implements the generic device dma API for powerpc.
5 * the pci and vio busses
6 */
7 #ifndef _ASM_DMA_MAPPING_H
8 #define _ASM_DMA_MAPPING_H
9 #ifdef __KERNEL__
10
11 #include <linux/types.h>
12 #include <linux/cache.h>
13 /* need struct page definitions */
14 #include <linux/mm.h>
15 #include <linux/scatterlist.h>
16 #include <linux/dma-attrs.h>
17 #include <asm/io.h>
18
19 #define DMA_ERROR_CODE (~(dma_addr_t)0x0)
20
21 #ifdef CONFIG_NOT_COHERENT_CACHE
22 /*
23 * DMA-consistent mapping functions for PowerPCs that don't support
24 * cache snooping. These allocate/free a region of uncached mapped
25 * memory space for use with DMA devices. Alternatively, you could
26 * allocate the space "normally" and use the cache management functions
27 * to ensure it is consistent.
28 */
29 extern void *__dma_alloc_coherent(size_t size, dma_addr_t *handle, gfp_t gfp);
30 extern void __dma_free_coherent(size_t size, void *vaddr);
31 extern void __dma_sync(void *vaddr, size_t size, int direction);
32 extern void __dma_sync_page(struct page *page, unsigned long offset,
33 size_t size, int direction);
34
35 #else /* ! CONFIG_NOT_COHERENT_CACHE */
36 /*
37 * Cache coherent cores.
38 */
39
40 #define __dma_alloc_coherent(gfp, size, handle) NULL
41 #define __dma_free_coherent(size, addr) ((void)0)
42 #define __dma_sync(addr, size, rw) ((void)0)
43 #define __dma_sync_page(pg, off, sz, rw) ((void)0)
44
45 #endif /* ! CONFIG_NOT_COHERENT_CACHE */
46
device_to_mask(struct device * dev)47 static inline unsigned long device_to_mask(struct device *dev)
48 {
49 if (dev->dma_mask && *dev->dma_mask)
50 return *dev->dma_mask;
51 /* Assume devices without mask can take 32 bit addresses */
52 return 0xfffffffful;
53 }
54
55 /*
56 * DMA operations are abstracted for G5 vs. i/pSeries, PCI vs. VIO
57 */
58 struct dma_mapping_ops {
59 void * (*alloc_coherent)(struct device *dev, size_t size,
60 dma_addr_t *dma_handle, gfp_t flag);
61 void (*free_coherent)(struct device *dev, size_t size,
62 void *vaddr, dma_addr_t dma_handle);
63 int (*map_sg)(struct device *dev, struct scatterlist *sg,
64 int nents, enum dma_data_direction direction,
65 struct dma_attrs *attrs);
66 void (*unmap_sg)(struct device *dev, struct scatterlist *sg,
67 int nents, enum dma_data_direction direction,
68 struct dma_attrs *attrs);
69 int (*dma_supported)(struct device *dev, u64 mask);
70 int (*set_dma_mask)(struct device *dev, u64 dma_mask);
71 dma_addr_t (*map_page)(struct device *dev, struct page *page,
72 unsigned long offset, size_t size,
73 enum dma_data_direction direction,
74 struct dma_attrs *attrs);
75 void (*unmap_page)(struct device *dev,
76 dma_addr_t dma_address, size_t size,
77 enum dma_data_direction direction,
78 struct dma_attrs *attrs);
79 #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
80 void (*sync_single_range_for_cpu)(struct device *hwdev,
81 dma_addr_t dma_handle, unsigned long offset,
82 size_t size,
83 enum dma_data_direction direction);
84 void (*sync_single_range_for_device)(struct device *hwdev,
85 dma_addr_t dma_handle, unsigned long offset,
86 size_t size,
87 enum dma_data_direction direction);
88 void (*sync_sg_for_cpu)(struct device *hwdev,
89 struct scatterlist *sg, int nelems,
90 enum dma_data_direction direction);
91 void (*sync_sg_for_device)(struct device *hwdev,
92 struct scatterlist *sg, int nelems,
93 enum dma_data_direction direction);
94 #endif
95 };
96
97 /*
98 * Available generic sets of operations
99 */
100 #ifdef CONFIG_PPC64
101 extern struct dma_mapping_ops dma_iommu_ops;
102 #endif
103 extern struct dma_mapping_ops dma_direct_ops;
104
get_dma_ops(struct device * dev)105 static inline struct dma_mapping_ops *get_dma_ops(struct device *dev)
106 {
107 /* We don't handle the NULL dev case for ISA for now. We could
108 * do it via an out of line call but it is not needed for now. The
109 * only ISA DMA device we support is the floppy and we have a hack
110 * in the floppy driver directly to get a device for us.
111 */
112
113 if (unlikely(dev == NULL) || dev->archdata.dma_ops == NULL) {
114 #ifdef CONFIG_PPC64
115 return NULL;
116 #else
117 /* Use default on 32-bit if dma_ops is not set up */
118 /* TODO: Long term, we should fix drivers so that dev and
119 * archdata dma_ops are set up for all buses.
120 */
121 return &dma_direct_ops;
122 #endif
123 }
124
125 return dev->archdata.dma_ops;
126 }
127
set_dma_ops(struct device * dev,struct dma_mapping_ops * ops)128 static inline void set_dma_ops(struct device *dev, struct dma_mapping_ops *ops)
129 {
130 dev->archdata.dma_ops = ops;
131 }
132
dma_supported(struct device * dev,u64 mask)133 static inline int dma_supported(struct device *dev, u64 mask)
134 {
135 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
136
137 if (unlikely(dma_ops == NULL))
138 return 0;
139 if (dma_ops->dma_supported == NULL)
140 return 1;
141 return dma_ops->dma_supported(dev, mask);
142 }
143
144 /* We have our own implementation of pci_set_dma_mask() */
145 #define HAVE_ARCH_PCI_SET_DMA_MASK
146
dma_set_mask(struct device * dev,u64 dma_mask)147 static inline int dma_set_mask(struct device *dev, u64 dma_mask)
148 {
149 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
150
151 if (unlikely(dma_ops == NULL))
152 return -EIO;
153 if (dma_ops->set_dma_mask != NULL)
154 return dma_ops->set_dma_mask(dev, dma_mask);
155 if (!dev->dma_mask || !dma_supported(dev, dma_mask))
156 return -EIO;
157 *dev->dma_mask = dma_mask;
158 return 0;
159 }
160
161 /*
162 * map_/unmap_single actually call through to map/unmap_page now that all the
163 * dma_mapping_ops have been converted over. We just have to get the page and
164 * offset to pass through to map_page
165 */
dma_map_single_attrs(struct device * dev,void * cpu_addr,size_t size,enum dma_data_direction direction,struct dma_attrs * attrs)166 static inline dma_addr_t dma_map_single_attrs(struct device *dev,
167 void *cpu_addr,
168 size_t size,
169 enum dma_data_direction direction,
170 struct dma_attrs *attrs)
171 {
172 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
173
174 BUG_ON(!dma_ops);
175
176 return dma_ops->map_page(dev, virt_to_page(cpu_addr),
177 (unsigned long)cpu_addr % PAGE_SIZE, size,
178 direction, attrs);
179 }
180
dma_unmap_single_attrs(struct device * dev,dma_addr_t dma_addr,size_t size,enum dma_data_direction direction,struct dma_attrs * attrs)181 static inline void dma_unmap_single_attrs(struct device *dev,
182 dma_addr_t dma_addr,
183 size_t size,
184 enum dma_data_direction direction,
185 struct dma_attrs *attrs)
186 {
187 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
188
189 BUG_ON(!dma_ops);
190
191 dma_ops->unmap_page(dev, dma_addr, size, direction, attrs);
192 }
193
dma_map_page_attrs(struct device * dev,struct page * page,unsigned long offset,size_t size,enum dma_data_direction direction,struct dma_attrs * attrs)194 static inline dma_addr_t dma_map_page_attrs(struct device *dev,
195 struct page *page,
196 unsigned long offset, size_t size,
197 enum dma_data_direction direction,
198 struct dma_attrs *attrs)
199 {
200 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
201
202 BUG_ON(!dma_ops);
203
204 return dma_ops->map_page(dev, page, offset, size, direction, attrs);
205 }
206
dma_unmap_page_attrs(struct device * dev,dma_addr_t dma_address,size_t size,enum dma_data_direction direction,struct dma_attrs * attrs)207 static inline void dma_unmap_page_attrs(struct device *dev,
208 dma_addr_t dma_address,
209 size_t size,
210 enum dma_data_direction direction,
211 struct dma_attrs *attrs)
212 {
213 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
214
215 BUG_ON(!dma_ops);
216
217 dma_ops->unmap_page(dev, dma_address, size, direction, attrs);
218 }
219
dma_map_sg_attrs(struct device * dev,struct scatterlist * sg,int nents,enum dma_data_direction direction,struct dma_attrs * attrs)220 static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
221 int nents, enum dma_data_direction direction,
222 struct dma_attrs *attrs)
223 {
224 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
225
226 BUG_ON(!dma_ops);
227 return dma_ops->map_sg(dev, sg, nents, direction, attrs);
228 }
229
dma_unmap_sg_attrs(struct device * dev,struct scatterlist * sg,int nhwentries,enum dma_data_direction direction,struct dma_attrs * attrs)230 static inline void dma_unmap_sg_attrs(struct device *dev,
231 struct scatterlist *sg,
232 int nhwentries,
233 enum dma_data_direction direction,
234 struct dma_attrs *attrs)
235 {
236 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
237
238 BUG_ON(!dma_ops);
239 dma_ops->unmap_sg(dev, sg, nhwentries, direction, attrs);
240 }
241
dma_alloc_coherent(struct device * dev,size_t size,dma_addr_t * dma_handle,gfp_t flag)242 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
243 dma_addr_t *dma_handle, gfp_t flag)
244 {
245 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
246
247 BUG_ON(!dma_ops);
248 return dma_ops->alloc_coherent(dev, size, dma_handle, flag);
249 }
250
dma_free_coherent(struct device * dev,size_t size,void * cpu_addr,dma_addr_t dma_handle)251 static inline void dma_free_coherent(struct device *dev, size_t size,
252 void *cpu_addr, dma_addr_t dma_handle)
253 {
254 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
255
256 BUG_ON(!dma_ops);
257 dma_ops->free_coherent(dev, size, cpu_addr, dma_handle);
258 }
259
dma_map_single(struct device * dev,void * cpu_addr,size_t size,enum dma_data_direction direction)260 static inline dma_addr_t dma_map_single(struct device *dev, void *cpu_addr,
261 size_t size,
262 enum dma_data_direction direction)
263 {
264 return dma_map_single_attrs(dev, cpu_addr, size, direction, NULL);
265 }
266
dma_unmap_single(struct device * dev,dma_addr_t dma_addr,size_t size,enum dma_data_direction direction)267 static inline void dma_unmap_single(struct device *dev, dma_addr_t dma_addr,
268 size_t size,
269 enum dma_data_direction direction)
270 {
271 dma_unmap_single_attrs(dev, dma_addr, size, direction, NULL);
272 }
273
dma_map_page(struct device * dev,struct page * page,unsigned long offset,size_t size,enum dma_data_direction direction)274 static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
275 unsigned long offset, size_t size,
276 enum dma_data_direction direction)
277 {
278 return dma_map_page_attrs(dev, page, offset, size, direction, NULL);
279 }
280
dma_unmap_page(struct device * dev,dma_addr_t dma_address,size_t size,enum dma_data_direction direction)281 static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
282 size_t size,
283 enum dma_data_direction direction)
284 {
285 dma_unmap_page_attrs(dev, dma_address, size, direction, NULL);
286 }
287
dma_map_sg(struct device * dev,struct scatterlist * sg,int nents,enum dma_data_direction direction)288 static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
289 int nents, enum dma_data_direction direction)
290 {
291 return dma_map_sg_attrs(dev, sg, nents, direction, NULL);
292 }
293
dma_unmap_sg(struct device * dev,struct scatterlist * sg,int nhwentries,enum dma_data_direction direction)294 static inline void dma_unmap_sg(struct device *dev, struct scatterlist *sg,
295 int nhwentries,
296 enum dma_data_direction direction)
297 {
298 dma_unmap_sg_attrs(dev, sg, nhwentries, direction, NULL);
299 }
300
301 #ifdef CONFIG_PPC_NEED_DMA_SYNC_OPS
dma_sync_single_for_cpu(struct device * dev,dma_addr_t dma_handle,size_t size,enum dma_data_direction direction)302 static inline void dma_sync_single_for_cpu(struct device *dev,
303 dma_addr_t dma_handle, size_t size,
304 enum dma_data_direction direction)
305 {
306 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
307
308 BUG_ON(!dma_ops);
309 dma_ops->sync_single_range_for_cpu(dev, dma_handle, 0,
310 size, direction);
311 }
312
dma_sync_single_for_device(struct device * dev,dma_addr_t dma_handle,size_t size,enum dma_data_direction direction)313 static inline void dma_sync_single_for_device(struct device *dev,
314 dma_addr_t dma_handle, size_t size,
315 enum dma_data_direction direction)
316 {
317 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
318
319 BUG_ON(!dma_ops);
320 dma_ops->sync_single_range_for_device(dev, dma_handle,
321 0, size, direction);
322 }
323
dma_sync_sg_for_cpu(struct device * dev,struct scatterlist * sgl,int nents,enum dma_data_direction direction)324 static inline void dma_sync_sg_for_cpu(struct device *dev,
325 struct scatterlist *sgl, int nents,
326 enum dma_data_direction direction)
327 {
328 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
329
330 BUG_ON(!dma_ops);
331 dma_ops->sync_sg_for_cpu(dev, sgl, nents, direction);
332 }
333
dma_sync_sg_for_device(struct device * dev,struct scatterlist * sgl,int nents,enum dma_data_direction direction)334 static inline void dma_sync_sg_for_device(struct device *dev,
335 struct scatterlist *sgl, int nents,
336 enum dma_data_direction direction)
337 {
338 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
339
340 BUG_ON(!dma_ops);
341 dma_ops->sync_sg_for_device(dev, sgl, nents, direction);
342 }
343
dma_sync_single_range_for_cpu(struct device * dev,dma_addr_t dma_handle,unsigned long offset,size_t size,enum dma_data_direction direction)344 static inline void dma_sync_single_range_for_cpu(struct device *dev,
345 dma_addr_t dma_handle, unsigned long offset, size_t size,
346 enum dma_data_direction direction)
347 {
348 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
349
350 BUG_ON(!dma_ops);
351 dma_ops->sync_single_range_for_cpu(dev, dma_handle,
352 offset, size, direction);
353 }
354
dma_sync_single_range_for_device(struct device * dev,dma_addr_t dma_handle,unsigned long offset,size_t size,enum dma_data_direction direction)355 static inline void dma_sync_single_range_for_device(struct device *dev,
356 dma_addr_t dma_handle, unsigned long offset, size_t size,
357 enum dma_data_direction direction)
358 {
359 struct dma_mapping_ops *dma_ops = get_dma_ops(dev);
360
361 BUG_ON(!dma_ops);
362 dma_ops->sync_single_range_for_device(dev, dma_handle, offset,
363 size, direction);
364 }
365 #else /* CONFIG_PPC_NEED_DMA_SYNC_OPS */
dma_sync_single_for_cpu(struct device * dev,dma_addr_t dma_handle,size_t size,enum dma_data_direction direction)366 static inline void dma_sync_single_for_cpu(struct device *dev,
367 dma_addr_t dma_handle, size_t size,
368 enum dma_data_direction direction)
369 {
370 }
371
dma_sync_single_for_device(struct device * dev,dma_addr_t dma_handle,size_t size,enum dma_data_direction direction)372 static inline void dma_sync_single_for_device(struct device *dev,
373 dma_addr_t dma_handle, size_t size,
374 enum dma_data_direction direction)
375 {
376 }
377
dma_sync_sg_for_cpu(struct device * dev,struct scatterlist * sgl,int nents,enum dma_data_direction direction)378 static inline void dma_sync_sg_for_cpu(struct device *dev,
379 struct scatterlist *sgl, int nents,
380 enum dma_data_direction direction)
381 {
382 }
383
dma_sync_sg_for_device(struct device * dev,struct scatterlist * sgl,int nents,enum dma_data_direction direction)384 static inline void dma_sync_sg_for_device(struct device *dev,
385 struct scatterlist *sgl, int nents,
386 enum dma_data_direction direction)
387 {
388 }
389
dma_sync_single_range_for_cpu(struct device * dev,dma_addr_t dma_handle,unsigned long offset,size_t size,enum dma_data_direction direction)390 static inline void dma_sync_single_range_for_cpu(struct device *dev,
391 dma_addr_t dma_handle, unsigned long offset, size_t size,
392 enum dma_data_direction direction)
393 {
394 }
395
dma_sync_single_range_for_device(struct device * dev,dma_addr_t dma_handle,unsigned long offset,size_t size,enum dma_data_direction direction)396 static inline void dma_sync_single_range_for_device(struct device *dev,
397 dma_addr_t dma_handle, unsigned long offset, size_t size,
398 enum dma_data_direction direction)
399 {
400 }
401 #endif
402
dma_mapping_error(struct device * dev,dma_addr_t dma_addr)403 static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
404 {
405 #ifdef CONFIG_PPC64
406 return (dma_addr == DMA_ERROR_CODE);
407 #else
408 return 0;
409 #endif
410 }
411
412 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
413 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
414 #ifdef CONFIG_NOT_COHERENT_CACHE
415 #define dma_is_consistent(d, h) (0)
416 #else
417 #define dma_is_consistent(d, h) (1)
418 #endif
419
dma_get_cache_alignment(void)420 static inline int dma_get_cache_alignment(void)
421 {
422 #ifdef CONFIG_PPC64
423 /* no easy way to get cache size on all processors, so return
424 * the maximum possible, to be safe */
425 return (1 << INTERNODE_CACHE_SHIFT);
426 #else
427 /*
428 * Each processor family will define its own L1_CACHE_SHIFT,
429 * L1_CACHE_BYTES wraps to this, so this is always safe.
430 */
431 return L1_CACHE_BYTES;
432 #endif
433 }
434
dma_cache_sync(struct device * dev,void * vaddr,size_t size,enum dma_data_direction direction)435 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
436 enum dma_data_direction direction)
437 {
438 BUG_ON(direction == DMA_NONE);
439 __dma_sync(vaddr, size, (int)direction);
440 }
441
442 #endif /* __KERNEL__ */
443 #endif /* _ASM_DMA_MAPPING_H */
444