1 /*
2 * Renesas System Solutions Asia Pte. Ltd - Migo-R
3 *
4 * Copyright (C) 2008 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10 #include <linux/init.h>
11 #include <linux/platform_device.h>
12 #include <linux/interrupt.h>
13 #include <linux/input.h>
14 #include <linux/mtd/physmap.h>
15 #include <linux/mtd/nand.h>
16 #include <linux/i2c.h>
17 #include <linux/smc91x.h>
18 #include <linux/delay.h>
19 #include <linux/clk.h>
20 #include <linux/gpio.h>
21 #include <linux/spi/spi.h>
22 #include <linux/spi/spi_gpio.h>
23 #include <video/sh_mobile_lcdc.h>
24 #include <media/sh_mobile_ceu.h>
25 #include <media/ov772x.h>
26 #include <media/tw9910.h>
27 #include <asm/clock.h>
28 #include <asm/machvec.h>
29 #include <asm/io.h>
30 #include <asm/sh_keysc.h>
31 #include <mach/migor.h>
32 #include <cpu/sh7722.h>
33
34 /* Address IRQ Size Bus Description
35 * 0x00000000 64MB 16 NOR Flash (SP29PL256N)
36 * 0x0c000000 64MB 64 SDRAM (2xK4M563233G)
37 * 0x10000000 IRQ0 16 Ethernet (SMC91C111)
38 * 0x14000000 IRQ4 16 USB 2.0 Host Controller (M66596)
39 * 0x18000000 8GB 8 NAND Flash (K9K8G08U0A)
40 */
41
42 static struct smc91x_platdata smc91x_info = {
43 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
44 };
45
46 static struct resource smc91x_eth_resources[] = {
47 [0] = {
48 .name = "SMC91C111" ,
49 .start = 0x10000300,
50 .end = 0x1000030f,
51 .flags = IORESOURCE_MEM,
52 },
53 [1] = {
54 .start = 32, /* IRQ0 */
55 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
56 },
57 };
58
59 static struct platform_device smc91x_eth_device = {
60 .name = "smc91x",
61 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
62 .resource = smc91x_eth_resources,
63 .dev = {
64 .platform_data = &smc91x_info,
65 },
66 };
67
68 static struct sh_keysc_info sh_keysc_info = {
69 .mode = SH_KEYSC_MODE_2, /* KEYOUT0->4, KEYIN1->5 */
70 .scan_timing = 3,
71 .delay = 5,
72 .keycodes = {
73 0, KEY_UP, KEY_DOWN, KEY_LEFT, KEY_RIGHT, KEY_ENTER,
74 0, KEY_F, KEY_C, KEY_D, KEY_H, KEY_1,
75 0, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6,
76 0, KEY_7, KEY_8, KEY_9, KEY_S, KEY_0,
77 0, KEY_P, KEY_STOP, KEY_REWIND, KEY_PLAY, KEY_FASTFORWARD,
78 },
79 };
80
81 static struct resource sh_keysc_resources[] = {
82 [0] = {
83 .start = 0x044b0000,
84 .end = 0x044b000f,
85 .flags = IORESOURCE_MEM,
86 },
87 [1] = {
88 .start = 79,
89 .flags = IORESOURCE_IRQ,
90 },
91 };
92
93 static struct platform_device sh_keysc_device = {
94 .name = "sh_keysc",
95 .id = 0, /* "keysc0" clock */
96 .num_resources = ARRAY_SIZE(sh_keysc_resources),
97 .resource = sh_keysc_resources,
98 .dev = {
99 .platform_data = &sh_keysc_info,
100 },
101 };
102
103 static struct mtd_partition migor_nor_flash_partitions[] =
104 {
105 {
106 .name = "uboot",
107 .offset = 0,
108 .size = (1 * 1024 * 1024),
109 .mask_flags = MTD_WRITEABLE, /* Read-only */
110 },
111 {
112 .name = "rootfs",
113 .offset = MTDPART_OFS_APPEND,
114 .size = (15 * 1024 * 1024),
115 },
116 {
117 .name = "other",
118 .offset = MTDPART_OFS_APPEND,
119 .size = MTDPART_SIZ_FULL,
120 },
121 };
122
123 static struct physmap_flash_data migor_nor_flash_data = {
124 .width = 2,
125 .parts = migor_nor_flash_partitions,
126 .nr_parts = ARRAY_SIZE(migor_nor_flash_partitions),
127 };
128
129 static struct resource migor_nor_flash_resources[] = {
130 [0] = {
131 .name = "NOR Flash",
132 .start = 0x00000000,
133 .end = 0x03ffffff,
134 .flags = IORESOURCE_MEM,
135 }
136 };
137
138 static struct platform_device migor_nor_flash_device = {
139 .name = "physmap-flash",
140 .resource = migor_nor_flash_resources,
141 .num_resources = ARRAY_SIZE(migor_nor_flash_resources),
142 .dev = {
143 .platform_data = &migor_nor_flash_data,
144 },
145 };
146
147 static struct mtd_partition migor_nand_flash_partitions[] = {
148 {
149 .name = "nanddata1",
150 .offset = 0x0,
151 .size = 512 * 1024 * 1024,
152 },
153 {
154 .name = "nanddata2",
155 .offset = MTDPART_OFS_APPEND,
156 .size = 512 * 1024 * 1024,
157 },
158 };
159
migor_nand_flash_cmd_ctl(struct mtd_info * mtd,int cmd,unsigned int ctrl)160 static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
161 unsigned int ctrl)
162 {
163 struct nand_chip *chip = mtd->priv;
164
165 if (cmd == NAND_CMD_NONE)
166 return;
167
168 if (ctrl & NAND_CLE)
169 writeb(cmd, chip->IO_ADDR_W + 0x00400000);
170 else if (ctrl & NAND_ALE)
171 writeb(cmd, chip->IO_ADDR_W + 0x00800000);
172 else
173 writeb(cmd, chip->IO_ADDR_W);
174 }
175
migor_nand_flash_ready(struct mtd_info * mtd)176 static int migor_nand_flash_ready(struct mtd_info *mtd)
177 {
178 return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
179 }
180
181 struct platform_nand_data migor_nand_flash_data = {
182 .chip = {
183 .nr_chips = 1,
184 .partitions = migor_nand_flash_partitions,
185 .nr_partitions = ARRAY_SIZE(migor_nand_flash_partitions),
186 .chip_delay = 20,
187 .part_probe_types = (const char *[]) { "cmdlinepart", NULL },
188 },
189 .ctrl = {
190 .dev_ready = migor_nand_flash_ready,
191 .cmd_ctrl = migor_nand_flash_cmd_ctl,
192 },
193 };
194
195 static struct resource migor_nand_flash_resources[] = {
196 [0] = {
197 .name = "NAND Flash",
198 .start = 0x18000000,
199 .end = 0x18ffffff,
200 .flags = IORESOURCE_MEM,
201 },
202 };
203
204 static struct platform_device migor_nand_flash_device = {
205 .name = "gen_nand",
206 .resource = migor_nand_flash_resources,
207 .num_resources = ARRAY_SIZE(migor_nand_flash_resources),
208 .dev = {
209 .platform_data = &migor_nand_flash_data,
210 }
211 };
212
213 static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
214 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
215 .clock_source = LCDC_CLK_BUS,
216 .ch[0] = {
217 .chan = LCDC_CHAN_MAINLCD,
218 .bpp = 16,
219 .interface_type = RGB16,
220 .clock_divider = 2,
221 .lcd_cfg = {
222 .name = "LB070WV1",
223 .xres = 800,
224 .yres = 480,
225 .left_margin = 64,
226 .right_margin = 16,
227 .hsync_len = 120,
228 .upper_margin = 1,
229 .lower_margin = 17,
230 .vsync_len = 2,
231 .sync = 0,
232 },
233 .lcd_size_cfg = { /* 7.0 inch */
234 .width = 152,
235 .height = 91,
236 },
237 }
238 #endif
239 #ifdef CONFIG_SH_MIGOR_QVGA
240 .clock_source = LCDC_CLK_PERIPHERAL,
241 .ch[0] = {
242 .chan = LCDC_CHAN_MAINLCD,
243 .bpp = 16,
244 .interface_type = SYS16A,
245 .clock_divider = 10,
246 .lcd_cfg = {
247 .name = "PH240320T",
248 .xres = 320,
249 .yres = 240,
250 .left_margin = 0,
251 .right_margin = 16,
252 .hsync_len = 8,
253 .upper_margin = 1,
254 .lower_margin = 17,
255 .vsync_len = 2,
256 .sync = FB_SYNC_HOR_HIGH_ACT,
257 },
258 .lcd_size_cfg = { /* 2.4 inch */
259 .width = 49,
260 .height = 37,
261 },
262 .board_cfg = {
263 .setup_sys = migor_lcd_qvga_setup,
264 },
265 .sys_bus_cfg = {
266 .ldmt2r = 0x06000a09,
267 .ldmt3r = 0x180e3418,
268 /* set 1s delay to encourage fsync() */
269 .deferred_io_msec = 1000,
270 },
271 }
272 #endif
273 };
274
275 static struct resource migor_lcdc_resources[] = {
276 [0] = {
277 .name = "LCDC",
278 .start = 0xfe940000, /* P4-only space */
279 .end = 0xfe941fff,
280 .flags = IORESOURCE_MEM,
281 },
282 [1] = {
283 .start = 28,
284 .flags = IORESOURCE_IRQ,
285 },
286 };
287
288 static struct platform_device migor_lcdc_device = {
289 .name = "sh_mobile_lcdc_fb",
290 .num_resources = ARRAY_SIZE(migor_lcdc_resources),
291 .resource = migor_lcdc_resources,
292 .dev = {
293 .platform_data = &sh_mobile_lcdc_info,
294 },
295 };
296
297 static struct clk *camera_clk;
298 static DEFINE_MUTEX(camera_lock);
299
camera_power_on(int is_tw)300 static void camera_power_on(int is_tw)
301 {
302 mutex_lock(&camera_lock);
303
304 /* Use 10 MHz VIO_CKO instead of 24 MHz to work
305 * around signal quality issues on Panel Board V2.1.
306 */
307 camera_clk = clk_get(NULL, "video_clk");
308 clk_set_rate(camera_clk, 10000000);
309 clk_enable(camera_clk); /* start VIO_CKO */
310
311 /* use VIO_RST to take camera out of reset */
312 mdelay(10);
313 if (is_tw) {
314 gpio_set_value(GPIO_PTT2, 0);
315 gpio_set_value(GPIO_PTT0, 0);
316 } else {
317 gpio_set_value(GPIO_PTT0, 1);
318 }
319 gpio_set_value(GPIO_PTT3, 0);
320 mdelay(10);
321 gpio_set_value(GPIO_PTT3, 1);
322 mdelay(10); /* wait to let chip come out of reset */
323 }
324
camera_power_off(void)325 static void camera_power_off(void)
326 {
327 clk_disable(camera_clk); /* stop VIO_CKO */
328 clk_put(camera_clk);
329
330 gpio_set_value(GPIO_PTT3, 0);
331 mutex_unlock(&camera_lock);
332 }
333
ov7725_power(struct device * dev,int mode)334 static int ov7725_power(struct device *dev, int mode)
335 {
336 if (mode)
337 camera_power_on(0);
338 else
339 camera_power_off();
340
341 return 0;
342 }
343
tw9910_power(struct device * dev,int mode)344 static int tw9910_power(struct device *dev, int mode)
345 {
346 if (mode)
347 camera_power_on(1);
348 else
349 camera_power_off();
350
351 return 0;
352 }
353
354 static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
355 .flags = SOCAM_MASTER | SOCAM_DATAWIDTH_8 | SOCAM_PCLK_SAMPLE_RISING \
356 | SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH,
357 };
358
359 static struct resource migor_ceu_resources[] = {
360 [0] = {
361 .name = "CEU",
362 .start = 0xfe910000,
363 .end = 0xfe91009f,
364 .flags = IORESOURCE_MEM,
365 },
366 [1] = {
367 .start = 52,
368 .flags = IORESOURCE_IRQ,
369 },
370 [2] = {
371 /* place holder for contiguous memory */
372 },
373 };
374
375 static struct platform_device migor_ceu_device = {
376 .name = "sh_mobile_ceu",
377 .id = 0, /* "ceu0" clock */
378 .num_resources = ARRAY_SIZE(migor_ceu_resources),
379 .resource = migor_ceu_resources,
380 .dev = {
381 .platform_data = &sh_mobile_ceu_info,
382 },
383 };
384
385 static struct ov772x_camera_info ov7725_info = {
386 .buswidth = SOCAM_DATAWIDTH_8,
387 .link = {
388 .power = ov7725_power,
389 },
390 };
391
392 static struct tw9910_video_info tw9910_info = {
393 .buswidth = SOCAM_DATAWIDTH_8,
394 .mpout = TW9910_MPO_FIELD,
395 .link = {
396 .power = tw9910_power,
397 }
398 };
399
400 struct spi_gpio_platform_data sdcard_cn9_platform_data = {
401 .sck = GPIO_PTD0,
402 .mosi = GPIO_PTD1,
403 .miso = GPIO_PTD2,
404 .num_chipselect = 1,
405 };
406
407 static struct platform_device sdcard_cn9_device = {
408 .name = "spi_gpio",
409 .dev = {
410 .platform_data = &sdcard_cn9_platform_data,
411 },
412 };
413
414 static struct platform_device *migor_devices[] __initdata = {
415 &smc91x_eth_device,
416 &sh_keysc_device,
417 &migor_lcdc_device,
418 &migor_ceu_device,
419 &migor_nor_flash_device,
420 &migor_nand_flash_device,
421 &sdcard_cn9_device,
422 };
423
424 static struct i2c_board_info migor_i2c_devices[] = {
425 {
426 I2C_BOARD_INFO("rs5c372b", 0x32),
427 },
428 {
429 I2C_BOARD_INFO("migor_ts", 0x51),
430 .irq = 38, /* IRQ6 */
431 },
432 {
433 I2C_BOARD_INFO("ov772x", 0x21),
434 .platform_data = &ov7725_info,
435 },
436 {
437 I2C_BOARD_INFO("tw9910", 0x45),
438 .platform_data = &tw9910_info,
439 },
440 };
441
442 static struct spi_board_info migor_spi_devices[] = {
443 {
444 .modalias = "mmc_spi",
445 .max_speed_hz = 5000000,
446 .chip_select = 0,
447 .controller_data = (void *) GPIO_PTD5,
448 },
449 };
450
migor_devices_setup(void)451 static int __init migor_devices_setup(void)
452 {
453 /* Lit D11 LED */
454 gpio_request(GPIO_PTJ7, NULL);
455 gpio_direction_output(GPIO_PTJ7, 1);
456 gpio_export(GPIO_PTJ7, 0);
457
458 /* Lit D12 LED */
459 gpio_request(GPIO_PTJ5, NULL);
460 gpio_direction_output(GPIO_PTJ5, 1);
461 gpio_export(GPIO_PTJ5, 0);
462
463 /* SMC91C111 - Enable IRQ0, Setup CS4 for 16-bit fast access */
464 gpio_request(GPIO_FN_IRQ0, NULL);
465 ctrl_outl(0x00003400, BSC_CS4BCR);
466 ctrl_outl(0x00110080, BSC_CS4WCR);
467
468 /* KEYSC */
469 gpio_request(GPIO_FN_KEYOUT0, NULL);
470 gpio_request(GPIO_FN_KEYOUT1, NULL);
471 gpio_request(GPIO_FN_KEYOUT2, NULL);
472 gpio_request(GPIO_FN_KEYOUT3, NULL);
473 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
474 gpio_request(GPIO_FN_KEYIN1, NULL);
475 gpio_request(GPIO_FN_KEYIN2, NULL);
476 gpio_request(GPIO_FN_KEYIN3, NULL);
477 gpio_request(GPIO_FN_KEYIN4, NULL);
478 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
479
480 /* NAND Flash */
481 gpio_request(GPIO_FN_CS6A_CE2B, NULL);
482 ctrl_outl((ctrl_inl(BSC_CS6ABCR) & ~0x0600) | 0x0200, BSC_CS6ABCR);
483 gpio_request(GPIO_PTA1, NULL);
484 gpio_direction_input(GPIO_PTA1);
485
486 /* Touch Panel */
487 gpio_request(GPIO_FN_IRQ6, NULL);
488
489 /* LCD Panel */
490 #ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
491 gpio_request(GPIO_FN_LCDD17, NULL);
492 gpio_request(GPIO_FN_LCDD16, NULL);
493 gpio_request(GPIO_FN_LCDD15, NULL);
494 gpio_request(GPIO_FN_LCDD14, NULL);
495 gpio_request(GPIO_FN_LCDD13, NULL);
496 gpio_request(GPIO_FN_LCDD12, NULL);
497 gpio_request(GPIO_FN_LCDD11, NULL);
498 gpio_request(GPIO_FN_LCDD10, NULL);
499 gpio_request(GPIO_FN_LCDD8, NULL);
500 gpio_request(GPIO_FN_LCDD7, NULL);
501 gpio_request(GPIO_FN_LCDD6, NULL);
502 gpio_request(GPIO_FN_LCDD5, NULL);
503 gpio_request(GPIO_FN_LCDD4, NULL);
504 gpio_request(GPIO_FN_LCDD3, NULL);
505 gpio_request(GPIO_FN_LCDD2, NULL);
506 gpio_request(GPIO_FN_LCDD1, NULL);
507 gpio_request(GPIO_FN_LCDRS, NULL);
508 gpio_request(GPIO_FN_LCDCS, NULL);
509 gpio_request(GPIO_FN_LCDRD, NULL);
510 gpio_request(GPIO_FN_LCDWR, NULL);
511 gpio_request(GPIO_PTH2, NULL); /* LCD_DON */
512 gpio_direction_output(GPIO_PTH2, 1);
513 #endif
514 #ifdef CONFIG_SH_MIGOR_RTA_WVGA /* LCDC - WVGA - Enable RGB Interface signals */
515 gpio_request(GPIO_FN_LCDD15, NULL);
516 gpio_request(GPIO_FN_LCDD14, NULL);
517 gpio_request(GPIO_FN_LCDD13, NULL);
518 gpio_request(GPIO_FN_LCDD12, NULL);
519 gpio_request(GPIO_FN_LCDD11, NULL);
520 gpio_request(GPIO_FN_LCDD10, NULL);
521 gpio_request(GPIO_FN_LCDD9, NULL);
522 gpio_request(GPIO_FN_LCDD8, NULL);
523 gpio_request(GPIO_FN_LCDD7, NULL);
524 gpio_request(GPIO_FN_LCDD6, NULL);
525 gpio_request(GPIO_FN_LCDD5, NULL);
526 gpio_request(GPIO_FN_LCDD4, NULL);
527 gpio_request(GPIO_FN_LCDD3, NULL);
528 gpio_request(GPIO_FN_LCDD2, NULL);
529 gpio_request(GPIO_FN_LCDD1, NULL);
530 gpio_request(GPIO_FN_LCDD0, NULL);
531 gpio_request(GPIO_FN_LCDLCLK, NULL);
532 gpio_request(GPIO_FN_LCDDCK, NULL);
533 gpio_request(GPIO_FN_LCDVEPWC, NULL);
534 gpio_request(GPIO_FN_LCDVCPWC, NULL);
535 gpio_request(GPIO_FN_LCDVSYN, NULL);
536 gpio_request(GPIO_FN_LCDHSYN, NULL);
537 gpio_request(GPIO_FN_LCDDISP, NULL);
538 gpio_request(GPIO_FN_LCDDON, NULL);
539 #endif
540
541 /* CEU */
542 gpio_request(GPIO_FN_VIO_CLK2, NULL);
543 gpio_request(GPIO_FN_VIO_VD2, NULL);
544 gpio_request(GPIO_FN_VIO_HD2, NULL);
545 gpio_request(GPIO_FN_VIO_FLD, NULL);
546 gpio_request(GPIO_FN_VIO_CKO, NULL);
547 gpio_request(GPIO_FN_VIO_D15, NULL);
548 gpio_request(GPIO_FN_VIO_D14, NULL);
549 gpio_request(GPIO_FN_VIO_D13, NULL);
550 gpio_request(GPIO_FN_VIO_D12, NULL);
551 gpio_request(GPIO_FN_VIO_D11, NULL);
552 gpio_request(GPIO_FN_VIO_D10, NULL);
553 gpio_request(GPIO_FN_VIO_D9, NULL);
554 gpio_request(GPIO_FN_VIO_D8, NULL);
555
556 gpio_request(GPIO_PTT3, NULL); /* VIO_RST */
557 gpio_direction_output(GPIO_PTT3, 0);
558 gpio_request(GPIO_PTT2, NULL); /* TV_IN_EN */
559 gpio_direction_output(GPIO_PTT2, 1);
560 gpio_request(GPIO_PTT0, NULL); /* CAM_EN */
561 #ifdef CONFIG_SH_MIGOR_RTA_WVGA
562 gpio_direction_output(GPIO_PTT0, 0);
563 #else
564 gpio_direction_output(GPIO_PTT0, 1);
565 #endif
566 ctrl_outw(ctrl_inw(PORT_MSELCRB) | 0x2000, PORT_MSELCRB); /* D15->D8 */
567
568 platform_resource_setup_memory(&migor_ceu_device, "ceu", 4 << 20);
569
570 i2c_register_board_info(0, migor_i2c_devices,
571 ARRAY_SIZE(migor_i2c_devices));
572
573 spi_register_board_info(migor_spi_devices,
574 ARRAY_SIZE(migor_spi_devices));
575
576 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
577 }
578 __initcall(migor_devices_setup);
579