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1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License.  See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/shmedia/boot/compressed/head.S
7 *
8 * Copied from
9 *   arch/shmedia/kernel/head.S
10 * which carried the copyright:
11 *   Copyright (C) 2000, 2001  Paolo Alberelli
12 *
13 * Modification for compressed loader:
14 *   Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com)
15 */
16#include <asm/cache.h>
17#include <cpu/mmu_context.h>
18#include <cpu/registers.h>
19
20/*
21 * Fixed TLB entries to identity map the beginning of RAM
22 */
23#define MMUIR_TEXT_H	0x0000000000000003 | CONFIG_MEMORY_START
24			/* Enabled, Shared, ASID 0, Eff. Add. 0xA0000000 */
25#define MMUIR_TEXT_L	0x000000000000009a | CONFIG_MEMORY_START
26			/* 512 Mb, Cacheable (Write-back), execute, Not User, Ph. Add. */
27
28#define MMUDR_CACHED_H	0x0000000000000003 | CONFIG_MEMORY_START
29			/* Enabled, Shared, ASID 0, Eff. Add. 0xA0000000 */
30#define MMUDR_CACHED_L	0x000000000000015a | CONFIG_MEMORY_START
31			/* 512 Mb, Cacheable (Write-back), read/write, Not User, Ph. Add. */
32
33#define	ICCR0_INIT_VAL	ICCR0_ON | ICCR0_ICI		/* ICE + ICI */
34#define	ICCR1_INIT_VAL	ICCR1_NOLOCK			/* No locking */
35
36#if 1
37#define	OCCR0_INIT_VAL	OCCR0_ON | OCCR0_OCI | OCCR0_WB	/* OCE + OCI + WB */
38#else
39#define	OCCR0_INIT_VAL	OCCR0_OFF
40#endif
41#define	OCCR1_INIT_VAL	OCCR1_NOLOCK			/* No locking */
42
43	.text
44
45	.global	startup
46startup:
47	/*
48	 * Prevent speculative fetch on device memory due to
49	 * uninitialized target registers.
50	 * This must be executed before the first branch.
51	 */
52	ptabs/u	r63, tr0
53	ptabs/u	r63, tr1
54	ptabs/u	r63, tr2
55	ptabs/u	r63, tr3
56	ptabs/u	r63, tr4
57	ptabs/u	r63, tr5
58	ptabs/u	r63, tr6
59	ptabs/u	r63, tr7
60	synci
61
62	/*
63	 * Set initial TLB entries for cached and uncached regions.
64	 * Note: PTA/BLINK is PIC code, PTABS/BLINK isn't !
65	 */
66	/* Clear ITLBs */
67	pta	1f, tr1
68	movi	ITLB_FIXED, r21
69	movi	ITLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
701:	putcfg	r21, 0, r63		/* Clear MMUIR[n].PTEH.V */
71	addi	r21, TLB_STEP, r21
72        bne	r21, r22, tr1
73
74	/* Clear DTLBs */
75	pta	1f, tr1
76	movi	DTLB_FIXED, r21
77	movi	DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
781:	putcfg	r21, 0, r63		/* Clear MMUDR[n].PTEH.V */
79	addi	r21, TLB_STEP, r21
80        bne	r21, r22, tr1
81
82	/* Map one big (512Mb) page for ITLB */
83	movi	ITLB_FIXED, r21
84	movi	MMUIR_TEXT_L, r22	/* PTEL first */
85	putcfg	r21, 1, r22		/* Set MMUIR[0].PTEL */
86	movi	MMUIR_TEXT_H, r22	/* PTEH last */
87	putcfg	r21, 0, r22		/* Set MMUIR[0].PTEH */
88
89	/* Map one big CACHED (512Mb) page for DTLB */
90	movi	DTLB_FIXED, r21
91	movi	MMUDR_CACHED_L, r22	/* PTEL first */
92	putcfg	r21, 1, r22		/* Set MMUDR[0].PTEL */
93	movi	MMUDR_CACHED_H, r22	/* PTEH last */
94	putcfg	r21, 0, r22		/* Set MMUDR[0].PTEH */
95
96	/* ICache */
97	movi	ICCR_BASE, r21
98	movi	ICCR0_INIT_VAL, r22
99	movi	ICCR1_INIT_VAL, r23
100	putcfg	r21, ICCR_REG0, r22
101	putcfg	r21, ICCR_REG1, r23
102	synci
103
104	/* OCache */
105	movi	OCCR_BASE, r21
106	movi	OCCR0_INIT_VAL, r22
107	movi	OCCR1_INIT_VAL, r23
108	putcfg	r21, OCCR_REG0, r22
109	putcfg	r21, OCCR_REG1, r23
110	synco
111
112	/*
113	 * Enable the MMU.
114	 * From here-on code can be non-PIC.
115	 */
116	movi	SR_HARMLESS | SR_ENABLE_MMU, r22
117	putcon	r22, SSR
118	movi	1f, r22
119	putcon	r22, SPC
120	synco
121	rte				/* And now go into the hyperspace ... */
1221:					/* ... that's the next instruction ! */
123
124	/* Set initial stack pointer */
125	movi	datalabel stack_start, r0
126	ld.l	r0, 0, r15
127
128	/*
129	 * Clear bss
130	 */
131	pt	1f, tr1
132	movi	datalabel __bss_start, r22
133	movi	datalabel _end, r23
1341:	st.l	r22, 0, r63
135	addi	r22, 4, r22
136	bne	r22, r23, tr1
137
138	/*
139	 * Decompress the kernel.
140	 */
141	pt	decompress_kernel, tr0
142	blink	tr0, r18
143
144	/*
145	 * Disable the MMU.
146	 */
147	movi	SR_HARMLESS, r22
148	putcon	r22, SSR
149	movi	1f, r22
150	putcon	r22, SPC
151	synco
152	rte				/* And now go into the hyperspace ... */
1531:					/* ... that's the next instruction ! */
154
155	/* Jump into the decompressed kernel */
156	movi	datalabel (CONFIG_MEMORY_START + 0x2000)+1, r19
157	ptabs	r19, tr0
158	blink	tr0, r18
159
160	/* Shouldn't return here, but just in case, loop forever */
161	pt	1f, tr0
1621:	blink	tr0, r63
163