1 /*
2 * arch/sh/drivers/pci/ops-snapgear.c
3 *
4 * Author: David McCullough <davidm@snapgear.com>
5 *
6 * Ported to new API by Paul Mundt <lethal@linux-sh.org>
7 *
8 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
9 *
10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information.
12 *
13 * PCI initialization for the SnapGear boards
14 */
15 #include <linux/kernel.h>
16 #include <linux/types.h>
17 #include <linux/init.h>
18 #include <linux/pci.h>
19 #include "pci-sh4.h"
20
21 #define SNAPGEAR_PCI_IO 0x4000
22 #define SNAPGEAR_PCI_MEM 0xfd000000
23
24 /* PCI: default LOCAL memory window sizes (seen from PCI bus) */
25 #define SNAPGEAR_LSR0_SIZE (64*(1<<20)) //64MB
26 #define SNAPGEAR_LSR1_SIZE (64*(1<<20)) //64MB
27
28 static struct resource sh7751_io_resource = {
29 .name = "SH7751 IO",
30 .start = SNAPGEAR_PCI_IO,
31 .end = SNAPGEAR_PCI_IO + (64*1024) - 1, /* 64KiB I/O */
32 .flags = IORESOURCE_IO,
33 };
34
35 static struct resource sh7751_mem_resource = {
36 .name = "SH7751 mem",
37 .start = SNAPGEAR_PCI_MEM,
38 .end = SNAPGEAR_PCI_MEM + (64*1024*1024) - 1, /* 64MiB mem */
39 .flags = IORESOURCE_MEM,
40 };
41
42 struct pci_channel board_pci_channels[] = {
43 { &sh4_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
44 { 0, }
45 };
46
47 static struct sh4_pci_address_map sh7751_pci_map = {
48 .window0 = {
49 .base = SH7751_CS2_BASE_ADDR,
50 .size = SNAPGEAR_LSR0_SIZE,
51 },
52
53 .window1 = {
54 .base = SH7751_CS2_BASE_ADDR,
55 .size = SNAPGEAR_LSR1_SIZE,
56 },
57
58 .flags = SH4_PCIC_NO_RESET,
59 };
60
61 /*
62 * Initialize the SnapGear PCI interface
63 * Setup hardware to be Central Funtion
64 * Copy the BSR regs to the PCI interface
65 * Setup PCI windows into local RAM
66 */
pcibios_init_platform(void)67 int __init pcibios_init_platform(void)
68 {
69 return sh7751_pcic_init(&sh7751_pci_map);
70 }
71
pcibios_map_platform_irq(struct pci_dev * pdev,u8 slot,u8 pin)72 int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
73 {
74 int irq = -1;
75
76 switch (slot) {
77 case 8: /* the PCI bridge */ break;
78 case 11: irq = 8; break; /* USB */
79 case 12: irq = 11; break; /* PCMCIA */
80 case 13: irq = 5; break; /* eth0 */
81 case 14: irq = 8; break; /* eth1 */
82 case 15: irq = 11; break; /* safenet (unused) */
83 }
84
85 printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
86 slot, pin - 1 + 'A', irq);
87
88 return irq;
89 }
90
pcibios_fixup(void)91 void __init pcibios_fixup(void)
92 {
93 /* Nothing to fixup .. */
94 }
95