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1 #include <linux/module.h>
2 #include <linux/reboot.h>
3 #include <linux/init.h>
4 #include <linux/pm.h>
5 #include <linux/efi.h>
6 #include <acpi/reboot.h>
7 #include <asm/io.h>
8 #include <asm/apic.h>
9 #include <asm/desc.h>
10 #include <asm/hpet.h>
11 #include <asm/pgtable.h>
12 #include <asm/proto.h>
13 #include <asm/reboot_fixups.h>
14 #include <asm/reboot.h>
15 #include <asm/pci_x86.h>
16 #include <asm/virtext.h>
17 
18 #ifdef CONFIG_X86_32
19 # include <linux/dmi.h>
20 # include <linux/ctype.h>
21 # include <linux/mc146818rtc.h>
22 #else
23 # include <asm/iommu.h>
24 #endif
25 
26 #include <mach_ipi.h>
27 
28 /*
29  * Power off function, if any
30  */
31 void (*pm_power_off)(void);
32 EXPORT_SYMBOL(pm_power_off);
33 
34 static const struct desc_ptr no_idt = {};
35 static int reboot_mode;
36 enum reboot_type reboot_type = BOOT_KBD;
37 int reboot_force;
38 
39 #if defined(CONFIG_X86_32) && defined(CONFIG_SMP)
40 static int reboot_cpu = -1;
41 #endif
42 
43 /* This is set if we need to go through the 'emergency' path.
44  * When machine_emergency_restart() is called, we may be on
45  * an inconsistent state and won't be able to do a clean cleanup
46  */
47 static int reboot_emergency;
48 
49 /* This is set by the PCI code if either type 1 or type 2 PCI is detected */
50 bool port_cf9_safe = false;
51 
52 /* reboot=b[ios] | s[mp] | t[riple] | k[bd] | e[fi] [, [w]arm | [c]old] | p[ci]
53    warm   Don't set the cold reboot flag
54    cold   Set the cold reboot flag
55    bios   Reboot by jumping through the BIOS (only for X86_32)
56    smp    Reboot by executing reset on BSP or other CPU (only for X86_32)
57    triple Force a triple fault (init)
58    kbd    Use the keyboard controller. cold reset (default)
59    acpi   Use the RESET_REG in the FADT
60    efi    Use efi reset_system runtime service
61    pci    Use the so-called "PCI reset register", CF9
62    force  Avoid anything that could hang.
63  */
reboot_setup(char * str)64 static int __init reboot_setup(char *str)
65 {
66 	for (;;) {
67 		switch (*str) {
68 		case 'w':
69 			reboot_mode = 0x1234;
70 			break;
71 
72 		case 'c':
73 			reboot_mode = 0;
74 			break;
75 
76 #ifdef CONFIG_X86_32
77 #ifdef CONFIG_SMP
78 		case 's':
79 			if (isdigit(*(str+1))) {
80 				reboot_cpu = (int) (*(str+1) - '0');
81 				if (isdigit(*(str+2)))
82 					reboot_cpu = reboot_cpu*10 + (int)(*(str+2) - '0');
83 			}
84 				/* we will leave sorting out the final value
85 				   when we are ready to reboot, since we might not
86 				   have set up boot_cpu_id or smp_num_cpu */
87 			break;
88 #endif /* CONFIG_SMP */
89 
90 		case 'b':
91 #endif
92 		case 'a':
93 		case 'k':
94 		case 't':
95 		case 'e':
96 		case 'p':
97 			reboot_type = *str;
98 			break;
99 
100 		case 'f':
101 			reboot_force = 1;
102 			break;
103 		}
104 
105 		str = strchr(str, ',');
106 		if (str)
107 			str++;
108 		else
109 			break;
110 	}
111 	return 1;
112 }
113 
114 __setup("reboot=", reboot_setup);
115 
116 
117 #ifdef CONFIG_X86_32
118 /*
119  * Reboot options and system auto-detection code provided by
120  * Dell Inc. so their systems "just work". :-)
121  */
122 
123 /*
124  * Some machines require the "reboot=b"  commandline option,
125  * this quirk makes that automatic.
126  */
set_bios_reboot(const struct dmi_system_id * d)127 static int __init set_bios_reboot(const struct dmi_system_id *d)
128 {
129 	if (reboot_type != BOOT_BIOS) {
130 		reboot_type = BOOT_BIOS;
131 		printk(KERN_INFO "%s series board detected. Selecting BIOS-method for reboots.\n", d->ident);
132 	}
133 	return 0;
134 }
135 
136 static struct dmi_system_id __initdata reboot_dmi_table[] = {
137 	{	/* Handle problems with rebooting on Dell E520's */
138 		.callback = set_bios_reboot,
139 		.ident = "Dell E520",
140 		.matches = {
141 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
142 			DMI_MATCH(DMI_PRODUCT_NAME, "Dell DM061"),
143 		},
144 	},
145 	{	/* Handle problems with rebooting on Dell 1300's */
146 		.callback = set_bios_reboot,
147 		.ident = "Dell PowerEdge 1300",
148 		.matches = {
149 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
150 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1300/"),
151 		},
152 	},
153 	{	/* Handle problems with rebooting on Dell 300's */
154 		.callback = set_bios_reboot,
155 		.ident = "Dell PowerEdge 300",
156 		.matches = {
157 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
158 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 300/"),
159 		},
160 	},
161 	{       /* Handle problems with rebooting on Dell Optiplex 745's SFF*/
162 		.callback = set_bios_reboot,
163 		.ident = "Dell OptiPlex 745",
164 		.matches = {
165 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
166 			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
167 		},
168 	},
169 	{       /* Handle problems with rebooting on Dell Optiplex 745's DFF*/
170 		.callback = set_bios_reboot,
171 		.ident = "Dell OptiPlex 745",
172 		.matches = {
173 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
174 			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
175 			DMI_MATCH(DMI_BOARD_NAME, "0MM599"),
176 		},
177 	},
178 	{       /* Handle problems with rebooting on Dell Optiplex 745 with 0KW626 */
179 		.callback = set_bios_reboot,
180 		.ident = "Dell OptiPlex 745",
181 		.matches = {
182 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
183 			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 745"),
184 			DMI_MATCH(DMI_BOARD_NAME, "0KW626"),
185 		},
186 	},
187 	{   /* Handle problems with rebooting on Dell Optiplex 330 with 0KP561 */
188 		.callback = set_bios_reboot,
189 		.ident = "Dell OptiPlex 330",
190 		.matches = {
191 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
192 			DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 330"),
193 			DMI_MATCH(DMI_BOARD_NAME, "0KP561"),
194 		},
195 	},
196 	{	/* Handle problems with rebooting on Dell 2400's */
197 		.callback = set_bios_reboot,
198 		.ident = "Dell PowerEdge 2400",
199 		.matches = {
200 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
201 			DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2400"),
202 		},
203 	},
204 	{	/* Handle problems with rebooting on Dell T5400's */
205 		.callback = set_bios_reboot,
206 		.ident = "Dell Precision T5400",
207 		.matches = {
208 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
209 			DMI_MATCH(DMI_PRODUCT_NAME, "Precision WorkStation T5400"),
210 		},
211 	},
212 	{	/* Handle problems with rebooting on HP laptops */
213 		.callback = set_bios_reboot,
214 		.ident = "HP Compaq Laptop",
215 		.matches = {
216 			DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
217 			DMI_MATCH(DMI_PRODUCT_NAME, "HP Compaq"),
218 		},
219 	},
220 	{	/* Handle problems with rebooting on Dell XPS710 */
221 		.callback = set_bios_reboot,
222 		.ident = "Dell XPS710",
223 		.matches = {
224 			DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
225 			DMI_MATCH(DMI_PRODUCT_NAME, "Dell XPS710"),
226 		},
227 	},
228 	{ }
229 };
230 
reboot_init(void)231 static int __init reboot_init(void)
232 {
233 	dmi_check_system(reboot_dmi_table);
234 	return 0;
235 }
236 core_initcall(reboot_init);
237 
238 /* The following code and data reboots the machine by switching to real
239    mode and jumping to the BIOS reset entry point, as if the CPU has
240    really been reset.  The previous version asked the keyboard
241    controller to pulse the CPU reset line, which is more thorough, but
242    doesn't work with at least one type of 486 motherboard.  It is easy
243    to stop this code working; hence the copious comments. */
244 static const unsigned long long
245 real_mode_gdt_entries [3] =
246 {
247 	0x0000000000000000ULL,	/* Null descriptor */
248 	0x00009b000000ffffULL,	/* 16-bit real-mode 64k code at 0x00000000 */
249 	0x000093000100ffffULL	/* 16-bit real-mode 64k data at 0x00000100 */
250 };
251 
252 static const struct desc_ptr
253 real_mode_gdt = { sizeof (real_mode_gdt_entries) - 1, (long)real_mode_gdt_entries },
254 real_mode_idt = { 0x3ff, 0 };
255 
256 /* This is 16-bit protected mode code to disable paging and the cache,
257    switch to real mode and jump to the BIOS reset code.
258 
259    The instruction that switches to real mode by writing to CR0 must be
260    followed immediately by a far jump instruction, which set CS to a
261    valid value for real mode, and flushes the prefetch queue to avoid
262    running instructions that have already been decoded in protected
263    mode.
264 
265    Clears all the flags except ET, especially PG (paging), PE
266    (protected-mode enable) and TS (task switch for coprocessor state
267    save).  Flushes the TLB after paging has been disabled.  Sets CD and
268    NW, to disable the cache on a 486, and invalidates the cache.  This
269    is more like the state of a 486 after reset.  I don't know if
270    something else should be done for other chips.
271 
272    More could be done here to set up the registers as if a CPU reset had
273    occurred; hopefully real BIOSs don't assume much. */
274 static const unsigned char real_mode_switch [] =
275 {
276 	0x66, 0x0f, 0x20, 0xc0,			/*    movl  %cr0,%eax        */
277 	0x66, 0x83, 0xe0, 0x11,			/*    andl  $0x00000011,%eax */
278 	0x66, 0x0d, 0x00, 0x00, 0x00, 0x60,	/*    orl   $0x60000000,%eax */
279 	0x66, 0x0f, 0x22, 0xc0,			/*    movl  %eax,%cr0        */
280 	0x66, 0x0f, 0x22, 0xd8,			/*    movl  %eax,%cr3        */
281 	0x66, 0x0f, 0x20, 0xc3,			/*    movl  %cr0,%ebx        */
282 	0x66, 0x81, 0xe3, 0x00, 0x00, 0x00, 0x60,	/*    andl  $0x60000000,%ebx */
283 	0x74, 0x02,				/*    jz    f                */
284 	0x0f, 0x09,				/*    wbinvd                 */
285 	0x24, 0x10,				/* f: andb  $0x10,al         */
286 	0x66, 0x0f, 0x22, 0xc0			/*    movl  %eax,%cr0        */
287 };
288 static const unsigned char jump_to_bios [] =
289 {
290 	0xea, 0x00, 0x00, 0xff, 0xff		/*    ljmp  $0xffff,$0x0000  */
291 };
292 
293 /*
294  * Switch to real mode and then execute the code
295  * specified by the code and length parameters.
296  * We assume that length will aways be less that 100!
297  */
machine_real_restart(const unsigned char * code,int length)298 void machine_real_restart(const unsigned char *code, int length)
299 {
300 	local_irq_disable();
301 
302 	/* Write zero to CMOS register number 0x0f, which the BIOS POST
303 	   routine will recognize as telling it to do a proper reboot.  (Well
304 	   that's what this book in front of me says -- it may only apply to
305 	   the Phoenix BIOS though, it's not clear).  At the same time,
306 	   disable NMIs by setting the top bit in the CMOS address register,
307 	   as we're about to do peculiar things to the CPU.  I'm not sure if
308 	   `outb_p' is needed instead of just `outb'.  Use it to be on the
309 	   safe side.  (Yes, CMOS_WRITE does outb_p's. -  Paul G.)
310 	 */
311 	spin_lock(&rtc_lock);
312 	CMOS_WRITE(0x00, 0x8f);
313 	spin_unlock(&rtc_lock);
314 
315 	/* Remap the kernel at virtual address zero, as well as offset zero
316 	   from the kernel segment.  This assumes the kernel segment starts at
317 	   virtual address PAGE_OFFSET. */
318 	memcpy(swapper_pg_dir, swapper_pg_dir + KERNEL_PGD_BOUNDARY,
319 		sizeof(swapper_pg_dir [0]) * KERNEL_PGD_PTRS);
320 
321 	/*
322 	 * Use `swapper_pg_dir' as our page directory.
323 	 */
324 	load_cr3(swapper_pg_dir);
325 
326 	/* Write 0x1234 to absolute memory location 0x472.  The BIOS reads
327 	   this on booting to tell it to "Bypass memory test (also warm
328 	   boot)".  This seems like a fairly standard thing that gets set by
329 	   REBOOT.COM programs, and the previous reset routine did this
330 	   too. */
331 	*((unsigned short *)0x472) = reboot_mode;
332 
333 	/* For the switch to real mode, copy some code to low memory.  It has
334 	   to be in the first 64k because it is running in 16-bit mode, and it
335 	   has to have the same physical and virtual address, because it turns
336 	   off paging.  Copy it near the end of the first page, out of the way
337 	   of BIOS variables. */
338 	memcpy((void *)(0x1000 - sizeof(real_mode_switch) - 100),
339 		real_mode_switch, sizeof (real_mode_switch));
340 	memcpy((void *)(0x1000 - 100), code, length);
341 
342 	/* Set up the IDT for real mode. */
343 	load_idt(&real_mode_idt);
344 
345 	/* Set up a GDT from which we can load segment descriptors for real
346 	   mode.  The GDT is not used in real mode; it is just needed here to
347 	   prepare the descriptors. */
348 	load_gdt(&real_mode_gdt);
349 
350 	/* Load the data segment registers, and thus the descriptors ready for
351 	   real mode.  The base address of each segment is 0x100, 16 times the
352 	   selector value being loaded here.  This is so that the segment
353 	   registers don't have to be reloaded after switching to real mode:
354 	   the values are consistent for real mode operation already. */
355 	__asm__ __volatile__ ("movl $0x0010,%%eax\n"
356 				"\tmovl %%eax,%%ds\n"
357 				"\tmovl %%eax,%%es\n"
358 				"\tmovl %%eax,%%fs\n"
359 				"\tmovl %%eax,%%gs\n"
360 				"\tmovl %%eax,%%ss" : : : "eax");
361 
362 	/* Jump to the 16-bit code that we copied earlier.  It disables paging
363 	   and the cache, switches to real mode, and jumps to the BIOS reset
364 	   entry point. */
365 	__asm__ __volatile__ ("ljmp $0x0008,%0"
366 				:
367 				: "i" ((void *)(0x1000 - sizeof (real_mode_switch) - 100)));
368 }
369 #ifdef CONFIG_APM_MODULE
370 EXPORT_SYMBOL(machine_real_restart);
371 #endif
372 
373 #endif /* CONFIG_X86_32 */
374 
kb_wait(void)375 static inline void kb_wait(void)
376 {
377 	int i;
378 
379 	for (i = 0; i < 0x10000; i++) {
380 		if ((inb(0x64) & 0x02) == 0)
381 			break;
382 		udelay(2);
383 	}
384 }
385 
vmxoff_nmi(int cpu,struct die_args * args)386 static void vmxoff_nmi(int cpu, struct die_args *args)
387 {
388 	cpu_emergency_vmxoff();
389 }
390 
391 /* Use NMIs as IPIs to tell all CPUs to disable virtualization
392  */
emergency_vmx_disable_all(void)393 static void emergency_vmx_disable_all(void)
394 {
395 	/* Just make sure we won't change CPUs while doing this */
396 	local_irq_disable();
397 
398 	/* We need to disable VMX on all CPUs before rebooting, otherwise
399 	 * we risk hanging up the machine, because the CPU ignore INIT
400 	 * signals when VMX is enabled.
401 	 *
402 	 * We can't take any locks and we may be on an inconsistent
403 	 * state, so we use NMIs as IPIs to tell the other CPUs to disable
404 	 * VMX and halt.
405 	 *
406 	 * For safety, we will avoid running the nmi_shootdown_cpus()
407 	 * stuff unnecessarily, but we don't have a way to check
408 	 * if other CPUs have VMX enabled. So we will call it only if the
409 	 * CPU we are running on has VMX enabled.
410 	 *
411 	 * We will miss cases where VMX is not enabled on all CPUs. This
412 	 * shouldn't do much harm because KVM always enable VMX on all
413 	 * CPUs anyway. But we can miss it on the small window where KVM
414 	 * is still enabling VMX.
415 	 */
416 	if (cpu_has_vmx() && cpu_vmx_enabled()) {
417 		/* Disable VMX on this CPU.
418 		 */
419 		cpu_vmxoff();
420 
421 		/* Halt and disable VMX on the other CPUs */
422 		nmi_shootdown_cpus(vmxoff_nmi);
423 
424 	}
425 }
426 
427 
mach_reboot_fixups(void)428 void __attribute__((weak)) mach_reboot_fixups(void)
429 {
430 }
431 
native_machine_emergency_restart(void)432 static void native_machine_emergency_restart(void)
433 {
434 	int i;
435 
436 	if (reboot_emergency)
437 		emergency_vmx_disable_all();
438 
439 	/* Tell the BIOS if we want cold or warm reboot */
440 	*((unsigned short *)__va(0x472)) = reboot_mode;
441 
442 	for (;;) {
443 		/* Could also try the reset bit in the Hammer NB */
444 		switch (reboot_type) {
445 		case BOOT_KBD:
446 			mach_reboot_fixups(); /* for board specific fixups */
447 
448 			for (i = 0; i < 10; i++) {
449 				kb_wait();
450 				udelay(50);
451 				outb(0xfe, 0x64); /* pulse reset low */
452 				udelay(50);
453 			}
454 
455 		case BOOT_TRIPLE:
456 			load_idt(&no_idt);
457 			__asm__ __volatile__("int3");
458 
459 			reboot_type = BOOT_KBD;
460 			break;
461 
462 #ifdef CONFIG_X86_32
463 		case BOOT_BIOS:
464 			machine_real_restart(jump_to_bios, sizeof(jump_to_bios));
465 
466 			reboot_type = BOOT_KBD;
467 			break;
468 #endif
469 
470 		case BOOT_ACPI:
471 			acpi_reboot();
472 			reboot_type = BOOT_KBD;
473 			break;
474 
475 		case BOOT_EFI:
476 			if (efi_enabled)
477 				efi.reset_system(reboot_mode ?
478 						 EFI_RESET_WARM :
479 						 EFI_RESET_COLD,
480 						 EFI_SUCCESS, 0, NULL);
481 			reboot_type = BOOT_KBD;
482 			break;
483 
484 		case BOOT_CF9:
485 			port_cf9_safe = true;
486 			/* fall through */
487 
488 		case BOOT_CF9_COND:
489 			if (port_cf9_safe) {
490 				u8 cf9 = inb(0xcf9) & ~6;
491 				outb(cf9|2, 0xcf9); /* Request hard reset */
492 				udelay(50);
493 				outb(cf9|6, 0xcf9); /* Actually do the reset */
494 				udelay(50);
495 			}
496 			reboot_type = BOOT_KBD;
497 			break;
498 		}
499 	}
500 }
501 
native_machine_shutdown(void)502 void native_machine_shutdown(void)
503 {
504 	/* Stop the cpus and apics */
505 #ifdef CONFIG_SMP
506 
507 	/* The boot cpu is always logical cpu 0 */
508 	int reboot_cpu_id = 0;
509 
510 #ifdef CONFIG_X86_32
511 	/* See if there has been given a command line override */
512 	if ((reboot_cpu != -1) && (reboot_cpu < nr_cpu_ids) &&
513 		cpu_online(reboot_cpu))
514 		reboot_cpu_id = reboot_cpu;
515 #endif
516 
517 	/* Make certain the cpu I'm about to reboot on is online */
518 	if (!cpu_online(reboot_cpu_id))
519 		reboot_cpu_id = smp_processor_id();
520 
521 	/* Make certain I only run on the appropriate processor */
522 	set_cpus_allowed_ptr(current, cpumask_of(reboot_cpu_id));
523 
524 	/* O.K Now that I'm on the appropriate processor,
525 	 * stop all of the others.
526 	 */
527 	smp_send_stop();
528 #endif
529 
530 	lapic_shutdown();
531 
532 #ifdef CONFIG_X86_IO_APIC
533 	disable_IO_APIC();
534 #endif
535 
536 #ifdef CONFIG_HPET_TIMER
537 	hpet_disable();
538 #endif
539 
540 #ifdef CONFIG_X86_64
541 	pci_iommu_shutdown();
542 #endif
543 }
544 
__machine_emergency_restart(int emergency)545 static void __machine_emergency_restart(int emergency)
546 {
547 	reboot_emergency = emergency;
548 	machine_ops.emergency_restart();
549 }
550 
native_machine_restart(char * __unused)551 static void native_machine_restart(char *__unused)
552 {
553 	printk("machine restart\n");
554 
555 	if (!reboot_force)
556 		machine_shutdown();
557 	__machine_emergency_restart(0);
558 }
559 
native_machine_halt(void)560 static void native_machine_halt(void)
561 {
562 	/* stop other cpus and apics */
563 	machine_shutdown();
564 
565 	/* stop this cpu */
566 	stop_this_cpu(NULL);
567 }
568 
native_machine_power_off(void)569 static void native_machine_power_off(void)
570 {
571 	if (pm_power_off) {
572 		if (!reboot_force)
573 			machine_shutdown();
574 		pm_power_off();
575 	}
576 }
577 
578 struct machine_ops machine_ops = {
579 	.power_off = native_machine_power_off,
580 	.shutdown = native_machine_shutdown,
581 	.emergency_restart = native_machine_emergency_restart,
582 	.restart = native_machine_restart,
583 	.halt = native_machine_halt,
584 #ifdef CONFIG_KEXEC
585 	.crash_shutdown = native_machine_crash_shutdown,
586 #endif
587 };
588 
machine_power_off(void)589 void machine_power_off(void)
590 {
591 	machine_ops.power_off();
592 }
593 
machine_shutdown(void)594 void machine_shutdown(void)
595 {
596 	machine_ops.shutdown();
597 }
598 
machine_emergency_restart(void)599 void machine_emergency_restart(void)
600 {
601 	__machine_emergency_restart(1);
602 }
603 
machine_restart(char * cmd)604 void machine_restart(char *cmd)
605 {
606 	machine_ops.restart(cmd);
607 }
608 
machine_halt(void)609 void machine_halt(void)
610 {
611 	machine_ops.halt();
612 }
613 
614 #ifdef CONFIG_KEXEC
machine_crash_shutdown(struct pt_regs * regs)615 void machine_crash_shutdown(struct pt_regs *regs)
616 {
617 	machine_ops.crash_shutdown(regs);
618 }
619 #endif
620 
621 
622 #if defined(CONFIG_SMP)
623 
624 /* This keeps a track of which one is crashing cpu. */
625 static int crashing_cpu;
626 static nmi_shootdown_cb shootdown_callback;
627 
628 static atomic_t waiting_for_crash_ipi;
629 
crash_nmi_callback(struct notifier_block * self,unsigned long val,void * data)630 static int crash_nmi_callback(struct notifier_block *self,
631 			unsigned long val, void *data)
632 {
633 	int cpu;
634 
635 	if (val != DIE_NMI_IPI)
636 		return NOTIFY_OK;
637 
638 	cpu = raw_smp_processor_id();
639 
640 	/* Don't do anything if this handler is invoked on crashing cpu.
641 	 * Otherwise, system will completely hang. Crashing cpu can get
642 	 * an NMI if system was initially booted with nmi_watchdog parameter.
643 	 */
644 	if (cpu == crashing_cpu)
645 		return NOTIFY_STOP;
646 	local_irq_disable();
647 
648 	shootdown_callback(cpu, (struct die_args *)data);
649 
650 	atomic_dec(&waiting_for_crash_ipi);
651 	/* Assume hlt works */
652 	halt();
653 	for (;;)
654 		cpu_relax();
655 
656 	return 1;
657 }
658 
smp_send_nmi_allbutself(void)659 static void smp_send_nmi_allbutself(void)
660 {
661 	send_IPI_allbutself(NMI_VECTOR);
662 }
663 
664 static struct notifier_block crash_nmi_nb = {
665 	.notifier_call = crash_nmi_callback,
666 };
667 
668 /* Halt all other CPUs, calling the specified function on each of them
669  *
670  * This function can be used to halt all other CPUs on crash
671  * or emergency reboot time. The function passed as parameter
672  * will be called inside a NMI handler on all CPUs.
673  */
nmi_shootdown_cpus(nmi_shootdown_cb callback)674 void nmi_shootdown_cpus(nmi_shootdown_cb callback)
675 {
676 	unsigned long msecs;
677 	local_irq_disable();
678 
679 	/* Make a note of crashing cpu. Will be used in NMI callback.*/
680 	crashing_cpu = safe_smp_processor_id();
681 
682 	shootdown_callback = callback;
683 
684 	atomic_set(&waiting_for_crash_ipi, num_online_cpus() - 1);
685 	/* Would it be better to replace the trap vector here? */
686 	if (register_die_notifier(&crash_nmi_nb))
687 		return;		/* return what? */
688 	/* Ensure the new callback function is set before sending
689 	 * out the NMI
690 	 */
691 	wmb();
692 
693 	smp_send_nmi_allbutself();
694 
695 	msecs = 1000; /* Wait at most a second for the other cpus to stop */
696 	while ((atomic_read(&waiting_for_crash_ipi) > 0) && msecs) {
697 		mdelay(1);
698 		msecs--;
699 	}
700 
701 	/* Leave the nmi callback set */
702 }
703 #else /* !CONFIG_SMP */
nmi_shootdown_cpus(nmi_shootdown_cb callback)704 void nmi_shootdown_cpus(nmi_shootdown_cb callback)
705 {
706 	/* No other CPUs to shoot down */
707 }
708 #endif
709