1 /*
2 * IDE DMA support (including IDE PCI BM-DMA).
3 *
4 * Copyright (C) 1995-1998 Mark Lord
5 * Copyright (C) 1999-2000 Andre Hedrick <andre@linux-ide.org>
6 * Copyright (C) 2004, 2007 Bartlomiej Zolnierkiewicz
7 *
8 * May be copied or modified under the terms of the GNU General Public License
9 *
10 * DMA is supported for all IDE devices (disk drives, cdroms, tapes, floppies).
11 */
12
13 /*
14 * Special Thanks to Mark for his Six years of work.
15 */
16
17 /*
18 * Thanks to "Christopher J. Reimer" <reimer@doe.carleton.ca> for
19 * fixing the problem with the BIOS on some Acer motherboards.
20 *
21 * Thanks to "Benoit Poulot-Cazajous" <poulot@chorus.fr> for testing
22 * "TX" chipset compatibility and for providing patches for the "TX" chipset.
23 *
24 * Thanks to Christian Brunner <chb@muc.de> for taking a good first crack
25 * at generic DMA -- his patches were referred to when preparing this code.
26 *
27 * Most importantly, thanks to Robert Bringman <rob@mars.trion.com>
28 * for supplying a Promise UDMA board & WD UDMA drive for this work!
29 */
30
31 #include <linux/types.h>
32 #include <linux/kernel.h>
33 #include <linux/ide.h>
34 #include <linux/scatterlist.h>
35 #include <linux/dma-mapping.h>
36
37 static const struct drive_list_entry drive_whitelist[] = {
38 { "Micropolis 2112A" , NULL },
39 { "CONNER CTMA 4000" , NULL },
40 { "CONNER CTT8000-A" , NULL },
41 { "ST34342A" , NULL },
42 { NULL , NULL }
43 };
44
45 static const struct drive_list_entry drive_blacklist[] = {
46 { "WDC AC11000H" , NULL },
47 { "WDC AC22100H" , NULL },
48 { "WDC AC32500H" , NULL },
49 { "WDC AC33100H" , NULL },
50 { "WDC AC31600H" , NULL },
51 { "WDC AC32100H" , "24.09P07" },
52 { "WDC AC23200L" , "21.10N21" },
53 { "Compaq CRD-8241B" , NULL },
54 { "CRD-8400B" , NULL },
55 { "CRD-8480B", NULL },
56 { "CRD-8482B", NULL },
57 { "CRD-84" , NULL },
58 { "SanDisk SDP3B" , NULL },
59 { "SanDisk SDP3B-64" , NULL },
60 { "SANYO CD-ROM CRD" , NULL },
61 { "HITACHI CDR-8" , NULL },
62 { "HITACHI CDR-8335" , NULL },
63 { "HITACHI CDR-8435" , NULL },
64 { "Toshiba CD-ROM XM-6202B" , NULL },
65 { "TOSHIBA CD-ROM XM-1702BC", NULL },
66 { "CD-532E-A" , NULL },
67 { "E-IDE CD-ROM CR-840", NULL },
68 { "CD-ROM Drive/F5A", NULL },
69 { "WPI CDD-820", NULL },
70 { "SAMSUNG CD-ROM SC-148C", NULL },
71 { "SAMSUNG CD-ROM SC", NULL },
72 { "ATAPI CD-ROM DRIVE 40X MAXIMUM", NULL },
73 { "_NEC DV5800A", NULL },
74 { "SAMSUNG CD-ROM SN-124", "N001" },
75 { "Seagate STT20000A", NULL },
76 { "CD-ROM CDR_U200", "1.09" },
77 { NULL , NULL }
78
79 };
80
81 /**
82 * ide_dma_intr - IDE DMA interrupt handler
83 * @drive: the drive the interrupt is for
84 *
85 * Handle an interrupt completing a read/write DMA transfer on an
86 * IDE device
87 */
88
ide_dma_intr(ide_drive_t * drive)89 ide_startstop_t ide_dma_intr(ide_drive_t *drive)
90 {
91 ide_hwif_t *hwif = drive->hwif;
92 u8 stat = 0, dma_stat = 0;
93
94 dma_stat = hwif->dma_ops->dma_end(drive);
95 stat = hwif->tp_ops->read_status(hwif);
96
97 if (OK_STAT(stat, DRIVE_READY, drive->bad_wstat | ATA_DRQ)) {
98 if (!dma_stat) {
99 struct request *rq = hwif->rq;
100
101 task_end_request(drive, rq, stat);
102 return ide_stopped;
103 }
104 printk(KERN_ERR "%s: %s: bad DMA status (0x%02x)\n",
105 drive->name, __func__, dma_stat);
106 }
107 return ide_error(drive, "dma_intr", stat);
108 }
109 EXPORT_SYMBOL_GPL(ide_dma_intr);
110
ide_dma_good_drive(ide_drive_t * drive)111 int ide_dma_good_drive(ide_drive_t *drive)
112 {
113 return ide_in_drive_list(drive->id, drive_whitelist);
114 }
115
116 /**
117 * ide_build_sglist - map IDE scatter gather for DMA I/O
118 * @drive: the drive to build the DMA table for
119 * @rq: the request holding the sg list
120 *
121 * Perform the DMA mapping magic necessary to access the source or
122 * target buffers of a request via DMA. The lower layers of the
123 * kernel provide the necessary cache management so that we can
124 * operate in a portable fashion.
125 */
126
ide_build_sglist(ide_drive_t * drive,struct request * rq)127 int ide_build_sglist(ide_drive_t *drive, struct request *rq)
128 {
129 ide_hwif_t *hwif = drive->hwif;
130 struct scatterlist *sg = hwif->sg_table;
131 int i;
132
133 ide_map_sg(drive, rq);
134
135 if (rq_data_dir(rq) == READ)
136 hwif->sg_dma_direction = DMA_FROM_DEVICE;
137 else
138 hwif->sg_dma_direction = DMA_TO_DEVICE;
139
140 i = dma_map_sg(hwif->dev, sg, hwif->sg_nents, hwif->sg_dma_direction);
141 if (i) {
142 hwif->orig_sg_nents = hwif->sg_nents;
143 hwif->sg_nents = i;
144 }
145
146 return i;
147 }
148 EXPORT_SYMBOL_GPL(ide_build_sglist);
149
150 /**
151 * ide_destroy_dmatable - clean up DMA mapping
152 * @drive: The drive to unmap
153 *
154 * Teardown mappings after DMA has completed. This must be called
155 * after the completion of each use of ide_build_dmatable and before
156 * the next use of ide_build_dmatable. Failure to do so will cause
157 * an oops as only one mapping can be live for each target at a given
158 * time.
159 */
160
ide_destroy_dmatable(ide_drive_t * drive)161 void ide_destroy_dmatable(ide_drive_t *drive)
162 {
163 ide_hwif_t *hwif = drive->hwif;
164
165 dma_unmap_sg(hwif->dev, hwif->sg_table, hwif->orig_sg_nents,
166 hwif->sg_dma_direction);
167 }
168 EXPORT_SYMBOL_GPL(ide_destroy_dmatable);
169
170 /**
171 * ide_dma_off_quietly - Generic DMA kill
172 * @drive: drive to control
173 *
174 * Turn off the current DMA on this IDE controller.
175 */
176
ide_dma_off_quietly(ide_drive_t * drive)177 void ide_dma_off_quietly(ide_drive_t *drive)
178 {
179 drive->dev_flags &= ~IDE_DFLAG_USING_DMA;
180 ide_toggle_bounce(drive, 0);
181
182 drive->hwif->dma_ops->dma_host_set(drive, 0);
183 }
184 EXPORT_SYMBOL(ide_dma_off_quietly);
185
186 /**
187 * ide_dma_off - disable DMA on a device
188 * @drive: drive to disable DMA on
189 *
190 * Disable IDE DMA for a device on this IDE controller.
191 * Inform the user that DMA has been disabled.
192 */
193
ide_dma_off(ide_drive_t * drive)194 void ide_dma_off(ide_drive_t *drive)
195 {
196 printk(KERN_INFO "%s: DMA disabled\n", drive->name);
197 ide_dma_off_quietly(drive);
198 }
199 EXPORT_SYMBOL(ide_dma_off);
200
201 /**
202 * ide_dma_on - Enable DMA on a device
203 * @drive: drive to enable DMA on
204 *
205 * Enable IDE DMA for a device on this IDE controller.
206 */
207
ide_dma_on(ide_drive_t * drive)208 void ide_dma_on(ide_drive_t *drive)
209 {
210 drive->dev_flags |= IDE_DFLAG_USING_DMA;
211 ide_toggle_bounce(drive, 1);
212
213 drive->hwif->dma_ops->dma_host_set(drive, 1);
214 }
215
__ide_dma_bad_drive(ide_drive_t * drive)216 int __ide_dma_bad_drive(ide_drive_t *drive)
217 {
218 u16 *id = drive->id;
219
220 int blacklist = ide_in_drive_list(id, drive_blacklist);
221 if (blacklist) {
222 printk(KERN_WARNING "%s: Disabling (U)DMA for %s (blacklisted)\n",
223 drive->name, (char *)&id[ATA_ID_PROD]);
224 return blacklist;
225 }
226 return 0;
227 }
228 EXPORT_SYMBOL(__ide_dma_bad_drive);
229
230 static const u8 xfer_mode_bases[] = {
231 XFER_UDMA_0,
232 XFER_MW_DMA_0,
233 XFER_SW_DMA_0,
234 };
235
ide_get_mode_mask(ide_drive_t * drive,u8 base,u8 req_mode)236 static unsigned int ide_get_mode_mask(ide_drive_t *drive, u8 base, u8 req_mode)
237 {
238 u16 *id = drive->id;
239 ide_hwif_t *hwif = drive->hwif;
240 const struct ide_port_ops *port_ops = hwif->port_ops;
241 unsigned int mask = 0;
242
243 switch (base) {
244 case XFER_UDMA_0:
245 if ((id[ATA_ID_FIELD_VALID] & 4) == 0)
246 break;
247
248 if (port_ops && port_ops->udma_filter)
249 mask = port_ops->udma_filter(drive);
250 else
251 mask = hwif->ultra_mask;
252 mask &= id[ATA_ID_UDMA_MODES];
253
254 /*
255 * avoid false cable warning from eighty_ninty_three()
256 */
257 if (req_mode > XFER_UDMA_2) {
258 if ((mask & 0x78) && (eighty_ninty_three(drive) == 0))
259 mask &= 0x07;
260 }
261 break;
262 case XFER_MW_DMA_0:
263 if ((id[ATA_ID_FIELD_VALID] & 2) == 0)
264 break;
265 if (port_ops && port_ops->mdma_filter)
266 mask = port_ops->mdma_filter(drive);
267 else
268 mask = hwif->mwdma_mask;
269 mask &= id[ATA_ID_MWDMA_MODES];
270 break;
271 case XFER_SW_DMA_0:
272 if (id[ATA_ID_FIELD_VALID] & 2) {
273 mask = id[ATA_ID_SWDMA_MODES] & hwif->swdma_mask;
274 } else if (id[ATA_ID_OLD_DMA_MODES] >> 8) {
275 u8 mode = id[ATA_ID_OLD_DMA_MODES] >> 8;
276
277 /*
278 * if the mode is valid convert it to the mask
279 * (the maximum allowed mode is XFER_SW_DMA_2)
280 */
281 if (mode <= 2)
282 mask = ((2 << mode) - 1) & hwif->swdma_mask;
283 }
284 break;
285 default:
286 BUG();
287 break;
288 }
289
290 return mask;
291 }
292
293 /**
294 * ide_find_dma_mode - compute DMA speed
295 * @drive: IDE device
296 * @req_mode: requested mode
297 *
298 * Checks the drive/host capabilities and finds the speed to use for
299 * the DMA transfer. The speed is then limited by the requested mode.
300 *
301 * Returns 0 if the drive/host combination is incapable of DMA transfers
302 * or if the requested mode is not a DMA mode.
303 */
304
ide_find_dma_mode(ide_drive_t * drive,u8 req_mode)305 u8 ide_find_dma_mode(ide_drive_t *drive, u8 req_mode)
306 {
307 ide_hwif_t *hwif = drive->hwif;
308 unsigned int mask;
309 int x, i;
310 u8 mode = 0;
311
312 if (drive->media != ide_disk) {
313 if (hwif->host_flags & IDE_HFLAG_NO_ATAPI_DMA)
314 return 0;
315 }
316
317 for (i = 0; i < ARRAY_SIZE(xfer_mode_bases); i++) {
318 if (req_mode < xfer_mode_bases[i])
319 continue;
320 mask = ide_get_mode_mask(drive, xfer_mode_bases[i], req_mode);
321 x = fls(mask) - 1;
322 if (x >= 0) {
323 mode = xfer_mode_bases[i] + x;
324 break;
325 }
326 }
327
328 if (hwif->chipset == ide_acorn && mode == 0) {
329 /*
330 * is this correct?
331 */
332 if (ide_dma_good_drive(drive) &&
333 drive->id[ATA_ID_EIDE_DMA_TIME] < 150)
334 mode = XFER_MW_DMA_1;
335 }
336
337 mode = min(mode, req_mode);
338
339 printk(KERN_INFO "%s: %s mode selected\n", drive->name,
340 mode ? ide_xfer_verbose(mode) : "no DMA");
341
342 return mode;
343 }
344 EXPORT_SYMBOL_GPL(ide_find_dma_mode);
345
ide_tune_dma(ide_drive_t * drive)346 static int ide_tune_dma(ide_drive_t *drive)
347 {
348 ide_hwif_t *hwif = drive->hwif;
349 u8 speed;
350
351 if (ata_id_has_dma(drive->id) == 0 ||
352 (drive->dev_flags & IDE_DFLAG_NODMA))
353 return 0;
354
355 /* consult the list of known "bad" drives */
356 if (__ide_dma_bad_drive(drive))
357 return 0;
358
359 if (ide_id_dma_bug(drive))
360 return 0;
361
362 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
363 return config_drive_for_dma(drive);
364
365 speed = ide_max_dma_mode(drive);
366
367 if (!speed)
368 return 0;
369
370 if (ide_set_dma_mode(drive, speed))
371 return 0;
372
373 return 1;
374 }
375
ide_dma_check(ide_drive_t * drive)376 static int ide_dma_check(ide_drive_t *drive)
377 {
378 ide_hwif_t *hwif = drive->hwif;
379
380 if (ide_tune_dma(drive))
381 return 0;
382
383 /* TODO: always do PIO fallback */
384 if (hwif->host_flags & IDE_HFLAG_TRUST_BIOS_FOR_DMA)
385 return -1;
386
387 ide_set_max_pio(drive);
388
389 return -1;
390 }
391
ide_id_dma_bug(ide_drive_t * drive)392 int ide_id_dma_bug(ide_drive_t *drive)
393 {
394 u16 *id = drive->id;
395
396 if (id[ATA_ID_FIELD_VALID] & 4) {
397 if ((id[ATA_ID_UDMA_MODES] >> 8) &&
398 (id[ATA_ID_MWDMA_MODES] >> 8))
399 goto err_out;
400 } else if (id[ATA_ID_FIELD_VALID] & 2) {
401 if ((id[ATA_ID_MWDMA_MODES] >> 8) &&
402 (id[ATA_ID_SWDMA_MODES] >> 8))
403 goto err_out;
404 }
405 return 0;
406 err_out:
407 printk(KERN_ERR "%s: bad DMA info in identify block\n", drive->name);
408 return 1;
409 }
410
ide_set_dma(ide_drive_t * drive)411 int ide_set_dma(ide_drive_t *drive)
412 {
413 int rc;
414
415 /*
416 * Force DMAing for the beginning of the check.
417 * Some chipsets appear to do interesting
418 * things, if not checked and cleared.
419 * PARANOIA!!!
420 */
421 ide_dma_off_quietly(drive);
422
423 rc = ide_dma_check(drive);
424 if (rc)
425 return rc;
426
427 ide_dma_on(drive);
428
429 return 0;
430 }
431
ide_check_dma_crc(ide_drive_t * drive)432 void ide_check_dma_crc(ide_drive_t *drive)
433 {
434 u8 mode;
435
436 ide_dma_off_quietly(drive);
437 drive->crc_count = 0;
438 mode = drive->current_speed;
439 /*
440 * Don't try non Ultra-DMA modes without iCRC's. Force the
441 * device to PIO and make the user enable SWDMA/MWDMA modes.
442 */
443 if (mode > XFER_UDMA_0 && mode <= XFER_UDMA_7)
444 mode--;
445 else
446 mode = XFER_PIO_4;
447 ide_set_xfer_rate(drive, mode);
448 if (drive->current_speed >= XFER_SW_DMA_0)
449 ide_dma_on(drive);
450 }
451
ide_dma_lost_irq(ide_drive_t * drive)452 void ide_dma_lost_irq(ide_drive_t *drive)
453 {
454 printk(KERN_ERR "%s: DMA interrupt recovery\n", drive->name);
455 }
456 EXPORT_SYMBOL_GPL(ide_dma_lost_irq);
457
ide_dma_timeout(ide_drive_t * drive)458 void ide_dma_timeout(ide_drive_t *drive)
459 {
460 ide_hwif_t *hwif = drive->hwif;
461
462 printk(KERN_ERR "%s: timeout waiting for DMA\n", drive->name);
463
464 if (hwif->dma_ops->dma_test_irq(drive))
465 return;
466
467 ide_dump_status(drive, "DMA timeout", hwif->tp_ops->read_status(hwif));
468
469 hwif->dma_ops->dma_end(drive);
470 }
471 EXPORT_SYMBOL_GPL(ide_dma_timeout);
472
ide_release_dma_engine(ide_hwif_t * hwif)473 void ide_release_dma_engine(ide_hwif_t *hwif)
474 {
475 if (hwif->dmatable_cpu) {
476 int prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
477
478 dma_free_coherent(hwif->dev, prd_size,
479 hwif->dmatable_cpu, hwif->dmatable_dma);
480 hwif->dmatable_cpu = NULL;
481 }
482 }
483 EXPORT_SYMBOL_GPL(ide_release_dma_engine);
484
ide_allocate_dma_engine(ide_hwif_t * hwif)485 int ide_allocate_dma_engine(ide_hwif_t *hwif)
486 {
487 int prd_size;
488
489 if (hwif->prd_max_nents == 0)
490 hwif->prd_max_nents = PRD_ENTRIES;
491 if (hwif->prd_ent_size == 0)
492 hwif->prd_ent_size = PRD_BYTES;
493
494 prd_size = hwif->prd_max_nents * hwif->prd_ent_size;
495
496 hwif->dmatable_cpu = dma_alloc_coherent(hwif->dev, prd_size,
497 &hwif->dmatable_dma,
498 GFP_ATOMIC);
499 if (hwif->dmatable_cpu == NULL) {
500 printk(KERN_ERR "%s: unable to allocate PRD table\n",
501 hwif->name);
502 return -ENOMEM;
503 }
504
505 return 0;
506 }
507 EXPORT_SYMBOL_GPL(ide_allocate_dma_engine);
508