1 /*
2 * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
3 */
4
5 /*
6 * Version 0.03 Cleaned auto-tune, added probe
7 * Version 0.04 Added second channel tuning
8 * Version 0.05 Enhanced tuning ; added qd6500 support
9 * Version 0.06 Added dos driver's list
10 * Version 0.07 Second channel bug fix
11 *
12 * QDI QD6500/QD6580 EIDE controller fast support
13 *
14 * To activate controller support, use "ide0=qd65xx"
15 */
16
17 /*
18 * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
19 * Samuel Thibault <samuel.thibault@ens-lyon.org>
20 */
21
22 #include <linux/module.h>
23 #include <linux/types.h>
24 #include <linux/kernel.h>
25 #include <linux/delay.h>
26 #include <linux/timer.h>
27 #include <linux/mm.h>
28 #include <linux/ioport.h>
29 #include <linux/blkdev.h>
30 #include <linux/ide.h>
31 #include <linux/init.h>
32 #include <asm/system.h>
33 #include <asm/io.h>
34
35 #define DRV_NAME "qd65xx"
36
37 #include "qd65xx.h"
38
39 /*
40 * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
41 * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
42 * -- qd6500 is a single IDE interface
43 * -- qd6580 is a dual IDE interface
44 *
45 * More research on qd6580 being done by willmore@cig.mot.com (David)
46 * More Information given by Petr Soucek (petr@ryston.cz)
47 * http://www.ryston.cz/petr/vlb
48 */
49
50 /*
51 * base: Timer1
52 *
53 *
54 * base+0x01: Config (R/O)
55 *
56 * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
57 * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
58 * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
59 * bit 3: qd6500: 1 = disabled, 0 = enabled
60 * qd6580: 1
61 * upper nibble:
62 * qd6500: 1100
63 * qd6580: either 1010 or 0101
64 *
65 *
66 * base+0x02: Timer2 (qd6580 only)
67 *
68 *
69 * base+0x03: Control (qd6580 only)
70 *
71 * bits 0-3 must always be set 1
72 * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
73 * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
74 * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
75 * channel 1 for hdc & hdd
76 * bit 1 : 1 = only disks on primary port
77 * 0 = disks & ATAPI devices on primary port
78 * bit 2-4 : always 0
79 * bit 5 : status, but of what ?
80 * bit 6 : always set 1 by dos driver
81 * bit 7 : set 1 for non-ATAPI devices on primary port
82 * (maybe read-ahead and post-write buffer ?)
83 */
84
85 static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
86
87 /*
88 * qd65xx_select:
89 *
90 * This routine is invoked to prepare for access to a given drive.
91 */
92
qd65xx_select(ide_drive_t * drive)93 static void qd65xx_select(ide_drive_t *drive)
94 {
95 u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
96 (QD_TIMREG(drive) & 0x02);
97
98 if (timings[index] != QD_TIMING(drive))
99 outb(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
100 }
101
102 /*
103 * qd6500_compute_timing
104 *
105 * computes the timing value where
106 * lower nibble represents active time, in count of VLB clocks
107 * upper nibble represents recovery time, in count of VLB clocks
108 */
109
qd6500_compute_timing(ide_hwif_t * hwif,int active_time,int recovery_time)110 static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
111 {
112 int clk = ide_vlb_clk ? ide_vlb_clk : 50;
113 u8 act_cyc, rec_cyc;
114
115 if (clk <= 33) {
116 act_cyc = 9 - IDE_IN(active_time * clk / 1000 + 1, 2, 9);
117 rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 0, 15);
118 } else {
119 act_cyc = 8 - IDE_IN(active_time * clk / 1000 + 1, 1, 8);
120 rec_cyc = 18 - IDE_IN(recovery_time * clk / 1000 + 1, 3, 18);
121 }
122
123 return (rec_cyc << 4) | 0x08 | act_cyc;
124 }
125
126 /*
127 * qd6580_compute_timing
128 *
129 * idem for qd6580
130 */
131
qd6580_compute_timing(int active_time,int recovery_time)132 static u8 qd6580_compute_timing (int active_time, int recovery_time)
133 {
134 int clk = ide_vlb_clk ? ide_vlb_clk : 50;
135 u8 act_cyc, rec_cyc;
136
137 act_cyc = 17 - IDE_IN(active_time * clk / 1000 + 1, 2, 17);
138 rec_cyc = 15 - IDE_IN(recovery_time * clk / 1000 + 1, 2, 15);
139
140 return (rec_cyc << 4) | act_cyc;
141 }
142
143 /*
144 * qd_find_disk_type
145 *
146 * tries to find timing from dos driver's table
147 */
148
qd_find_disk_type(ide_drive_t * drive,int * active_time,int * recovery_time)149 static int qd_find_disk_type (ide_drive_t *drive,
150 int *active_time, int *recovery_time)
151 {
152 struct qd65xx_timing_s *p;
153 char *m = (char *)&drive->id[ATA_ID_PROD];
154 char model[ATA_ID_PROD_LEN];
155
156 if (*m == 0)
157 return 0;
158
159 strncpy(model, m, ATA_ID_PROD_LEN);
160 ide_fixstring(model, ATA_ID_PROD_LEN, 1); /* byte-swap */
161
162 for (p = qd65xx_timing ; p->offset != -1 ; p++) {
163 if (!strncmp(p->model, model+p->offset, 4)) {
164 printk(KERN_DEBUG "%s: listed !\n", drive->name);
165 *active_time = p->active;
166 *recovery_time = p->recovery;
167 return 1;
168 }
169 }
170 return 0;
171 }
172
173 /*
174 * qd_set_timing:
175 *
176 * records the timing
177 */
178
qd_set_timing(ide_drive_t * drive,u8 timing)179 static void qd_set_timing (ide_drive_t *drive, u8 timing)
180 {
181 drive->drive_data &= 0xff00;
182 drive->drive_data |= timing;
183
184 printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
185 }
186
qd6500_set_pio_mode(ide_drive_t * drive,const u8 pio)187 static void qd6500_set_pio_mode(ide_drive_t *drive, const u8 pio)
188 {
189 u16 *id = drive->id;
190 int active_time = 175;
191 int recovery_time = 415; /* worst case values from the dos driver */
192
193 /*
194 * FIXME: use "pio" value
195 */
196 if (!qd_find_disk_type(drive, &active_time, &recovery_time) &&
197 (id[ATA_ID_OLD_PIO_MODES] & 0xff) && (id[ATA_ID_FIELD_VALID] & 2) &&
198 id[ATA_ID_EIDE_PIO] >= 240) {
199 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
200 id[ATA_ID_OLD_PIO_MODES] & 0xff);
201 active_time = 110;
202 recovery_time = drive->id[ATA_ID_EIDE_PIO] - 120;
203 }
204
205 qd_set_timing(drive, qd6500_compute_timing(drive->hwif,
206 active_time, recovery_time));
207 }
208
qd6580_set_pio_mode(ide_drive_t * drive,const u8 pio)209 static void qd6580_set_pio_mode(ide_drive_t *drive, const u8 pio)
210 {
211 ide_hwif_t *hwif = drive->hwif;
212 struct ide_timing *t = ide_timing_find_mode(XFER_PIO_0 + pio);
213 unsigned int cycle_time;
214 int active_time = 175;
215 int recovery_time = 415; /* worst case values from the dos driver */
216 u8 base = (hwif->config_data & 0xff00) >> 8;
217
218 if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
219 cycle_time = ide_pio_cycle_time(drive, pio);
220
221 switch (pio) {
222 case 0: break;
223 case 3:
224 if (cycle_time >= 110) {
225 active_time = 86;
226 recovery_time = cycle_time - 102;
227 } else
228 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
229 break;
230 case 4:
231 if (cycle_time >= 69) {
232 active_time = 70;
233 recovery_time = cycle_time - 61;
234 } else
235 printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
236 break;
237 default:
238 if (cycle_time >= 180) {
239 active_time = 110;
240 recovery_time = cycle_time - 120;
241 } else {
242 active_time = t->active;
243 recovery_time = cycle_time - active_time;
244 }
245 }
246 printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
247 }
248
249 if (!hwif->channel && drive->media != ide_disk) {
250 outb(0x5f, QD_CONTROL_PORT);
251 printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
252 "and post-write buffer on %s.\n",
253 drive->name, hwif->name);
254 }
255
256 qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
257 }
258
259 /*
260 * qd_testreg
261 *
262 * tests if the given port is a register
263 */
264
qd_testreg(int port)265 static int __init qd_testreg(int port)
266 {
267 unsigned long flags;
268 u8 savereg, readreg;
269
270 local_irq_save(flags);
271 savereg = inb_p(port);
272 outb_p(QD_TESTVAL, port); /* safe value */
273 readreg = inb_p(port);
274 outb(savereg, port);
275 local_irq_restore(flags);
276
277 if (savereg == QD_TESTVAL) {
278 printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
279 printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
280 printk(KERN_ERR "Assuming qd65xx is not present.\n");
281 return 1;
282 }
283
284 return (readreg != QD_TESTVAL);
285 }
286
qd6500_init_dev(ide_drive_t * drive)287 static void __init qd6500_init_dev(ide_drive_t *drive)
288 {
289 ide_hwif_t *hwif = drive->hwif;
290 u8 base = (hwif->config_data & 0xff00) >> 8;
291 u8 config = QD_CONFIG(hwif);
292
293 drive->drive_data = QD6500_DEF_DATA;
294 }
295
qd6580_init_dev(ide_drive_t * drive)296 static void __init qd6580_init_dev(ide_drive_t *drive)
297 {
298 ide_hwif_t *hwif = drive->hwif;
299 u16 t1, t2;
300 u8 base = (hwif->config_data & 0xff00) >> 8;
301 u8 config = QD_CONFIG(hwif);
302
303 if (hwif->host_flags & IDE_HFLAG_SINGLE) {
304 t1 = QD6580_DEF_DATA;
305 t2 = QD6580_DEF_DATA2;
306 } else
307 t2 = t1 = hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA;
308
309 drive->drive_data = (drive->dn & 1) ? t2 : t1;
310 }
311
312 static const struct ide_port_ops qd6500_port_ops = {
313 .init_dev = qd6500_init_dev,
314 .set_pio_mode = qd6500_set_pio_mode,
315 .selectproc = qd65xx_select,
316 };
317
318 static const struct ide_port_ops qd6580_port_ops = {
319 .init_dev = qd6580_init_dev,
320 .set_pio_mode = qd6580_set_pio_mode,
321 .selectproc = qd65xx_select,
322 };
323
324 static const struct ide_port_info qd65xx_port_info __initdata = {
325 .name = DRV_NAME,
326 .chipset = ide_qd65xx,
327 .host_flags = IDE_HFLAG_IO_32BIT |
328 IDE_HFLAG_NO_DMA,
329 .pio_mask = ATA_PIO4,
330 };
331
332 /*
333 * qd_probe:
334 *
335 * looks at the specified baseport, and if qd found, registers & initialises it
336 * return 1 if another qd may be probed
337 */
338
qd_probe(int base)339 static int __init qd_probe(int base)
340 {
341 int rc;
342 u8 config, unit, control;
343 struct ide_port_info d = qd65xx_port_info;
344
345 config = inb(QD_CONFIG_PORT);
346
347 if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
348 return -ENODEV;
349
350 unit = ! (config & QD_CONFIG_IDE_BASEPORT);
351
352 if (unit)
353 d.host_flags |= IDE_HFLAG_QD_2ND_PORT;
354
355 switch (config & 0xf0) {
356 case QD_CONFIG_QD6500:
357 if (qd_testreg(base))
358 return -ENODEV; /* bad register */
359
360 if (config & QD_CONFIG_DISABLED) {
361 printk(KERN_WARNING "qd6500 is disabled !\n");
362 return -ENODEV;
363 }
364
365 printk(KERN_NOTICE "qd6500 at %#x\n", base);
366 printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
367 config, QD_ID3);
368
369 d.port_ops = &qd6500_port_ops;
370 d.host_flags |= IDE_HFLAG_SINGLE;
371 break;
372 case QD_CONFIG_QD6580_A:
373 case QD_CONFIG_QD6580_B:
374 if (qd_testreg(base) || qd_testreg(base + 0x02))
375 return -ENODEV; /* bad registers */
376
377 control = inb(QD_CONTROL_PORT);
378
379 printk(KERN_NOTICE "qd6580 at %#x\n", base);
380 printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
381 config, control, QD_ID3);
382
383 outb(QD_DEF_CONTR, QD_CONTROL_PORT);
384
385 d.port_ops = &qd6580_port_ops;
386 if (control & QD_CONTR_SEC_DISABLED)
387 d.host_flags |= IDE_HFLAG_SINGLE;
388
389 printk(KERN_INFO "qd6580: %s IDE board\n",
390 (control & QD_CONTR_SEC_DISABLED) ? "single" : "dual");
391 break;
392 default:
393 return -ENODEV;
394 }
395
396 rc = ide_legacy_device_add(&d, (base << 8) | config);
397
398 if (d.host_flags & IDE_HFLAG_SINGLE)
399 return (rc == 0) ? 1 : rc;
400
401 return rc;
402 }
403
404 static int probe_qd65xx;
405
406 module_param_named(probe, probe_qd65xx, bool, 0);
407 MODULE_PARM_DESC(probe, "probe for QD65xx chipsets");
408
qd65xx_init(void)409 static int __init qd65xx_init(void)
410 {
411 int rc1, rc2 = -ENODEV;
412
413 if (probe_qd65xx == 0)
414 return -ENODEV;
415
416 rc1 = qd_probe(0x30);
417 if (rc1)
418 rc2 = qd_probe(0xb0);
419
420 if (rc1 < 0 && rc2 < 0)
421 return -ENODEV;
422
423 return 0;
424 }
425
426 module_init(qd65xx_init);
427
428 MODULE_AUTHOR("Samuel Thibault");
429 MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
430 MODULE_LICENSE("GPL");
431