1 /*
2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 1995-1998 Mark Lord
4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
5 *
6 * May be copied or modified under the terms of the GNU General Public License
7 */
8
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/ide.h>
15 #include <linux/dma-mapping.h>
16
17 #include <asm/io.h>
18
19 /**
20 * ide_setup_pci_baseregs - place a PCI IDE controller native
21 * @dev: PCI device of interface to switch native
22 * @name: Name of interface
23 *
24 * We attempt to place the PCI interface into PCI native mode. If
25 * we succeed the BARs are ok and the controller is in PCI mode.
26 * Returns 0 on success or an errno code.
27 *
28 * FIXME: if we program the interface and then fail to set the BARS
29 * we don't switch it back to legacy mode. Do we actually care ??
30 */
31
ide_setup_pci_baseregs(struct pci_dev * dev,const char * name)32 static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name)
33 {
34 u8 progif = 0;
35
36 /*
37 * Place both IDE interfaces into PCI "native" mode:
38 */
39 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
40 (progif & 5) != 5) {
41 if ((progif & 0xa) != 0xa) {
42 printk(KERN_INFO "%s %s: device not capable of full "
43 "native PCI mode\n", name, pci_name(dev));
44 return -EOPNOTSUPP;
45 }
46 printk(KERN_INFO "%s %s: placing both ports into native PCI "
47 "mode\n", name, pci_name(dev));
48 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
49 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
50 (progif & 5) != 5) {
51 printk(KERN_ERR "%s %s: rewrite of PROGIF failed, "
52 "wanted 0x%04x, got 0x%04x\n",
53 name, pci_name(dev), progif | 5, progif);
54 return -EOPNOTSUPP;
55 }
56 }
57 return 0;
58 }
59
60 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
ide_pci_clear_simplex(unsigned long dma_base,const char * name)61 static int ide_pci_clear_simplex(unsigned long dma_base, const char *name)
62 {
63 u8 dma_stat = inb(dma_base + 2);
64
65 outb(dma_stat & 0x60, dma_base + 2);
66 dma_stat = inb(dma_base + 2);
67
68 return (dma_stat & 0x80) ? 1 : 0;
69 }
70
71 /**
72 * ide_pci_dma_base - setup BMIBA
73 * @hwif: IDE interface
74 * @d: IDE port info
75 *
76 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
77 */
78
ide_pci_dma_base(ide_hwif_t * hwif,const struct ide_port_info * d)79 unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d)
80 {
81 struct pci_dev *dev = to_pci_dev(hwif->dev);
82 unsigned long dma_base = 0;
83
84 if (hwif->host_flags & IDE_HFLAG_MMIO)
85 return hwif->dma_base;
86
87 if (hwif->mate && hwif->mate->dma_base) {
88 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
89 } else {
90 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
91
92 dma_base = pci_resource_start(dev, baridx);
93
94 if (dma_base == 0) {
95 printk(KERN_ERR "%s %s: DMA base is invalid\n",
96 d->name, pci_name(dev));
97 return 0;
98 }
99 }
100
101 if (hwif->channel)
102 dma_base += 8;
103
104 return dma_base;
105 }
106 EXPORT_SYMBOL_GPL(ide_pci_dma_base);
107
ide_pci_check_simplex(ide_hwif_t * hwif,const struct ide_port_info * d)108 int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d)
109 {
110 struct pci_dev *dev = to_pci_dev(hwif->dev);
111 u8 dma_stat;
112
113 if (d->host_flags & (IDE_HFLAG_MMIO | IDE_HFLAG_CS5520))
114 goto out;
115
116 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) {
117 if (ide_pci_clear_simplex(hwif->dma_base, d->name))
118 printk(KERN_INFO "%s %s: simplex device: DMA forced\n",
119 d->name, pci_name(dev));
120 goto out;
121 }
122
123 /*
124 * If the device claims "simplex" DMA, this means that only one of
125 * the two interfaces can be trusted with DMA at any point in time
126 * (so we should enable DMA only on one of the two interfaces).
127 *
128 * FIXME: At this point we haven't probed the drives so we can't make
129 * the appropriate decision. Really we should defer this problem until
130 * we tune the drive then try to grab DMA ownership if we want to be
131 * the DMA end. This has to be become dynamic to handle hot-plug.
132 */
133 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
134 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
135 printk(KERN_INFO "%s %s: simplex device: DMA disabled\n",
136 d->name, pci_name(dev));
137 return -1;
138 }
139 out:
140 return 0;
141 }
142 EXPORT_SYMBOL_GPL(ide_pci_check_simplex);
143
144 /*
145 * Set up BM-DMA capability (PnP BIOS should have done this)
146 */
ide_pci_set_master(struct pci_dev * dev,const char * name)147 int ide_pci_set_master(struct pci_dev *dev, const char *name)
148 {
149 u16 pcicmd;
150
151 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
152
153 if ((pcicmd & PCI_COMMAND_MASTER) == 0) {
154 pci_set_master(dev);
155
156 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) ||
157 (pcicmd & PCI_COMMAND_MASTER) == 0) {
158 printk(KERN_ERR "%s %s: error updating PCICMD\n",
159 name, pci_name(dev));
160 return -EIO;
161 }
162 }
163
164 return 0;
165 }
166 EXPORT_SYMBOL_GPL(ide_pci_set_master);
167 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
168
ide_setup_pci_noise(struct pci_dev * dev,const struct ide_port_info * d)169 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
170 {
171 printk(KERN_INFO "%s %s: IDE controller (0x%04x:0x%04x rev 0x%02x)\n",
172 d->name, pci_name(dev),
173 dev->vendor, dev->device, dev->revision);
174 }
175 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
176
177
178 /**
179 * ide_pci_enable - do PCI enables
180 * @dev: PCI device
181 * @d: IDE port info
182 *
183 * Enable the IDE PCI device. We attempt to enable the device in full
184 * but if that fails then we only need IO space. The PCI code should
185 * have setup the proper resources for us already for controllers in
186 * legacy mode.
187 *
188 * Returns zero on success or an error code
189 */
190
ide_pci_enable(struct pci_dev * dev,const struct ide_port_info * d)191 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
192 {
193 int ret, bars;
194
195 if (pci_enable_device(dev)) {
196 ret = pci_enable_device_io(dev);
197 if (ret < 0) {
198 printk(KERN_WARNING "%s %s: couldn't enable device\n",
199 d->name, pci_name(dev));
200 goto out;
201 }
202 printk(KERN_WARNING "%s %s: BIOS configuration fixed\n",
203 d->name, pci_name(dev));
204 }
205
206 /*
207 * assume all devices can do 32-bit DMA for now, we can add
208 * a DMA mask field to the struct ide_port_info if we need it
209 * (or let lower level driver set the DMA mask)
210 */
211 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
212 if (ret < 0) {
213 printk(KERN_ERR "%s %s: can't set DMA mask\n",
214 d->name, pci_name(dev));
215 goto out;
216 }
217
218 if (d->host_flags & IDE_HFLAG_SINGLE)
219 bars = (1 << 2) - 1;
220 else
221 bars = (1 << 4) - 1;
222
223 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) {
224 if (d->host_flags & IDE_HFLAG_CS5520)
225 bars |= (1 << 2);
226 else
227 bars |= (1 << 4);
228 }
229
230 ret = pci_request_selected_regions(dev, bars, d->name);
231 if (ret < 0)
232 printk(KERN_ERR "%s %s: can't reserve resources\n",
233 d->name, pci_name(dev));
234 out:
235 return ret;
236 }
237
238 /**
239 * ide_pci_configure - configure an unconfigured device
240 * @dev: PCI device
241 * @d: IDE port info
242 *
243 * Enable and configure the PCI device we have been passed.
244 * Returns zero on success or an error code.
245 */
246
ide_pci_configure(struct pci_dev * dev,const struct ide_port_info * d)247 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
248 {
249 u16 pcicmd = 0;
250 /*
251 * PnP BIOS was *supposed* to have setup this device, but we
252 * can do it ourselves, so long as the BIOS has assigned an IRQ
253 * (or possibly the device is using a "legacy header" for IRQs).
254 * Maybe the user deliberately *disabled* the device,
255 * but we'll eventually ignore it again if no drives respond.
256 */
257 if (ide_setup_pci_baseregs(dev, d->name) ||
258 pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) {
259 printk(KERN_INFO "%s %s: device disabled (BIOS)\n",
260 d->name, pci_name(dev));
261 return -ENODEV;
262 }
263 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
264 printk(KERN_ERR "%s %s: error accessing PCI regs\n",
265 d->name, pci_name(dev));
266 return -EIO;
267 }
268 if (!(pcicmd & PCI_COMMAND_IO)) {
269 printk(KERN_ERR "%s %s: unable to enable IDE controller\n",
270 d->name, pci_name(dev));
271 return -ENXIO;
272 }
273 return 0;
274 }
275
276 /**
277 * ide_pci_check_iomem - check a register is I/O
278 * @dev: PCI device
279 * @d: IDE port info
280 * @bar: BAR number
281 *
282 * Checks if a BAR is configured and points to MMIO space. If so,
283 * return an error code. Otherwise return 0
284 */
285
ide_pci_check_iomem(struct pci_dev * dev,const struct ide_port_info * d,int bar)286 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d,
287 int bar)
288 {
289 ulong flags = pci_resource_flags(dev, bar);
290
291 /* Unconfigured ? */
292 if (!flags || pci_resource_len(dev, bar) == 0)
293 return 0;
294
295 /* I/O space */
296 if (flags & IORESOURCE_IO)
297 return 0;
298
299 /* Bad */
300 return -EINVAL;
301 }
302
303 /**
304 * ide_hw_configure - configure a hw_regs_t instance
305 * @dev: PCI device holding interface
306 * @d: IDE port info
307 * @port: port number
308 * @irq: PCI IRQ
309 * @hw: hw_regs_t instance corresponding to this port
310 *
311 * Perform the initial set up for the hardware interface structure. This
312 * is done per interface port rather than per PCI device. There may be
313 * more than one port per device.
314 *
315 * Returns zero on success or an error code.
316 */
317
ide_hw_configure(struct pci_dev * dev,const struct ide_port_info * d,unsigned int port,int irq,hw_regs_t * hw)318 static int ide_hw_configure(struct pci_dev *dev, const struct ide_port_info *d,
319 unsigned int port, int irq, hw_regs_t *hw)
320 {
321 unsigned long ctl = 0, base = 0;
322
323 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
324 if (ide_pci_check_iomem(dev, d, 2 * port) ||
325 ide_pci_check_iomem(dev, d, 2 * port + 1)) {
326 printk(KERN_ERR "%s %s: I/O baseregs (BIOS) are "
327 "reported as MEM for port %d!\n",
328 d->name, pci_name(dev), port);
329 return -EINVAL;
330 }
331
332 ctl = pci_resource_start(dev, 2*port+1);
333 base = pci_resource_start(dev, 2*port);
334 } else {
335 /* Use default values */
336 ctl = port ? 0x374 : 0x3f4;
337 base = port ? 0x170 : 0x1f0;
338 }
339
340 if (!base || !ctl) {
341 printk(KERN_ERR "%s %s: bad PCI BARs for port %d, skipping\n",
342 d->name, pci_name(dev), port);
343 return -EINVAL;
344 }
345
346 memset(hw, 0, sizeof(*hw));
347 hw->irq = irq;
348 hw->dev = &dev->dev;
349 hw->chipset = d->chipset ? d->chipset : ide_pci;
350 ide_std_init_ports(hw, base, ctl | 2);
351
352 return 0;
353 }
354
355 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
356 /**
357 * ide_hwif_setup_dma - configure DMA interface
358 * @hwif: IDE interface
359 * @d: IDE port info
360 *
361 * Set up the DMA base for the interface. Enable the master bits as
362 * necessary and attempt to bring the device DMA into a ready to use
363 * state
364 */
365
ide_hwif_setup_dma(ide_hwif_t * hwif,const struct ide_port_info * d)366 int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
367 {
368 struct pci_dev *dev = to_pci_dev(hwif->dev);
369
370 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
371 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
372 (dev->class & 0x80))) {
373 unsigned long base = ide_pci_dma_base(hwif, d);
374
375 if (base == 0)
376 return -1;
377
378 hwif->dma_base = base;
379
380 if (hwif->dma_ops == NULL)
381 hwif->dma_ops = &sff_dma_ops;
382
383 if (ide_pci_check_simplex(hwif, d) < 0)
384 return -1;
385
386 if (ide_pci_set_master(dev, d->name) < 0)
387 return -1;
388
389 if (hwif->host_flags & IDE_HFLAG_MMIO)
390 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
391 else
392 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
393 hwif->name, base, base + 7);
394
395 hwif->extra_base = base + (hwif->channel ? 8 : 16);
396
397 if (ide_allocate_dma_engine(hwif))
398 return -1;
399 }
400
401 return 0;
402 }
403 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
404
405 /**
406 * ide_setup_pci_controller - set up IDE PCI
407 * @dev: PCI device
408 * @d: IDE port info
409 * @noisy: verbose flag
410 *
411 * Set up the PCI and controller side of the IDE interface. This brings
412 * up the PCI side of the device, checks that the device is enabled
413 * and enables it if need be
414 */
415
ide_setup_pci_controller(struct pci_dev * dev,const struct ide_port_info * d,int noisy)416 static int ide_setup_pci_controller(struct pci_dev *dev,
417 const struct ide_port_info *d, int noisy)
418 {
419 int ret;
420 u16 pcicmd;
421
422 if (noisy)
423 ide_setup_pci_noise(dev, d);
424
425 ret = ide_pci_enable(dev, d);
426 if (ret < 0)
427 goto out;
428
429 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
430 if (ret < 0) {
431 printk(KERN_ERR "%s %s: error accessing PCI regs\n",
432 d->name, pci_name(dev));
433 goto out;
434 }
435 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
436 ret = ide_pci_configure(dev, d);
437 if (ret < 0)
438 goto out;
439 printk(KERN_INFO "%s %s: device enabled (Linux)\n",
440 d->name, pci_name(dev));
441 }
442
443 out:
444 return ret;
445 }
446
447 /**
448 * ide_pci_setup_ports - configure ports/devices on PCI IDE
449 * @dev: PCI device
450 * @d: IDE port info
451 * @pciirq: IRQ line
452 * @hw: hw_regs_t instances corresponding to this PCI IDE device
453 * @hws: hw_regs_t pointers table to update
454 *
455 * Scan the interfaces attached to this device and do any
456 * necessary per port setup. Attach the devices and ask the
457 * generic DMA layer to do its work for us.
458 *
459 * Normally called automaticall from do_ide_pci_setup_device,
460 * but is also used directly as a helper function by some controllers
461 * where the chipset setup is not the default PCI IDE one.
462 */
463
ide_pci_setup_ports(struct pci_dev * dev,const struct ide_port_info * d,int pciirq,hw_regs_t * hw,hw_regs_t ** hws)464 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d,
465 int pciirq, hw_regs_t *hw, hw_regs_t **hws)
466 {
467 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
468 u8 tmp;
469
470 /*
471 * Set up the IDE ports
472 */
473
474 for (port = 0; port < channels; ++port) {
475 const struct ide_pci_enablebit *e = &d->enablebits[port];
476
477 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
478 (tmp & e->mask) != e->val)) {
479 printk(KERN_INFO "%s %s: IDE port disabled\n",
480 d->name, pci_name(dev));
481 continue; /* port not enabled */
482 }
483
484 if (ide_hw_configure(dev, d, port, pciirq, hw + port))
485 continue;
486
487 *(hws + port) = hw + port;
488 }
489 }
490 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
491
492 /*
493 * ide_setup_pci_device() looks at the primary/secondary interfaces
494 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
495 * for use with them. This generic code works for most PCI chipsets.
496 *
497 * One thing that is not standardized is the location of the
498 * primary/secondary interface "enable/disable" bits. For chipsets that
499 * we "know" about, this information is in the struct ide_port_info;
500 * for all other chipsets, we just assume both interfaces are enabled.
501 */
do_ide_setup_pci_device(struct pci_dev * dev,const struct ide_port_info * d,u8 noisy)502 static int do_ide_setup_pci_device(struct pci_dev *dev,
503 const struct ide_port_info *d,
504 u8 noisy)
505 {
506 int pciirq, ret;
507
508 /*
509 * Can we trust the reported IRQ?
510 */
511 pciirq = dev->irq;
512
513 /*
514 * This allows offboard ide-pci cards the enable a BIOS,
515 * verify interrupt settings of split-mirror pci-config
516 * space, place chipset into init-mode, and/or preserve
517 * an interrupt if the card is not native ide support.
518 */
519 ret = d->init_chipset ? d->init_chipset(dev) : 0;
520 if (ret < 0)
521 goto out;
522
523 if (ide_pci_is_in_compatibility_mode(dev)) {
524 if (noisy)
525 printk(KERN_INFO "%s %s: not 100%% native mode: will "
526 "probe irqs later\n", d->name, pci_name(dev));
527 pciirq = ret;
528 } else if (!pciirq && noisy) {
529 printk(KERN_WARNING "%s %s: bad irq (%d): will probe later\n",
530 d->name, pci_name(dev), pciirq);
531 } else if (noisy) {
532 printk(KERN_INFO "%s %s: 100%% native mode on irq %d\n",
533 d->name, pci_name(dev), pciirq);
534 }
535
536 ret = pciirq;
537 out:
538 return ret;
539 }
540
ide_pci_init_one(struct pci_dev * dev,const struct ide_port_info * d,void * priv)541 int ide_pci_init_one(struct pci_dev *dev, const struct ide_port_info *d,
542 void *priv)
543 {
544 struct ide_host *host;
545 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
546 int ret;
547
548 ret = ide_setup_pci_controller(dev, d, 1);
549 if (ret < 0)
550 goto out;
551
552 ide_pci_setup_ports(dev, d, 0, &hw[0], &hws[0]);
553
554 host = ide_host_alloc(d, hws);
555 if (host == NULL) {
556 ret = -ENOMEM;
557 goto out;
558 }
559
560 host->dev[0] = &dev->dev;
561
562 host->host_priv = priv;
563
564 pci_set_drvdata(dev, host);
565
566 ret = do_ide_setup_pci_device(dev, d, 1);
567 if (ret < 0)
568 goto out;
569
570 /* fixup IRQ */
571 hw[1].irq = hw[0].irq = ret;
572
573 ret = ide_host_register(host, d, hws);
574 if (ret)
575 ide_host_free(host);
576 out:
577 return ret;
578 }
579 EXPORT_SYMBOL_GPL(ide_pci_init_one);
580
ide_pci_init_two(struct pci_dev * dev1,struct pci_dev * dev2,const struct ide_port_info * d,void * priv)581 int ide_pci_init_two(struct pci_dev *dev1, struct pci_dev *dev2,
582 const struct ide_port_info *d, void *priv)
583 {
584 struct pci_dev *pdev[] = { dev1, dev2 };
585 struct ide_host *host;
586 int ret, i;
587 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
588
589 for (i = 0; i < 2; i++) {
590 ret = ide_setup_pci_controller(pdev[i], d, !i);
591 if (ret < 0)
592 goto out;
593
594 ide_pci_setup_ports(pdev[i], d, 0, &hw[i*2], &hws[i*2]);
595 }
596
597 host = ide_host_alloc(d, hws);
598 if (host == NULL) {
599 ret = -ENOMEM;
600 goto out;
601 }
602
603 host->dev[0] = &dev1->dev;
604 host->dev[1] = &dev2->dev;
605
606 host->host_priv = priv;
607
608 pci_set_drvdata(pdev[0], host);
609 pci_set_drvdata(pdev[1], host);
610
611 for (i = 0; i < 2; i++) {
612 ret = do_ide_setup_pci_device(pdev[i], d, !i);
613
614 /*
615 * FIXME: Mom, mom, they stole me the helper function to undo
616 * do_ide_setup_pci_device() on the first device!
617 */
618 if (ret < 0)
619 goto out;
620
621 /* fixup IRQ */
622 hw[i*2 + 1].irq = hw[i*2].irq = ret;
623 }
624
625 ret = ide_host_register(host, d, hws);
626 if (ret)
627 ide_host_free(host);
628 out:
629 return ret;
630 }
631 EXPORT_SYMBOL_GPL(ide_pci_init_two);
632
ide_pci_remove(struct pci_dev * dev)633 void ide_pci_remove(struct pci_dev *dev)
634 {
635 struct ide_host *host = pci_get_drvdata(dev);
636 struct pci_dev *dev2 = host->dev[1] ? to_pci_dev(host->dev[1]) : NULL;
637 int bars;
638
639 if (host->host_flags & IDE_HFLAG_SINGLE)
640 bars = (1 << 2) - 1;
641 else
642 bars = (1 << 4) - 1;
643
644 if ((host->host_flags & IDE_HFLAG_NO_DMA) == 0) {
645 if (host->host_flags & IDE_HFLAG_CS5520)
646 bars |= (1 << 2);
647 else
648 bars |= (1 << 4);
649 }
650
651 ide_host_remove(host);
652
653 if (dev2)
654 pci_release_selected_regions(dev2, bars);
655 pci_release_selected_regions(dev, bars);
656
657 if (dev2)
658 pci_disable_device(dev2);
659 pci_disable_device(dev);
660 }
661 EXPORT_SYMBOL_GPL(ide_pci_remove);
662
663 #ifdef CONFIG_PM
ide_pci_suspend(struct pci_dev * dev,pm_message_t state)664 int ide_pci_suspend(struct pci_dev *dev, pm_message_t state)
665 {
666 pci_save_state(dev);
667 pci_disable_device(dev);
668 pci_set_power_state(dev, pci_choose_state(dev, state));
669
670 return 0;
671 }
672 EXPORT_SYMBOL_GPL(ide_pci_suspend);
673
ide_pci_resume(struct pci_dev * dev)674 int ide_pci_resume(struct pci_dev *dev)
675 {
676 struct ide_host *host = pci_get_drvdata(dev);
677 int rc;
678
679 pci_set_power_state(dev, PCI_D0);
680
681 rc = pci_enable_device(dev);
682 if (rc)
683 return rc;
684
685 pci_restore_state(dev);
686 pci_set_master(dev);
687
688 if (host->init_chipset)
689 host->init_chipset(dev);
690
691 return 0;
692 }
693 EXPORT_SYMBOL_GPL(ide_pci_resume);
694 #endif
695