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1 /*
2  * Copyright (C) 2002 Toshiba Corporation
3  * Copyright (C) 2005-2006 MontaVista Software, Inc. <source@mvista.com>
4  *
5  * This file is licensed under the terms of the GNU General Public
6  * License version 2.  This program is licensed "as is" without any
7  * warranty of any kind, whether express or implied.
8  */
9 
10 #include <linux/types.h>
11 #include <linux/pci.h>
12 #include <linux/ide.h>
13 
14 #define DRV_NAME "tc86c001"
15 
tc86c001_set_mode(ide_drive_t * drive,const u8 speed)16 static void tc86c001_set_mode(ide_drive_t *drive, const u8 speed)
17 {
18 	ide_hwif_t *hwif	= drive->hwif;
19 	unsigned long scr_port	= hwif->config_data + (drive->dn ? 0x02 : 0x00);
20 	u16 mode, scr		= inw(scr_port);
21 
22 	switch (speed) {
23 	case XFER_UDMA_4:	mode = 0x00c0; break;
24 	case XFER_UDMA_3:	mode = 0x00b0; break;
25 	case XFER_UDMA_2:	mode = 0x00a0; break;
26 	case XFER_UDMA_1:	mode = 0x0090; break;
27 	case XFER_UDMA_0:	mode = 0x0080; break;
28 	case XFER_MW_DMA_2:	mode = 0x0070; break;
29 	case XFER_MW_DMA_1:	mode = 0x0060; break;
30 	case XFER_MW_DMA_0:	mode = 0x0050; break;
31 	case XFER_PIO_4:	mode = 0x0400; break;
32 	case XFER_PIO_3:	mode = 0x0300; break;
33 	case XFER_PIO_2:	mode = 0x0200; break;
34 	case XFER_PIO_1:	mode = 0x0100; break;
35 	case XFER_PIO_0:
36 	default:		mode = 0x0000; break;
37 	}
38 
39 	scr &= (speed < XFER_MW_DMA_0) ? 0xf8ff : 0xff0f;
40 	scr |= mode;
41 	outw(scr, scr_port);
42 }
43 
tc86c001_set_pio_mode(ide_drive_t * drive,const u8 pio)44 static void tc86c001_set_pio_mode(ide_drive_t *drive, const u8 pio)
45 {
46 	tc86c001_set_mode(drive, XFER_PIO_0 + pio);
47 }
48 
49 /*
50  * HACKITY HACK
51  *
52  * This is a workaround for the limitation 5 of the TC86C001 IDE controller:
53  * if a DMA transfer terminates prematurely, the controller leaves the device's
54  * interrupt request (INTRQ) pending and does not generate a PCI interrupt (or
55  * set the interrupt bit in the DMA status register), thus no PCI interrupt
56  * will occur until a DMA transfer has been successfully completed.
57  *
58  * We work around this by initiating dummy, zero-length DMA transfer on
59  * a DMA timeout expiration. I found no better way to do this with the current
60  * IDE core than to temporarily replace a higher level driver's timer expiry
61  * handler with our own backing up to that handler in case our recovery fails.
62  */
tc86c001_timer_expiry(ide_drive_t * drive)63 static int tc86c001_timer_expiry(ide_drive_t *drive)
64 {
65 	ide_hwif_t *hwif	= drive->hwif;
66 	ide_expiry_t *expiry	= ide_get_hwifdata(hwif);
67 	u8 dma_stat		= inb(hwif->dma_base + ATA_DMA_STATUS);
68 
69 	/* Restore a higher level driver's expiry handler first. */
70 	hwif->expiry = expiry;
71 
72 	if ((dma_stat & 5) == 1) {	/* DMA active and no interrupt */
73 		unsigned long sc_base	= hwif->config_data;
74 		unsigned long twcr_port	= sc_base + (drive->dn ? 0x06 : 0x04);
75 		u8 dma_cmd		= inb(hwif->dma_base + ATA_DMA_CMD);
76 
77 		printk(KERN_WARNING "%s: DMA interrupt possibly stuck, "
78 		       "attempting recovery...\n", drive->name);
79 
80 		/* Stop DMA */
81 		outb(dma_cmd & ~0x01, hwif->dma_base + ATA_DMA_CMD);
82 
83 		/* Setup the dummy DMA transfer */
84 		outw(0, sc_base + 0x0a);	/* Sector Count */
85 		outw(0, twcr_port);	/* Transfer Word Count 1 or 2 */
86 
87 		/* Start the dummy DMA transfer */
88 
89 		/* clear R_OR_WCTR for write */
90 		outb(0x00, hwif->dma_base + ATA_DMA_CMD);
91 		/* set START_STOPBM */
92 		outb(0x01, hwif->dma_base + ATA_DMA_CMD);
93 
94 		/*
95 		 * If an interrupt was pending, it should come thru shortly.
96 		 * If not, a higher level driver's expiry handler should
97 		 * eventually cause some kind of recovery from the DMA stall.
98 		 */
99 		return WAIT_MIN_SLEEP;
100 	}
101 
102 	/* Chain to the restored expiry handler if DMA wasn't active. */
103 	if (likely(expiry != NULL))
104 		return expiry(drive);
105 
106 	/* If there was no handler, "emulate" that for ide_timer_expiry()... */
107 	return -1;
108 }
109 
tc86c001_dma_start(ide_drive_t * drive)110 static void tc86c001_dma_start(ide_drive_t *drive)
111 {
112 	ide_hwif_t *hwif	= drive->hwif;
113 	unsigned long sc_base	= hwif->config_data;
114 	unsigned long twcr_port	= sc_base + (drive->dn ? 0x06 : 0x04);
115 	unsigned long nsectors	= hwif->rq->nr_sectors;
116 
117 	/*
118 	 * We have to manually load the sector count and size into
119 	 * the appropriate system control registers for DMA to work
120 	 * with LBA48 and ATAPI devices...
121 	 */
122 	outw(nsectors, sc_base + 0x0a);	/* Sector Count */
123 	outw(SECTOR_SIZE / 2, twcr_port); /* Transfer Word Count 1/2 */
124 
125 	/* Install our timeout expiry hook, saving the current handler... */
126 	ide_set_hwifdata(hwif, hwif->expiry);
127 	hwif->expiry = &tc86c001_timer_expiry;
128 
129 	ide_dma_start(drive);
130 }
131 
tc86c001_cable_detect(ide_hwif_t * hwif)132 static u8 tc86c001_cable_detect(ide_hwif_t *hwif)
133 {
134 	struct pci_dev *dev = to_pci_dev(hwif->dev);
135 	unsigned long sc_base = pci_resource_start(dev, 5);
136 	u16 scr1 = inw(sc_base + 0x00);
137 
138 	/*
139 	 * System Control  1 Register bit 13 (PDIAGN):
140 	 * 0=80-pin cable, 1=40-pin cable
141 	 */
142 	return (scr1 & 0x2000) ? ATA_CBL_PATA40 : ATA_CBL_PATA80;
143 }
144 
init_hwif_tc86c001(ide_hwif_t * hwif)145 static void __devinit init_hwif_tc86c001(ide_hwif_t *hwif)
146 {
147 	struct pci_dev *dev	= to_pci_dev(hwif->dev);
148 	unsigned long sc_base	= pci_resource_start(dev, 5);
149 	u16 scr1		= inw(sc_base + 0x00);
150 
151 	/* System Control 1 Register bit 15 (Soft Reset) set */
152 	outw(scr1 |  0x8000, sc_base + 0x00);
153 
154 	/* System Control 1 Register bit 14 (FIFO Reset) set */
155 	outw(scr1 |  0x4000, sc_base + 0x00);
156 
157 	/* System Control 1 Register: reset clear */
158 	outw(scr1 & ~0xc000, sc_base + 0x00);
159 
160 	/* Store the system control register base for convenience... */
161 	hwif->config_data = sc_base;
162 
163 	if (!hwif->dma_base)
164 		return;
165 
166 	/*
167 	 * Sector Count Control Register bits 0 and 1 set:
168 	 * software sets Sector Count Register for master and slave device
169 	 */
170 	outw(0x0003, sc_base + 0x0c);
171 
172 	/* Sector Count Register limit */
173 	hwif->rqsize	 = 0xffff;
174 }
175 
176 static const struct ide_port_ops tc86c001_port_ops = {
177 	.set_pio_mode		= tc86c001_set_pio_mode,
178 	.set_dma_mode		= tc86c001_set_mode,
179 	.cable_detect		= tc86c001_cable_detect,
180 };
181 
182 static const struct ide_dma_ops tc86c001_dma_ops = {
183 	.dma_host_set		= ide_dma_host_set,
184 	.dma_setup		= ide_dma_setup,
185 	.dma_exec_cmd		= ide_dma_exec_cmd,
186 	.dma_start		= tc86c001_dma_start,
187 	.dma_end		= ide_dma_end,
188 	.dma_test_irq		= ide_dma_test_irq,
189 	.dma_lost_irq		= ide_dma_lost_irq,
190 	.dma_timeout		= ide_dma_timeout,
191 	.dma_sff_read_status	= ide_dma_sff_read_status,
192 };
193 
194 static const struct ide_port_info tc86c001_chipset __devinitdata = {
195 	.name		= DRV_NAME,
196 	.init_hwif	= init_hwif_tc86c001,
197 	.port_ops	= &tc86c001_port_ops,
198 	.dma_ops	= &tc86c001_dma_ops,
199 	.host_flags	= IDE_HFLAG_SINGLE | IDE_HFLAG_OFF_BOARD,
200 	.pio_mask	= ATA_PIO4,
201 	.mwdma_mask	= ATA_MWDMA2,
202 	.udma_mask	= ATA_UDMA4,
203 };
204 
tc86c001_init_one(struct pci_dev * dev,const struct pci_device_id * id)205 static int __devinit tc86c001_init_one(struct pci_dev *dev,
206 				       const struct pci_device_id *id)
207 {
208 	int rc;
209 
210 	rc = pci_enable_device(dev);
211 	if (rc)
212 		goto out;
213 
214 	rc = pci_request_region(dev, 5, DRV_NAME);
215 	if (rc) {
216 		printk(KERN_ERR DRV_NAME ": system control regs already in use");
217 		goto out_disable;
218 	}
219 
220 	rc = ide_pci_init_one(dev, &tc86c001_chipset, NULL);
221 	if (rc)
222 		goto out_release;
223 
224 	goto out;
225 
226 out_release:
227 	pci_release_region(dev, 5);
228 out_disable:
229 	pci_disable_device(dev);
230 out:
231 	return rc;
232 }
233 
tc86c001_remove(struct pci_dev * dev)234 static void __devexit tc86c001_remove(struct pci_dev *dev)
235 {
236 	ide_pci_remove(dev);
237 	pci_release_region(dev, 5);
238 	pci_disable_device(dev);
239 }
240 
241 static const struct pci_device_id tc86c001_pci_tbl[] = {
242 	{ PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC86C001_IDE), 0 },
243 	{ 0, }
244 };
245 MODULE_DEVICE_TABLE(pci, tc86c001_pci_tbl);
246 
247 static struct pci_driver tc86c001_pci_driver = {
248 	.name		= "TC86C001",
249 	.id_table	= tc86c001_pci_tbl,
250 	.probe		= tc86c001_init_one,
251 	.remove		= __devexit_p(tc86c001_remove),
252 };
253 
tc86c001_ide_init(void)254 static int __init tc86c001_ide_init(void)
255 {
256 	return ide_pci_register_driver(&tc86c001_pci_driver);
257 }
258 
tc86c001_ide_exit(void)259 static void __exit tc86c001_ide_exit(void)
260 {
261 	pci_unregister_driver(&tc86c001_pci_driver);
262 }
263 
264 module_init(tc86c001_ide_init);
265 module_exit(tc86c001_ide_exit);
266 
267 MODULE_AUTHOR("MontaVista Software, Inc. <source@mvista.com>");
268 MODULE_DESCRIPTION("PCI driver module for TC86C001 IDE");
269 MODULE_LICENSE("GPL");
270