1 /*
2 * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
3 *
4 * Copyright (C) 2001-5, B2C2 inc.
5 *
6 * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
7 *
8 * This driver is "hard-coded" to be used with the 1st generation of
9 * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
10 * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
11 * another device with a BCM3510, this is no problem.
12 *
13 * The driver works also with QAM64 DVB-C, but had an unreasonable high
14 * UNC. (Tested with the Air2PC ATSC 1st generation)
15 *
16 * You'll need a firmware for this driver in order to get it running. It is
17 * called "dvb-fe-bcm3510-01.fw".
18 *
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the Free
21 * Software Foundation; either version 2 of the License, or (at your option)
22 * any later version.
23 *
24 * This program is distributed in the hope that it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
27 * more details.
28 *
29 * You should have received a copy of the GNU General Public License along with
30 * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
31 * Ave, Cambridge, MA 02139, USA.
32 */
33
34 #include <linux/init.h>
35 #include <linux/module.h>
36 #include <linux/device.h>
37 #include <linux/firmware.h>
38 #include <linux/jiffies.h>
39 #include <linux/string.h>
40 #include <linux/slab.h>
41 #include <linux/mutex.h>
42
43 #include "dvb_frontend.h"
44 #include "bcm3510.h"
45 #include "bcm3510_priv.h"
46
47 struct bcm3510_state {
48
49 struct i2c_adapter* i2c;
50 const struct bcm3510_config* config;
51 struct dvb_frontend frontend;
52
53 /* demodulator private data */
54 struct mutex hab_mutex;
55 u8 firmware_loaded:1;
56
57 unsigned long next_status_check;
58 unsigned long status_check_interval;
59 struct bcm3510_hab_cmd_status1 status1;
60 struct bcm3510_hab_cmd_status2 status2;
61 };
62
63 static int debug;
64 module_param(debug, int, 0644);
65 MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
66
67 #define dprintk(level,x...) if (level & debug) printk(x)
68 #define dbufout(b,l,m) {\
69 int i; \
70 for (i = 0; i < l; i++) \
71 m("%02x ",b[i]); \
72 }
73 #define deb_info(args...) dprintk(0x01,args)
74 #define deb_i2c(args...) dprintk(0x02,args)
75 #define deb_hab(args...) dprintk(0x04,args)
76
77 /* transfer functions */
bcm3510_writebytes(struct bcm3510_state * state,u8 reg,u8 * buf,u8 len)78 static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
79 {
80 u8 b[256];
81 int err;
82 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
83
84 b[0] = reg;
85 memcpy(&b[1],buf,len);
86
87 deb_i2c("i2c wr %02x: ",reg);
88 dbufout(buf,len,deb_i2c);
89 deb_i2c("\n");
90
91 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
92
93 deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
94 __func__, state->config->demod_address, reg, err);
95 return -EREMOTEIO;
96 }
97
98 return 0;
99 }
100
bcm3510_readbytes(struct bcm3510_state * state,u8 reg,u8 * buf,u8 len)101 static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
102 {
103 struct i2c_msg msg[] = {
104 { .addr = state->config->demod_address, .flags = 0, .buf = ®, .len = 1 },
105 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
106 };
107 int err;
108
109 memset(buf,0,len);
110
111 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
112 deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
113 __func__, state->config->demod_address, reg, err);
114 return -EREMOTEIO;
115 }
116 deb_i2c("i2c rd %02x: ",reg);
117 dbufout(buf,len,deb_i2c);
118 deb_i2c("\n");
119
120 return 0;
121 }
122
bcm3510_writeB(struct bcm3510_state * state,u8 reg,bcm3510_register_value v)123 static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
124 {
125 return bcm3510_writebytes(state,reg,&v.raw,1);
126 }
127
bcm3510_readB(struct bcm3510_state * state,u8 reg,bcm3510_register_value * v)128 static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
129 {
130 return bcm3510_readbytes(state,reg,&v->raw,1);
131 }
132
133 /* Host Access Buffer transfers */
bcm3510_hab_get_response(struct bcm3510_state * st,u8 * buf,int len)134 static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
135 {
136 bcm3510_register_value v;
137 int ret,i;
138
139 v.HABADR_a6.HABADR = 0;
140 if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
141 return ret;
142
143 for (i = 0; i < len; i++) {
144 if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
145 return ret;
146 buf[i] = v.HABDATA_a7;
147 }
148 return 0;
149 }
150
bcm3510_hab_send_request(struct bcm3510_state * st,u8 * buf,int len)151 static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
152 {
153 bcm3510_register_value v,hab;
154 int ret,i;
155 unsigned long t;
156
157 /* Check if any previous HAB request still needs to be serviced by the
158 * Aquisition Processor before sending new request */
159 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
160 return ret;
161 if (v.HABSTAT_a8.HABR) {
162 deb_info("HAB is running already - clearing it.\n");
163 v.HABSTAT_a8.HABR = 0;
164 bcm3510_writeB(st,0xa8,v);
165 // return -EBUSY;
166 }
167
168 /* Send the start HAB Address (automatically incremented after write of
169 * HABDATA) and write the HAB Data */
170 hab.HABADR_a6.HABADR = 0;
171 if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
172 return ret;
173
174 for (i = 0; i < len; i++) {
175 hab.HABDATA_a7 = buf[i];
176 if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
177 return ret;
178 }
179
180 /* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
181 * be written) */
182 v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
183 if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
184 return ret;
185
186 /* Polling method: Wait until the AP finishes processing the HAB request */
187 t = jiffies + 1*HZ;
188 while (time_before(jiffies, t)) {
189 deb_info("waiting for HAB to complete\n");
190 msleep(10);
191 if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
192 return ret;
193
194 if (!v.HABSTAT_a8.HABR)
195 return 0;
196 }
197
198 deb_info("send_request execution timed out.\n");
199 return -ETIMEDOUT;
200 }
201
bcm3510_do_hab_cmd(struct bcm3510_state * st,u8 cmd,u8 msgid,u8 * obuf,u8 olen,u8 * ibuf,u8 ilen)202 static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
203 {
204 u8 ob[olen+2],ib[ilen+2];
205 int ret = 0;
206
207 ob[0] = cmd;
208 ob[1] = msgid;
209 memcpy(&ob[2],obuf,olen);
210
211 deb_hab("hab snd: ");
212 dbufout(ob,olen+2,deb_hab);
213 deb_hab("\n");
214
215 if (mutex_lock_interruptible(&st->hab_mutex) < 0)
216 return -EAGAIN;
217
218 if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
219 (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
220 goto error;
221
222 deb_hab("hab get: ");
223 dbufout(ib,ilen+2,deb_hab);
224 deb_hab("\n");
225
226 memcpy(ibuf,&ib[2],ilen);
227 error:
228 mutex_unlock(&st->hab_mutex);
229 return ret;
230 }
231
232 #if 0
233 /* not needed, we use a semaphore to prevent HAB races */
234 static int bcm3510_is_ap_ready(struct bcm3510_state *st)
235 {
236 bcm3510_register_value ap,hab;
237 int ret;
238
239 if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
240 (ret = bcm3510_readB(st,0xa2,&ap) < 0))
241 return ret;
242
243 if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
244 deb_info("AP is busy\n");
245 return -EBUSY;
246 }
247
248 return 0;
249 }
250 #endif
251
bcm3510_bert_reset(struct bcm3510_state * st)252 static int bcm3510_bert_reset(struct bcm3510_state *st)
253 {
254 bcm3510_register_value b;
255 int ret;
256
257 if ((ret = bcm3510_readB(st,0xfa,&b)) < 0)
258 return ret;
259
260 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
261 b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
262 b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
263 b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
264
265 /* clear residual bit counter TODO */
266 return 0;
267 }
268
bcm3510_refresh_state(struct bcm3510_state * st)269 static int bcm3510_refresh_state(struct bcm3510_state *st)
270 {
271 if (time_after(jiffies,st->next_status_check)) {
272 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
273 bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
274 st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
275 }
276 return 0;
277 }
278
bcm3510_read_status(struct dvb_frontend * fe,fe_status_t * status)279 static int bcm3510_read_status(struct dvb_frontend *fe, fe_status_t *status)
280 {
281 struct bcm3510_state* st = fe->demodulator_priv;
282 bcm3510_refresh_state(st);
283
284 *status = 0;
285 if (st->status1.STATUS1.RECEIVER_LOCK)
286 *status |= FE_HAS_LOCK | FE_HAS_SYNC;
287
288 if (st->status1.STATUS1.FEC_LOCK)
289 *status |= FE_HAS_VITERBI;
290
291 if (st->status1.STATUS1.OUT_PLL_LOCK)
292 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
293
294 if (*status & FE_HAS_LOCK)
295 st->status_check_interval = 1500;
296 else /* more frequently checks if no lock has been achieved yet */
297 st->status_check_interval = 500;
298
299 deb_info("real_status: %02x\n",*status);
300 return 0;
301 }
302
bcm3510_read_ber(struct dvb_frontend * fe,u32 * ber)303 static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
304 {
305 struct bcm3510_state* st = fe->demodulator_priv;
306 bcm3510_refresh_state(st);
307
308 *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
309 return 0;
310 }
311
bcm3510_read_unc(struct dvb_frontend * fe,u32 * unc)312 static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
313 {
314 struct bcm3510_state* st = fe->demodulator_priv;
315 bcm3510_refresh_state(st);
316 *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
317 return 0;
318 }
319
bcm3510_read_signal_strength(struct dvb_frontend * fe,u16 * strength)320 static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
321 {
322 struct bcm3510_state* st = fe->demodulator_priv;
323 s32 t;
324
325 bcm3510_refresh_state(st);
326 t = st->status2.SIGNAL;
327
328 if (t > 190)
329 t = 190;
330 if (t < 90)
331 t = 90;
332
333 t -= 90;
334 t = t * 0xff / 100;
335 /* normalize if necessary */
336 *strength = (t << 8) | t;
337 return 0;
338 }
339
bcm3510_read_snr(struct dvb_frontend * fe,u16 * snr)340 static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
341 {
342 struct bcm3510_state* st = fe->demodulator_priv;
343 bcm3510_refresh_state(st);
344
345 *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
346 return 0;
347 }
348
349 /* tuner frontend programming */
bcm3510_tuner_cmd(struct bcm3510_state * st,u8 bc,u16 n,u8 a)350 static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
351 {
352 struct bcm3510_hab_cmd_tune c;
353 memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
354
355 /* I2C Mode disabled, set 16 control / Data pairs */
356 c.length = 0x10;
357 c.clock_width = 0;
358 /* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
359 * logic high (as Configuration) */
360 c.misc = 0x10;
361 /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
362 c.TUNCTL_state = 0x40;
363
364 /* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
365 c.ctl_dat[0].ctrl.size = BITS_8;
366 c.ctl_dat[0].data = 0x80 | bc;
367
368 /* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
369 c.ctl_dat[1].ctrl.size = BITS_8;
370 c.ctl_dat[1].data = 4;
371
372 /* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
373 c.ctl_dat[2].ctrl.size = BITS_3;
374 c.ctl_dat[2].data = 0x20;
375
376 /* control CS0 pin, pulse byte ? */
377 c.ctl_dat[3].ctrl.size = BITS_3;
378 c.ctl_dat[3].ctrl.clk_off = 1;
379 c.ctl_dat[3].ctrl.cs0 = 1;
380 c.ctl_dat[3].data = 0x40;
381
382 /* PGM_S18 to PGM_S11 */
383 c.ctl_dat[4].ctrl.size = BITS_8;
384 c.ctl_dat[4].data = n >> 3;
385
386 /* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
387 c.ctl_dat[5].ctrl.size = BITS_8;
388 c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
389
390 /* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
391 c.ctl_dat[6].ctrl.size = BITS_3;
392 c.ctl_dat[6].data = (a << 6) & 0xdf;
393
394 /* control CS0 pin, pulse byte ? */
395 c.ctl_dat[7].ctrl.size = BITS_3;
396 c.ctl_dat[7].ctrl.clk_off = 1;
397 c.ctl_dat[7].ctrl.cs0 = 1;
398 c.ctl_dat[7].data = 0x40;
399
400 /* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
401 c.ctl_dat[8].ctrl.size = BITS_8;
402 c.ctl_dat[8].data = 0x80;
403
404 /* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
405 c.ctl_dat[9].ctrl.size = BITS_8;
406 c.ctl_dat[9].data = 0x10;
407
408 /* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
409 c.ctl_dat[10].ctrl.size = BITS_3;
410 c.ctl_dat[10].data = 0x20;
411
412 /* pulse byte */
413 c.ctl_dat[11].ctrl.size = BITS_3;
414 c.ctl_dat[11].ctrl.clk_off = 1;
415 c.ctl_dat[11].ctrl.cs1 = 1;
416 c.ctl_dat[11].data = 0x40;
417
418 /* PGM_S18 to PGM_S11 */
419 c.ctl_dat[12].ctrl.size = BITS_8;
420 c.ctl_dat[12].data = 0x2a;
421
422 /* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
423 c.ctl_dat[13].ctrl.size = BITS_8;
424 c.ctl_dat[13].data = 0x8e;
425
426 /* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
427 c.ctl_dat[14].ctrl.size = BITS_3;
428 c.ctl_dat[14].data = 0;
429
430 /* Pulse Byte */
431 c.ctl_dat[15].ctrl.size = BITS_3;
432 c.ctl_dat[15].ctrl.clk_off = 1;
433 c.ctl_dat[15].ctrl.cs1 = 1;
434 c.ctl_dat[15].data = 0x40;
435
436 return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
437 }
438
bcm3510_set_freq(struct bcm3510_state * st,u32 freq)439 static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
440 {
441 u8 bc,a;
442 u16 n;
443 s32 YIntercept,Tfvco1;
444
445 freq /= 1000;
446
447 deb_info("%dkHz:",freq);
448 /* set Band Switch */
449 if (freq <= 168000)
450 bc = 0x1c;
451 else if (freq <= 378000)
452 bc = 0x2c;
453 else
454 bc = 0x30;
455
456 if (freq >= 470000) {
457 freq -= 470001;
458 YIntercept = 18805;
459 } else if (freq >= 90000) {
460 freq -= 90001;
461 YIntercept = 15005;
462 } else if (freq >= 76000){
463 freq -= 76001;
464 YIntercept = 14865;
465 } else {
466 freq -= 54001;
467 YIntercept = 14645;
468 }
469
470 Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
471
472 n = Tfvco1 >> 6;
473 a = Tfvco1 & 0x3f;
474
475 deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
476 if (n >= 16 && n <= 2047)
477 return bcm3510_tuner_cmd(st,bc,n,a);
478
479 return -EINVAL;
480 }
481
bcm3510_set_frontend(struct dvb_frontend * fe,struct dvb_frontend_parameters * p)482 static int bcm3510_set_frontend(struct dvb_frontend* fe,
483 struct dvb_frontend_parameters *p)
484 {
485 struct bcm3510_state* st = fe->demodulator_priv;
486 struct bcm3510_hab_cmd_ext_acquire cmd;
487 struct bcm3510_hab_cmd_bert_control bert;
488 int ret;
489
490 memset(&cmd,0,sizeof(cmd));
491 switch (p->u.vsb.modulation) {
492 case QAM_256:
493 cmd.ACQUIRE0.MODE = 0x1;
494 cmd.ACQUIRE1.SYM_RATE = 0x1;
495 cmd.ACQUIRE1.IF_FREQ = 0x1;
496 break;
497 case QAM_64:
498 cmd.ACQUIRE0.MODE = 0x2;
499 cmd.ACQUIRE1.SYM_RATE = 0x2;
500 cmd.ACQUIRE1.IF_FREQ = 0x1;
501 break;
502 /* case QAM_256:
503 cmd.ACQUIRE0.MODE = 0x3;
504 break;
505 case QAM_128:
506 cmd.ACQUIRE0.MODE = 0x4;
507 break;
508 case QAM_64:
509 cmd.ACQUIRE0.MODE = 0x5;
510 break;
511 case QAM_32:
512 cmd.ACQUIRE0.MODE = 0x6;
513 break;
514 case QAM_16:
515 cmd.ACQUIRE0.MODE = 0x7;
516 break;*/
517 case VSB_8:
518 cmd.ACQUIRE0.MODE = 0x8;
519 cmd.ACQUIRE1.SYM_RATE = 0x0;
520 cmd.ACQUIRE1.IF_FREQ = 0x0;
521 break;
522 case VSB_16:
523 cmd.ACQUIRE0.MODE = 0x9;
524 cmd.ACQUIRE1.SYM_RATE = 0x0;
525 cmd.ACQUIRE1.IF_FREQ = 0x0;
526 default:
527 return -EINVAL;
528 };
529 cmd.ACQUIRE0.OFFSET = 0;
530 cmd.ACQUIRE0.NTSCSWEEP = 1;
531 cmd.ACQUIRE0.FA = 1;
532 cmd.ACQUIRE0.BW = 0;
533
534 /* if (enableOffset) {
535 cmd.IF_OFFSET0 = xx;
536 cmd.IF_OFFSET1 = xx;
537
538 cmd.SYM_OFFSET0 = xx;
539 cmd.SYM_OFFSET1 = xx;
540 if (enableNtscSweep) {
541 cmd.NTSC_OFFSET0;
542 cmd.NTSC_OFFSET1;
543 }
544 } */
545 bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
546
547 /* doing it with different MSGIDs, data book and source differs */
548 bert.BE = 0;
549 bert.unused = 0;
550 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
551 bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
552
553 bcm3510_bert_reset(st);
554
555 if ((ret = bcm3510_set_freq(st,p->frequency)) < 0)
556 return ret;
557
558 memset(&st->status1,0,sizeof(st->status1));
559 memset(&st->status2,0,sizeof(st->status2));
560 st->status_check_interval = 500;
561
562 /* Give the AP some time */
563 msleep(200);
564
565 return 0;
566 }
567
bcm3510_sleep(struct dvb_frontend * fe)568 static int bcm3510_sleep(struct dvb_frontend* fe)
569 {
570 return 0;
571 }
572
bcm3510_get_tune_settings(struct dvb_frontend * fe,struct dvb_frontend_tune_settings * s)573 static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
574 {
575 s->min_delay_ms = 1000;
576 s->step_size = 0;
577 s->max_drift = 0;
578 return 0;
579 }
580
bcm3510_release(struct dvb_frontend * fe)581 static void bcm3510_release(struct dvb_frontend* fe)
582 {
583 struct bcm3510_state* state = fe->demodulator_priv;
584 kfree(state);
585 }
586
587 /* firmware download:
588 * firmware file is build up like this:
589 * 16bit addr, 16bit length, 8byte of length
590 */
591 #define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
592
bcm3510_write_ram(struct bcm3510_state * st,u16 addr,const u8 * b,u16 len)593 static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, const u8 *b,
594 u16 len)
595 {
596 int ret = 0,i;
597 bcm3510_register_value vH, vL,vD;
598
599 vH.MADRH_a9 = addr >> 8;
600 vL.MADRL_aa = addr;
601 if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
602 if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
603
604 for (i = 0; i < len; i++) {
605 vD.MDATA_ab = b[i];
606 if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
607 return ret;
608 }
609
610 return 0;
611 }
612
bcm3510_download_firmware(struct dvb_frontend * fe)613 static int bcm3510_download_firmware(struct dvb_frontend* fe)
614 {
615 struct bcm3510_state* st = fe->demodulator_priv;
616 const struct firmware *fw;
617 u16 addr,len;
618 const u8 *b;
619 int ret,i;
620
621 deb_info("requesting firmware\n");
622 if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) {
623 err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
624 return ret;
625 }
626 deb_info("got firmware: %zd\n",fw->size);
627
628 b = fw->data;
629 for (i = 0; i < fw->size;) {
630 addr = le16_to_cpu( *( (u16 *)&b[i] ) );
631 len = le16_to_cpu( *( (u16 *)&b[i+2] ) );
632 deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04zx\n",addr,len,fw->size);
633 if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
634 err("firmware download failed: %d\n",ret);
635 return ret;
636 }
637 i += 4 + len;
638 }
639 release_firmware(fw);
640 deb_info("firmware download successfully completed\n");
641 return 0;
642 }
643
bcm3510_check_firmware_version(struct bcm3510_state * st)644 static int bcm3510_check_firmware_version(struct bcm3510_state *st)
645 {
646 struct bcm3510_hab_cmd_get_version_info ver;
647 bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
648
649 deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
650 ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
651
652 if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
653 ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
654 ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
655 return 0;
656
657 deb_info("version check failed\n");
658 return -ENODEV;
659 }
660
661 /* (un)resetting the AP */
bcm3510_reset(struct bcm3510_state * st)662 static int bcm3510_reset(struct bcm3510_state *st)
663 {
664 int ret;
665 unsigned long t;
666 bcm3510_register_value v;
667
668 bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
669 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
670 return ret;
671
672 t = jiffies + 3*HZ;
673 while (time_before(jiffies, t)) {
674 msleep(10);
675 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
676 return ret;
677
678 if (v.APSTAT1_a2.RESET)
679 return 0;
680 }
681 deb_info("reset timed out\n");
682 return -ETIMEDOUT;
683 }
684
bcm3510_clear_reset(struct bcm3510_state * st)685 static int bcm3510_clear_reset(struct bcm3510_state *st)
686 {
687 bcm3510_register_value v;
688 int ret;
689 unsigned long t;
690
691 v.raw = 0;
692 if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
693 return ret;
694
695 t = jiffies + 3*HZ;
696 while (time_before(jiffies, t)) {
697 msleep(10);
698 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
699 return ret;
700
701 /* verify that reset is cleared */
702 if (!v.APSTAT1_a2.RESET)
703 return 0;
704 }
705 deb_info("reset clear timed out\n");
706 return -ETIMEDOUT;
707 }
708
bcm3510_init_cold(struct bcm3510_state * st)709 static int bcm3510_init_cold(struct bcm3510_state *st)
710 {
711 int ret;
712 bcm3510_register_value v;
713
714 /* read Acquisation Processor status register and check it is not in RUN mode */
715 if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
716 return ret;
717 if (v.APSTAT1_a2.RUN) {
718 deb_info("AP is already running - firmware already loaded.\n");
719 return 0;
720 }
721
722 deb_info("reset?\n");
723 if ((ret = bcm3510_reset(st)) < 0)
724 return ret;
725
726 deb_info("tristate?\n");
727 /* tri-state */
728 v.TSTCTL_2e.CTL = 0;
729 if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
730 return ret;
731
732 deb_info("firmware?\n");
733 if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
734 (ret = bcm3510_clear_reset(st)) < 0)
735 return ret;
736
737 /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
738
739 return 0;
740 }
741
bcm3510_init(struct dvb_frontend * fe)742 static int bcm3510_init(struct dvb_frontend* fe)
743 {
744 struct bcm3510_state* st = fe->demodulator_priv;
745 bcm3510_register_value j;
746 struct bcm3510_hab_cmd_set_agc c;
747 int ret;
748
749 if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
750 return ret;
751
752 deb_info("JDEC: %02x\n",j.raw);
753
754 switch (j.JDEC_ca.JDEC) {
755 case JDEC_WAIT_AT_RAM:
756 deb_info("attempting to download firmware\n");
757 if ((ret = bcm3510_init_cold(st)) < 0)
758 return ret;
759 case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
760 deb_info("firmware is loaded\n");
761 bcm3510_check_firmware_version(st);
762 break;
763 default:
764 return -ENODEV;
765 }
766
767 memset(&c,0,1);
768 c.SEL = 1;
769 bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
770
771 return 0;
772 }
773
774
775 static struct dvb_frontend_ops bcm3510_ops;
776
bcm3510_attach(const struct bcm3510_config * config,struct i2c_adapter * i2c)777 struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
778 struct i2c_adapter *i2c)
779 {
780 struct bcm3510_state* state = NULL;
781 int ret;
782 bcm3510_register_value v;
783
784 /* allocate memory for the internal state */
785 state = kzalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
786 if (state == NULL)
787 goto error;
788
789 /* setup the state */
790
791 state->config = config;
792 state->i2c = i2c;
793
794 /* create dvb_frontend */
795 memcpy(&state->frontend.ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
796 state->frontend.demodulator_priv = state;
797
798 mutex_init(&state->hab_mutex);
799
800 if ((ret = bcm3510_readB(state,0xe0,&v)) < 0)
801 goto error;
802
803 deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
804
805 if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
806 (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
807 goto error;
808
809 info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
810
811 bcm3510_reset(state);
812
813 return &state->frontend;
814
815 error:
816 kfree(state);
817 return NULL;
818 }
819 EXPORT_SYMBOL(bcm3510_attach);
820
821 static struct dvb_frontend_ops bcm3510_ops = {
822
823 .info = {
824 .name = "Broadcom BCM3510 VSB/QAM frontend",
825 .type = FE_ATSC,
826 .frequency_min = 54000000,
827 .frequency_max = 803000000,
828 /* stepsize is just a guess */
829 .frequency_stepsize = 0,
830 .caps =
831 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
832 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
833 FE_CAN_8VSB | FE_CAN_16VSB |
834 FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
835 },
836
837 .release = bcm3510_release,
838
839 .init = bcm3510_init,
840 .sleep = bcm3510_sleep,
841
842 .set_frontend = bcm3510_set_frontend,
843 .get_tune_settings = bcm3510_get_tune_settings,
844
845 .read_status = bcm3510_read_status,
846 .read_ber = bcm3510_read_ber,
847 .read_signal_strength = bcm3510_read_signal_strength,
848 .read_snr = bcm3510_read_snr,
849 .read_ucblocks = bcm3510_read_unc,
850 };
851
852 MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
853 MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
854 MODULE_LICENSE("GPL");
855