1 /*
2 * Atmel MultiMedia Card Interface driver
3 *
4 * Copyright (C) 2004-2008 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
26
27 #include <linux/mmc/host.h>
28 #include <linux/atmel-mci.h>
29
30 #include <asm/io.h>
31 #include <asm/unaligned.h>
32
33 #include <mach/board.h>
34
35 #include "atmel-mci-regs.h"
36
37 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
38 #define ATMCI_DMA_THRESHOLD 16
39
40 enum {
41 EVENT_CMD_COMPLETE = 0,
42 EVENT_XFER_COMPLETE,
43 EVENT_DATA_COMPLETE,
44 EVENT_DATA_ERROR,
45 };
46
47 enum atmel_mci_state {
48 STATE_IDLE = 0,
49 STATE_SENDING_CMD,
50 STATE_SENDING_DATA,
51 STATE_DATA_BUSY,
52 STATE_SENDING_STOP,
53 STATE_DATA_ERROR,
54 };
55
56 struct atmel_mci_dma {
57 #ifdef CONFIG_MMC_ATMELMCI_DMA
58 struct dma_chan *chan;
59 struct dma_async_tx_descriptor *data_desc;
60 #endif
61 };
62
63 /**
64 * struct atmel_mci - MMC controller state shared between all slots
65 * @lock: Spinlock protecting the queue and associated data.
66 * @regs: Pointer to MMIO registers.
67 * @sg: Scatterlist entry currently being processed by PIO code, if any.
68 * @pio_offset: Offset into the current scatterlist entry.
69 * @cur_slot: The slot which is currently using the controller.
70 * @mrq: The request currently being processed on @cur_slot,
71 * or NULL if the controller is idle.
72 * @cmd: The command currently being sent to the card, or NULL.
73 * @data: The data currently being transferred, or NULL if no data
74 * transfer is in progress.
75 * @dma: DMA client state.
76 * @data_chan: DMA channel being used for the current data transfer.
77 * @cmd_status: Snapshot of SR taken upon completion of the current
78 * command. Only valid when EVENT_CMD_COMPLETE is pending.
79 * @data_status: Snapshot of SR taken upon completion of the current
80 * data transfer. Only valid when EVENT_DATA_COMPLETE or
81 * EVENT_DATA_ERROR is pending.
82 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
83 * to be sent.
84 * @tasklet: Tasklet running the request state machine.
85 * @pending_events: Bitmask of events flagged by the interrupt handler
86 * to be processed by the tasklet.
87 * @completed_events: Bitmask of events which the state machine has
88 * processed.
89 * @state: Tasklet state.
90 * @queue: List of slots waiting for access to the controller.
91 * @need_clock_update: Update the clock rate before the next request.
92 * @need_reset: Reset controller before next request.
93 * @mode_reg: Value of the MR register.
94 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
95 * rate and timeout calculations.
96 * @mapbase: Physical address of the MMIO registers.
97 * @mck: The peripheral bus clock hooked up to the MMC controller.
98 * @pdev: Platform device associated with the MMC controller.
99 * @slot: Slots sharing this MMC controller.
100 *
101 * Locking
102 * =======
103 *
104 * @lock is a softirq-safe spinlock protecting @queue as well as
105 * @cur_slot, @mrq and @state. These must always be updated
106 * at the same time while holding @lock.
107 *
108 * @lock also protects mode_reg and need_clock_update since these are
109 * used to synchronize mode register updates with the queue
110 * processing.
111 *
112 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
113 * and must always be written at the same time as the slot is added to
114 * @queue.
115 *
116 * @pending_events and @completed_events are accessed using atomic bit
117 * operations, so they don't need any locking.
118 *
119 * None of the fields touched by the interrupt handler need any
120 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
121 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
122 * interrupts must be disabled and @data_status updated with a
123 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
124 * CMDRDY interupt must be disabled and @cmd_status updated with a
125 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
126 * bytes_xfered field of @data must be written. This is ensured by
127 * using barriers.
128 */
129 struct atmel_mci {
130 spinlock_t lock;
131 void __iomem *regs;
132
133 struct scatterlist *sg;
134 unsigned int pio_offset;
135
136 struct atmel_mci_slot *cur_slot;
137 struct mmc_request *mrq;
138 struct mmc_command *cmd;
139 struct mmc_data *data;
140
141 struct atmel_mci_dma dma;
142 struct dma_chan *data_chan;
143
144 u32 cmd_status;
145 u32 data_status;
146 u32 stop_cmdr;
147
148 struct tasklet_struct tasklet;
149 unsigned long pending_events;
150 unsigned long completed_events;
151 enum atmel_mci_state state;
152 struct list_head queue;
153
154 bool need_clock_update;
155 bool need_reset;
156 u32 mode_reg;
157 unsigned long bus_hz;
158 unsigned long mapbase;
159 struct clk *mck;
160 struct platform_device *pdev;
161
162 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
163 };
164
165 /**
166 * struct atmel_mci_slot - MMC slot state
167 * @mmc: The mmc_host representing this slot.
168 * @host: The MMC controller this slot is using.
169 * @sdc_reg: Value of SDCR to be written before using this slot.
170 * @mrq: mmc_request currently being processed or waiting to be
171 * processed, or NULL when the slot is idle.
172 * @queue_node: List node for placing this node in the @queue list of
173 * &struct atmel_mci.
174 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
175 * @flags: Random state bits associated with the slot.
176 * @detect_pin: GPIO pin used for card detection, or negative if not
177 * available.
178 * @wp_pin: GPIO pin used for card write protect sending, or negative
179 * if not available.
180 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
181 */
182 struct atmel_mci_slot {
183 struct mmc_host *mmc;
184 struct atmel_mci *host;
185
186 u32 sdc_reg;
187
188 struct mmc_request *mrq;
189 struct list_head queue_node;
190
191 unsigned int clock;
192 unsigned long flags;
193 #define ATMCI_CARD_PRESENT 0
194 #define ATMCI_CARD_NEED_INIT 1
195 #define ATMCI_SHUTDOWN 2
196
197 int detect_pin;
198 int wp_pin;
199
200 struct timer_list detect_timer;
201 };
202
203 #define atmci_test_and_clear_pending(host, event) \
204 test_and_clear_bit(event, &host->pending_events)
205 #define atmci_set_completed(host, event) \
206 set_bit(event, &host->completed_events)
207 #define atmci_set_pending(host, event) \
208 set_bit(event, &host->pending_events)
209
210 /*
211 * The debugfs stuff below is mostly optimized away when
212 * CONFIG_DEBUG_FS is not set.
213 */
atmci_req_show(struct seq_file * s,void * v)214 static int atmci_req_show(struct seq_file *s, void *v)
215 {
216 struct atmel_mci_slot *slot = s->private;
217 struct mmc_request *mrq;
218 struct mmc_command *cmd;
219 struct mmc_command *stop;
220 struct mmc_data *data;
221
222 /* Make sure we get a consistent snapshot */
223 spin_lock_bh(&slot->host->lock);
224 mrq = slot->mrq;
225
226 if (mrq) {
227 cmd = mrq->cmd;
228 data = mrq->data;
229 stop = mrq->stop;
230
231 if (cmd)
232 seq_printf(s,
233 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
234 cmd->opcode, cmd->arg, cmd->flags,
235 cmd->resp[0], cmd->resp[1], cmd->resp[2],
236 cmd->resp[2], cmd->error);
237 if (data)
238 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
239 data->bytes_xfered, data->blocks,
240 data->blksz, data->flags, data->error);
241 if (stop)
242 seq_printf(s,
243 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
244 stop->opcode, stop->arg, stop->flags,
245 stop->resp[0], stop->resp[1], stop->resp[2],
246 stop->resp[2], stop->error);
247 }
248
249 spin_unlock_bh(&slot->host->lock);
250
251 return 0;
252 }
253
atmci_req_open(struct inode * inode,struct file * file)254 static int atmci_req_open(struct inode *inode, struct file *file)
255 {
256 return single_open(file, atmci_req_show, inode->i_private);
257 }
258
259 static const struct file_operations atmci_req_fops = {
260 .owner = THIS_MODULE,
261 .open = atmci_req_open,
262 .read = seq_read,
263 .llseek = seq_lseek,
264 .release = single_release,
265 };
266
atmci_show_status_reg(struct seq_file * s,const char * regname,u32 value)267 static void atmci_show_status_reg(struct seq_file *s,
268 const char *regname, u32 value)
269 {
270 static const char *sr_bit[] = {
271 [0] = "CMDRDY",
272 [1] = "RXRDY",
273 [2] = "TXRDY",
274 [3] = "BLKE",
275 [4] = "DTIP",
276 [5] = "NOTBUSY",
277 [8] = "SDIOIRQA",
278 [9] = "SDIOIRQB",
279 [16] = "RINDE",
280 [17] = "RDIRE",
281 [18] = "RCRCE",
282 [19] = "RENDE",
283 [20] = "RTOE",
284 [21] = "DCRCE",
285 [22] = "DTOE",
286 [30] = "OVRE",
287 [31] = "UNRE",
288 };
289 unsigned int i;
290
291 seq_printf(s, "%s:\t0x%08x", regname, value);
292 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
293 if (value & (1 << i)) {
294 if (sr_bit[i])
295 seq_printf(s, " %s", sr_bit[i]);
296 else
297 seq_puts(s, " UNKNOWN");
298 }
299 }
300 seq_putc(s, '\n');
301 }
302
atmci_regs_show(struct seq_file * s,void * v)303 static int atmci_regs_show(struct seq_file *s, void *v)
304 {
305 struct atmel_mci *host = s->private;
306 u32 *buf;
307
308 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
309 if (!buf)
310 return -ENOMEM;
311
312 /*
313 * Grab a more or less consistent snapshot. Note that we're
314 * not disabling interrupts, so IMR and SR may not be
315 * consistent.
316 */
317 spin_lock_bh(&host->lock);
318 clk_enable(host->mck);
319 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
320 clk_disable(host->mck);
321 spin_unlock_bh(&host->lock);
322
323 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
324 buf[MCI_MR / 4],
325 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
326 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
327 buf[MCI_MR / 4] & 0xff);
328 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
329 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
330 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
331 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
332 buf[MCI_BLKR / 4],
333 buf[MCI_BLKR / 4] & 0xffff,
334 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
335
336 /* Don't read RSPR and RDR; it will consume the data there */
337
338 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
339 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
340
341 kfree(buf);
342
343 return 0;
344 }
345
atmci_regs_open(struct inode * inode,struct file * file)346 static int atmci_regs_open(struct inode *inode, struct file *file)
347 {
348 return single_open(file, atmci_regs_show, inode->i_private);
349 }
350
351 static const struct file_operations atmci_regs_fops = {
352 .owner = THIS_MODULE,
353 .open = atmci_regs_open,
354 .read = seq_read,
355 .llseek = seq_lseek,
356 .release = single_release,
357 };
358
atmci_init_debugfs(struct atmel_mci_slot * slot)359 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
360 {
361 struct mmc_host *mmc = slot->mmc;
362 struct atmel_mci *host = slot->host;
363 struct dentry *root;
364 struct dentry *node;
365
366 root = mmc->debugfs_root;
367 if (!root)
368 return;
369
370 node = debugfs_create_file("regs", S_IRUSR, root, host,
371 &atmci_regs_fops);
372 if (IS_ERR(node))
373 return;
374 if (!node)
375 goto err;
376
377 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
378 if (!node)
379 goto err;
380
381 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
382 if (!node)
383 goto err;
384
385 node = debugfs_create_x32("pending_events", S_IRUSR, root,
386 (u32 *)&host->pending_events);
387 if (!node)
388 goto err;
389
390 node = debugfs_create_x32("completed_events", S_IRUSR, root,
391 (u32 *)&host->completed_events);
392 if (!node)
393 goto err;
394
395 return;
396
397 err:
398 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
399 }
400
ns_to_clocks(struct atmel_mci * host,unsigned int ns)401 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
402 unsigned int ns)
403 {
404 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
405 }
406
atmci_set_timeout(struct atmel_mci * host,struct atmel_mci_slot * slot,struct mmc_data * data)407 static void atmci_set_timeout(struct atmel_mci *host,
408 struct atmel_mci_slot *slot, struct mmc_data *data)
409 {
410 static unsigned dtomul_to_shift[] = {
411 0, 4, 7, 8, 10, 12, 16, 20
412 };
413 unsigned timeout;
414 unsigned dtocyc;
415 unsigned dtomul;
416
417 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
418
419 for (dtomul = 0; dtomul < 8; dtomul++) {
420 unsigned shift = dtomul_to_shift[dtomul];
421 dtocyc = (timeout + (1 << shift) - 1) >> shift;
422 if (dtocyc < 15)
423 break;
424 }
425
426 if (dtomul >= 8) {
427 dtomul = 7;
428 dtocyc = 15;
429 }
430
431 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
432 dtocyc << dtomul_to_shift[dtomul]);
433 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
434 }
435
436 /*
437 * Return mask with command flags to be enabled for this command.
438 */
atmci_prepare_command(struct mmc_host * mmc,struct mmc_command * cmd)439 static u32 atmci_prepare_command(struct mmc_host *mmc,
440 struct mmc_command *cmd)
441 {
442 struct mmc_data *data;
443 u32 cmdr;
444
445 cmd->error = -EINPROGRESS;
446
447 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
448
449 if (cmd->flags & MMC_RSP_PRESENT) {
450 if (cmd->flags & MMC_RSP_136)
451 cmdr |= MCI_CMDR_RSPTYP_136BIT;
452 else
453 cmdr |= MCI_CMDR_RSPTYP_48BIT;
454 }
455
456 /*
457 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
458 * it's too difficult to determine whether this is an ACMD or
459 * not. Better make it 64.
460 */
461 cmdr |= MCI_CMDR_MAXLAT_64CYC;
462
463 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
464 cmdr |= MCI_CMDR_OPDCMD;
465
466 data = cmd->data;
467 if (data) {
468 cmdr |= MCI_CMDR_START_XFER;
469 if (data->flags & MMC_DATA_STREAM)
470 cmdr |= MCI_CMDR_STREAM;
471 else if (data->blocks > 1)
472 cmdr |= MCI_CMDR_MULTI_BLOCK;
473 else
474 cmdr |= MCI_CMDR_BLOCK;
475
476 if (data->flags & MMC_DATA_READ)
477 cmdr |= MCI_CMDR_TRDIR_READ;
478 }
479
480 return cmdr;
481 }
482
atmci_start_command(struct atmel_mci * host,struct mmc_command * cmd,u32 cmd_flags)483 static void atmci_start_command(struct atmel_mci *host,
484 struct mmc_command *cmd, u32 cmd_flags)
485 {
486 WARN_ON(host->cmd);
487 host->cmd = cmd;
488
489 dev_vdbg(&host->pdev->dev,
490 "start command: ARGR=0x%08x CMDR=0x%08x\n",
491 cmd->arg, cmd_flags);
492
493 mci_writel(host, ARGR, cmd->arg);
494 mci_writel(host, CMDR, cmd_flags);
495 }
496
send_stop_cmd(struct atmel_mci * host,struct mmc_data * data)497 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
498 {
499 atmci_start_command(host, data->stop, host->stop_cmdr);
500 mci_writel(host, IER, MCI_CMDRDY);
501 }
502
503 #ifdef CONFIG_MMC_ATMELMCI_DMA
atmci_dma_cleanup(struct atmel_mci * host)504 static void atmci_dma_cleanup(struct atmel_mci *host)
505 {
506 struct mmc_data *data = host->data;
507
508 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
509 ((data->flags & MMC_DATA_WRITE)
510 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
511 }
512
atmci_stop_dma(struct atmel_mci * host)513 static void atmci_stop_dma(struct atmel_mci *host)
514 {
515 struct dma_chan *chan = host->data_chan;
516
517 if (chan) {
518 chan->device->device_terminate_all(chan);
519 atmci_dma_cleanup(host);
520 } else {
521 /* Data transfer was stopped by the interrupt handler */
522 atmci_set_pending(host, EVENT_XFER_COMPLETE);
523 mci_writel(host, IER, MCI_NOTBUSY);
524 }
525 }
526
527 /* This function is called by the DMA driver from tasklet context. */
atmci_dma_complete(void * arg)528 static void atmci_dma_complete(void *arg)
529 {
530 struct atmel_mci *host = arg;
531 struct mmc_data *data = host->data;
532
533 dev_vdbg(&host->pdev->dev, "DMA complete\n");
534
535 atmci_dma_cleanup(host);
536
537 /*
538 * If the card was removed, data will be NULL. No point trying
539 * to send the stop command or waiting for NBUSY in this case.
540 */
541 if (data) {
542 atmci_set_pending(host, EVENT_XFER_COMPLETE);
543 tasklet_schedule(&host->tasklet);
544
545 /*
546 * Regardless of what the documentation says, we have
547 * to wait for NOTBUSY even after block read
548 * operations.
549 *
550 * When the DMA transfer is complete, the controller
551 * may still be reading the CRC from the card, i.e.
552 * the data transfer is still in progress and we
553 * haven't seen all the potential error bits yet.
554 *
555 * The interrupt handler will schedule a different
556 * tasklet to finish things up when the data transfer
557 * is completely done.
558 *
559 * We may not complete the mmc request here anyway
560 * because the mmc layer may call back and cause us to
561 * violate the "don't submit new operations from the
562 * completion callback" rule of the dma engine
563 * framework.
564 */
565 mci_writel(host, IER, MCI_NOTBUSY);
566 }
567 }
568
569 static int
atmci_submit_data_dma(struct atmel_mci * host,struct mmc_data * data)570 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
571 {
572 struct dma_chan *chan;
573 struct dma_async_tx_descriptor *desc;
574 struct scatterlist *sg;
575 unsigned int i;
576 enum dma_data_direction direction;
577
578 /*
579 * We don't do DMA on "complex" transfers, i.e. with
580 * non-word-aligned buffers or lengths. Also, we don't bother
581 * with all the DMA setup overhead for short transfers.
582 */
583 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
584 return -EINVAL;
585 if (data->blksz & 3)
586 return -EINVAL;
587
588 for_each_sg(data->sg, sg, data->sg_len, i) {
589 if (sg->offset & 3 || sg->length & 3)
590 return -EINVAL;
591 }
592
593 /* If we don't have a channel, we can't do DMA */
594 chan = host->dma.chan;
595 if (chan)
596 host->data_chan = chan;
597
598 if (!chan)
599 return -ENODEV;
600
601 if (data->flags & MMC_DATA_READ)
602 direction = DMA_FROM_DEVICE;
603 else
604 direction = DMA_TO_DEVICE;
605
606 desc = chan->device->device_prep_slave_sg(chan,
607 data->sg, data->sg_len, direction,
608 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
609 if (!desc)
610 return -ENOMEM;
611
612 host->dma.data_desc = desc;
613 desc->callback = atmci_dma_complete;
614 desc->callback_param = host;
615 desc->tx_submit(desc);
616
617 /* Go! */
618 chan->device->device_issue_pending(chan);
619
620 return 0;
621 }
622
623 #else /* CONFIG_MMC_ATMELMCI_DMA */
624
atmci_submit_data_dma(struct atmel_mci * host,struct mmc_data * data)625 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
626 {
627 return -ENOSYS;
628 }
629
atmci_stop_dma(struct atmel_mci * host)630 static void atmci_stop_dma(struct atmel_mci *host)
631 {
632 /* Data transfer was stopped by the interrupt handler */
633 atmci_set_pending(host, EVENT_XFER_COMPLETE);
634 mci_writel(host, IER, MCI_NOTBUSY);
635 }
636
637 #endif /* CONFIG_MMC_ATMELMCI_DMA */
638
639 /*
640 * Returns a mask of interrupt flags to be enabled after the whole
641 * request has been prepared.
642 */
atmci_submit_data(struct atmel_mci * host,struct mmc_data * data)643 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
644 {
645 u32 iflags;
646
647 data->error = -EINPROGRESS;
648
649 WARN_ON(host->data);
650 host->sg = NULL;
651 host->data = data;
652
653 iflags = ATMCI_DATA_ERROR_FLAGS;
654 if (atmci_submit_data_dma(host, data)) {
655 host->data_chan = NULL;
656
657 /*
658 * Errata: MMC data write operation with less than 12
659 * bytes is impossible.
660 *
661 * Errata: MCI Transmit Data Register (TDR) FIFO
662 * corruption when length is not multiple of 4.
663 */
664 if (data->blocks * data->blksz < 12
665 || (data->blocks * data->blksz) & 3)
666 host->need_reset = true;
667
668 host->sg = data->sg;
669 host->pio_offset = 0;
670 if (data->flags & MMC_DATA_READ)
671 iflags |= MCI_RXRDY;
672 else
673 iflags |= MCI_TXRDY;
674 }
675
676 return iflags;
677 }
678
atmci_start_request(struct atmel_mci * host,struct atmel_mci_slot * slot)679 static void atmci_start_request(struct atmel_mci *host,
680 struct atmel_mci_slot *slot)
681 {
682 struct mmc_request *mrq;
683 struct mmc_command *cmd;
684 struct mmc_data *data;
685 u32 iflags;
686 u32 cmdflags;
687
688 mrq = slot->mrq;
689 host->cur_slot = slot;
690 host->mrq = mrq;
691
692 host->pending_events = 0;
693 host->completed_events = 0;
694 host->data_status = 0;
695
696 if (host->need_reset) {
697 mci_writel(host, CR, MCI_CR_SWRST);
698 mci_writel(host, CR, MCI_CR_MCIEN);
699 mci_writel(host, MR, host->mode_reg);
700 host->need_reset = false;
701 }
702 mci_writel(host, SDCR, slot->sdc_reg);
703
704 iflags = mci_readl(host, IMR);
705 if (iflags)
706 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
707 iflags);
708
709 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
710 /* Send init sequence (74 clock cycles) */
711 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
712 while (!(mci_readl(host, SR) & MCI_CMDRDY))
713 cpu_relax();
714 }
715 data = mrq->data;
716 if (data) {
717 atmci_set_timeout(host, slot, data);
718
719 /* Must set block count/size before sending command */
720 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
721 | MCI_BLKLEN(data->blksz));
722 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
723 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
724 }
725
726 iflags = MCI_CMDRDY;
727 cmd = mrq->cmd;
728 cmdflags = atmci_prepare_command(slot->mmc, cmd);
729 atmci_start_command(host, cmd, cmdflags);
730
731 if (data)
732 iflags |= atmci_submit_data(host, data);
733
734 if (mrq->stop) {
735 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
736 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
737 if (!(data->flags & MMC_DATA_WRITE))
738 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
739 if (data->flags & MMC_DATA_STREAM)
740 host->stop_cmdr |= MCI_CMDR_STREAM;
741 else
742 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
743 }
744
745 /*
746 * We could have enabled interrupts earlier, but I suspect
747 * that would open up a nice can of interesting race
748 * conditions (e.g. command and data complete, but stop not
749 * prepared yet.)
750 */
751 mci_writel(host, IER, iflags);
752 }
753
atmci_queue_request(struct atmel_mci * host,struct atmel_mci_slot * slot,struct mmc_request * mrq)754 static void atmci_queue_request(struct atmel_mci *host,
755 struct atmel_mci_slot *slot, struct mmc_request *mrq)
756 {
757 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
758 host->state);
759
760 spin_lock_bh(&host->lock);
761 slot->mrq = mrq;
762 if (host->state == STATE_IDLE) {
763 host->state = STATE_SENDING_CMD;
764 atmci_start_request(host, slot);
765 } else {
766 list_add_tail(&slot->queue_node, &host->queue);
767 }
768 spin_unlock_bh(&host->lock);
769 }
770
atmci_request(struct mmc_host * mmc,struct mmc_request * mrq)771 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
772 {
773 struct atmel_mci_slot *slot = mmc_priv(mmc);
774 struct atmel_mci *host = slot->host;
775 struct mmc_data *data;
776
777 WARN_ON(slot->mrq);
778
779 /*
780 * We may "know" the card is gone even though there's still an
781 * electrical connection. If so, we really need to communicate
782 * this to the MMC core since there won't be any more
783 * interrupts as the card is completely removed. Otherwise,
784 * the MMC core might believe the card is still there even
785 * though the card was just removed very slowly.
786 */
787 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
788 mrq->cmd->error = -ENOMEDIUM;
789 mmc_request_done(mmc, mrq);
790 return;
791 }
792
793 /* We don't support multiple blocks of weird lengths. */
794 data = mrq->data;
795 if (data && data->blocks > 1 && data->blksz & 3) {
796 mrq->cmd->error = -EINVAL;
797 mmc_request_done(mmc, mrq);
798 }
799
800 atmci_queue_request(host, slot, mrq);
801 }
802
atmci_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)803 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
804 {
805 struct atmel_mci_slot *slot = mmc_priv(mmc);
806 struct atmel_mci *host = slot->host;
807 unsigned int i;
808
809 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
810 switch (ios->bus_width) {
811 case MMC_BUS_WIDTH_1:
812 slot->sdc_reg |= MCI_SDCBUS_1BIT;
813 break;
814 case MMC_BUS_WIDTH_4:
815 slot->sdc_reg = MCI_SDCBUS_4BIT;
816 break;
817 }
818
819 if (ios->clock) {
820 unsigned int clock_min = ~0U;
821 u32 clkdiv;
822
823 spin_lock_bh(&host->lock);
824 if (!host->mode_reg) {
825 clk_enable(host->mck);
826 mci_writel(host, CR, MCI_CR_SWRST);
827 mci_writel(host, CR, MCI_CR_MCIEN);
828 }
829
830 /*
831 * Use mirror of ios->clock to prevent race with mmc
832 * core ios update when finding the minimum.
833 */
834 slot->clock = ios->clock;
835 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
836 if (host->slot[i] && host->slot[i]->clock
837 && host->slot[i]->clock < clock_min)
838 clock_min = host->slot[i]->clock;
839 }
840
841 /* Calculate clock divider */
842 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
843 if (clkdiv > 255) {
844 dev_warn(&mmc->class_dev,
845 "clock %u too slow; using %lu\n",
846 clock_min, host->bus_hz / (2 * 256));
847 clkdiv = 255;
848 }
849
850 /*
851 * WRPROOF and RDPROOF prevent overruns/underruns by
852 * stopping the clock when the FIFO is full/empty.
853 * This state is not expected to last for long.
854 */
855 host->mode_reg = MCI_MR_CLKDIV(clkdiv) | MCI_MR_WRPROOF
856 | MCI_MR_RDPROOF;
857
858 if (list_empty(&host->queue))
859 mci_writel(host, MR, host->mode_reg);
860 else
861 host->need_clock_update = true;
862
863 spin_unlock_bh(&host->lock);
864 } else {
865 bool any_slot_active = false;
866
867 spin_lock_bh(&host->lock);
868 slot->clock = 0;
869 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
870 if (host->slot[i] && host->slot[i]->clock) {
871 any_slot_active = true;
872 break;
873 }
874 }
875 if (!any_slot_active) {
876 mci_writel(host, CR, MCI_CR_MCIDIS);
877 if (host->mode_reg) {
878 mci_readl(host, MR);
879 clk_disable(host->mck);
880 }
881 host->mode_reg = 0;
882 }
883 spin_unlock_bh(&host->lock);
884 }
885
886 switch (ios->power_mode) {
887 case MMC_POWER_UP:
888 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
889 break;
890 default:
891 /*
892 * TODO: None of the currently available AVR32-based
893 * boards allow MMC power to be turned off. Implement
894 * power control when this can be tested properly.
895 *
896 * We also need to hook this into the clock management
897 * somehow so that newly inserted cards aren't
898 * subjected to a fast clock before we have a chance
899 * to figure out what the maximum rate is. Currently,
900 * there's no way to avoid this, and there never will
901 * be for boards that don't support power control.
902 */
903 break;
904 }
905 }
906
atmci_get_ro(struct mmc_host * mmc)907 static int atmci_get_ro(struct mmc_host *mmc)
908 {
909 int read_only = -ENOSYS;
910 struct atmel_mci_slot *slot = mmc_priv(mmc);
911
912 if (gpio_is_valid(slot->wp_pin)) {
913 read_only = gpio_get_value(slot->wp_pin);
914 dev_dbg(&mmc->class_dev, "card is %s\n",
915 read_only ? "read-only" : "read-write");
916 }
917
918 return read_only;
919 }
920
atmci_get_cd(struct mmc_host * mmc)921 static int atmci_get_cd(struct mmc_host *mmc)
922 {
923 int present = -ENOSYS;
924 struct atmel_mci_slot *slot = mmc_priv(mmc);
925
926 if (gpio_is_valid(slot->detect_pin)) {
927 present = !gpio_get_value(slot->detect_pin);
928 dev_dbg(&mmc->class_dev, "card is %spresent\n",
929 present ? "" : "not ");
930 }
931
932 return present;
933 }
934
935 static const struct mmc_host_ops atmci_ops = {
936 .request = atmci_request,
937 .set_ios = atmci_set_ios,
938 .get_ro = atmci_get_ro,
939 .get_cd = atmci_get_cd,
940 };
941
942 /* Called with host->lock held */
atmci_request_end(struct atmel_mci * host,struct mmc_request * mrq)943 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
944 __releases(&host->lock)
945 __acquires(&host->lock)
946 {
947 struct atmel_mci_slot *slot = NULL;
948 struct mmc_host *prev_mmc = host->cur_slot->mmc;
949
950 WARN_ON(host->cmd || host->data);
951
952 /*
953 * Update the MMC clock rate if necessary. This may be
954 * necessary if set_ios() is called when a different slot is
955 * busy transfering data.
956 */
957 if (host->need_clock_update)
958 mci_writel(host, MR, host->mode_reg);
959
960 host->cur_slot->mrq = NULL;
961 host->mrq = NULL;
962 if (!list_empty(&host->queue)) {
963 slot = list_entry(host->queue.next,
964 struct atmel_mci_slot, queue_node);
965 list_del(&slot->queue_node);
966 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
967 mmc_hostname(slot->mmc));
968 host->state = STATE_SENDING_CMD;
969 atmci_start_request(host, slot);
970 } else {
971 dev_vdbg(&host->pdev->dev, "list empty\n");
972 host->state = STATE_IDLE;
973 }
974
975 spin_unlock(&host->lock);
976 mmc_request_done(prev_mmc, mrq);
977 spin_lock(&host->lock);
978 }
979
atmci_command_complete(struct atmel_mci * host,struct mmc_command * cmd)980 static void atmci_command_complete(struct atmel_mci *host,
981 struct mmc_command *cmd)
982 {
983 u32 status = host->cmd_status;
984
985 /* Read the response from the card (up to 16 bytes) */
986 cmd->resp[0] = mci_readl(host, RSPR);
987 cmd->resp[1] = mci_readl(host, RSPR);
988 cmd->resp[2] = mci_readl(host, RSPR);
989 cmd->resp[3] = mci_readl(host, RSPR);
990
991 if (status & MCI_RTOE)
992 cmd->error = -ETIMEDOUT;
993 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
994 cmd->error = -EILSEQ;
995 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
996 cmd->error = -EIO;
997 else
998 cmd->error = 0;
999
1000 if (cmd->error) {
1001 dev_dbg(&host->pdev->dev,
1002 "command error: status=0x%08x\n", status);
1003
1004 if (cmd->data) {
1005 host->data = NULL;
1006 atmci_stop_dma(host);
1007 mci_writel(host, IDR, MCI_NOTBUSY
1008 | MCI_TXRDY | MCI_RXRDY
1009 | ATMCI_DATA_ERROR_FLAGS);
1010 }
1011 }
1012 }
1013
atmci_detect_change(unsigned long data)1014 static void atmci_detect_change(unsigned long data)
1015 {
1016 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1017 bool present;
1018 bool present_old;
1019
1020 /*
1021 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1022 * freeing the interrupt. We must not re-enable the interrupt
1023 * if it has been freed, and if we're shutting down, it
1024 * doesn't really matter whether the card is present or not.
1025 */
1026 smp_rmb();
1027 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1028 return;
1029
1030 enable_irq(gpio_to_irq(slot->detect_pin));
1031 present = !gpio_get_value(slot->detect_pin);
1032 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1033
1034 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1035 present, present_old);
1036
1037 if (present != present_old) {
1038 struct atmel_mci *host = slot->host;
1039 struct mmc_request *mrq;
1040
1041 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1042 present ? "inserted" : "removed");
1043
1044 spin_lock(&host->lock);
1045
1046 if (!present)
1047 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1048 else
1049 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1050
1051 /* Clean up queue if present */
1052 mrq = slot->mrq;
1053 if (mrq) {
1054 if (mrq == host->mrq) {
1055 /*
1056 * Reset controller to terminate any ongoing
1057 * commands or data transfers.
1058 */
1059 mci_writel(host, CR, MCI_CR_SWRST);
1060 mci_writel(host, CR, MCI_CR_MCIEN);
1061 mci_writel(host, MR, host->mode_reg);
1062
1063 host->data = NULL;
1064 host->cmd = NULL;
1065
1066 switch (host->state) {
1067 case STATE_IDLE:
1068 break;
1069 case STATE_SENDING_CMD:
1070 mrq->cmd->error = -ENOMEDIUM;
1071 if (!mrq->data)
1072 break;
1073 /* fall through */
1074 case STATE_SENDING_DATA:
1075 mrq->data->error = -ENOMEDIUM;
1076 atmci_stop_dma(host);
1077 break;
1078 case STATE_DATA_BUSY:
1079 case STATE_DATA_ERROR:
1080 if (mrq->data->error == -EINPROGRESS)
1081 mrq->data->error = -ENOMEDIUM;
1082 if (!mrq->stop)
1083 break;
1084 /* fall through */
1085 case STATE_SENDING_STOP:
1086 mrq->stop->error = -ENOMEDIUM;
1087 break;
1088 }
1089
1090 atmci_request_end(host, mrq);
1091 } else {
1092 list_del(&slot->queue_node);
1093 mrq->cmd->error = -ENOMEDIUM;
1094 if (mrq->data)
1095 mrq->data->error = -ENOMEDIUM;
1096 if (mrq->stop)
1097 mrq->stop->error = -ENOMEDIUM;
1098
1099 spin_unlock(&host->lock);
1100 mmc_request_done(slot->mmc, mrq);
1101 spin_lock(&host->lock);
1102 }
1103 }
1104 spin_unlock(&host->lock);
1105
1106 mmc_detect_change(slot->mmc, 0);
1107 }
1108 }
1109
atmci_tasklet_func(unsigned long priv)1110 static void atmci_tasklet_func(unsigned long priv)
1111 {
1112 struct atmel_mci *host = (struct atmel_mci *)priv;
1113 struct mmc_request *mrq = host->mrq;
1114 struct mmc_data *data = host->data;
1115 struct mmc_command *cmd = host->cmd;
1116 enum atmel_mci_state state = host->state;
1117 enum atmel_mci_state prev_state;
1118 u32 status;
1119
1120 spin_lock(&host->lock);
1121
1122 state = host->state;
1123
1124 dev_vdbg(&host->pdev->dev,
1125 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1126 state, host->pending_events, host->completed_events,
1127 mci_readl(host, IMR));
1128
1129 do {
1130 prev_state = state;
1131
1132 switch (state) {
1133 case STATE_IDLE:
1134 break;
1135
1136 case STATE_SENDING_CMD:
1137 if (!atmci_test_and_clear_pending(host,
1138 EVENT_CMD_COMPLETE))
1139 break;
1140
1141 host->cmd = NULL;
1142 atmci_set_completed(host, EVENT_CMD_COMPLETE);
1143 atmci_command_complete(host, mrq->cmd);
1144 if (!mrq->data || cmd->error) {
1145 atmci_request_end(host, host->mrq);
1146 goto unlock;
1147 }
1148
1149 prev_state = state = STATE_SENDING_DATA;
1150 /* fall through */
1151
1152 case STATE_SENDING_DATA:
1153 if (atmci_test_and_clear_pending(host,
1154 EVENT_DATA_ERROR)) {
1155 atmci_stop_dma(host);
1156 if (data->stop)
1157 send_stop_cmd(host, data);
1158 state = STATE_DATA_ERROR;
1159 break;
1160 }
1161
1162 if (!atmci_test_and_clear_pending(host,
1163 EVENT_XFER_COMPLETE))
1164 break;
1165
1166 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1167 prev_state = state = STATE_DATA_BUSY;
1168 /* fall through */
1169
1170 case STATE_DATA_BUSY:
1171 if (!atmci_test_and_clear_pending(host,
1172 EVENT_DATA_COMPLETE))
1173 break;
1174
1175 host->data = NULL;
1176 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1177 status = host->data_status;
1178 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1179 if (status & MCI_DTOE) {
1180 dev_dbg(&host->pdev->dev,
1181 "data timeout error\n");
1182 data->error = -ETIMEDOUT;
1183 } else if (status & MCI_DCRCE) {
1184 dev_dbg(&host->pdev->dev,
1185 "data CRC error\n");
1186 data->error = -EILSEQ;
1187 } else {
1188 dev_dbg(&host->pdev->dev,
1189 "data FIFO error (status=%08x)\n",
1190 status);
1191 data->error = -EIO;
1192 }
1193 } else {
1194 data->bytes_xfered = data->blocks * data->blksz;
1195 data->error = 0;
1196 }
1197
1198 if (!data->stop) {
1199 atmci_request_end(host, host->mrq);
1200 goto unlock;
1201 }
1202
1203 prev_state = state = STATE_SENDING_STOP;
1204 if (!data->error)
1205 send_stop_cmd(host, data);
1206 /* fall through */
1207
1208 case STATE_SENDING_STOP:
1209 if (!atmci_test_and_clear_pending(host,
1210 EVENT_CMD_COMPLETE))
1211 break;
1212
1213 host->cmd = NULL;
1214 atmci_command_complete(host, mrq->stop);
1215 atmci_request_end(host, host->mrq);
1216 goto unlock;
1217
1218 case STATE_DATA_ERROR:
1219 if (!atmci_test_and_clear_pending(host,
1220 EVENT_XFER_COMPLETE))
1221 break;
1222
1223 state = STATE_DATA_BUSY;
1224 break;
1225 }
1226 } while (state != prev_state);
1227
1228 host->state = state;
1229
1230 unlock:
1231 spin_unlock(&host->lock);
1232 }
1233
atmci_read_data_pio(struct atmel_mci * host)1234 static void atmci_read_data_pio(struct atmel_mci *host)
1235 {
1236 struct scatterlist *sg = host->sg;
1237 void *buf = sg_virt(sg);
1238 unsigned int offset = host->pio_offset;
1239 struct mmc_data *data = host->data;
1240 u32 value;
1241 u32 status;
1242 unsigned int nbytes = 0;
1243
1244 do {
1245 value = mci_readl(host, RDR);
1246 if (likely(offset + 4 <= sg->length)) {
1247 put_unaligned(value, (u32 *)(buf + offset));
1248
1249 offset += 4;
1250 nbytes += 4;
1251
1252 if (offset == sg->length) {
1253 flush_dcache_page(sg_page(sg));
1254 host->sg = sg = sg_next(sg);
1255 if (!sg)
1256 goto done;
1257
1258 offset = 0;
1259 buf = sg_virt(sg);
1260 }
1261 } else {
1262 unsigned int remaining = sg->length - offset;
1263 memcpy(buf + offset, &value, remaining);
1264 nbytes += remaining;
1265
1266 flush_dcache_page(sg_page(sg));
1267 host->sg = sg = sg_next(sg);
1268 if (!sg)
1269 goto done;
1270
1271 offset = 4 - remaining;
1272 buf = sg_virt(sg);
1273 memcpy(buf, (u8 *)&value + remaining, offset);
1274 nbytes += offset;
1275 }
1276
1277 status = mci_readl(host, SR);
1278 if (status & ATMCI_DATA_ERROR_FLAGS) {
1279 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1280 | ATMCI_DATA_ERROR_FLAGS));
1281 host->data_status = status;
1282 data->bytes_xfered += nbytes;
1283 smp_wmb();
1284 atmci_set_pending(host, EVENT_DATA_ERROR);
1285 tasklet_schedule(&host->tasklet);
1286 return;
1287 }
1288 } while (status & MCI_RXRDY);
1289
1290 host->pio_offset = offset;
1291 data->bytes_xfered += nbytes;
1292
1293 return;
1294
1295 done:
1296 mci_writel(host, IDR, MCI_RXRDY);
1297 mci_writel(host, IER, MCI_NOTBUSY);
1298 data->bytes_xfered += nbytes;
1299 smp_wmb();
1300 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1301 }
1302
atmci_write_data_pio(struct atmel_mci * host)1303 static void atmci_write_data_pio(struct atmel_mci *host)
1304 {
1305 struct scatterlist *sg = host->sg;
1306 void *buf = sg_virt(sg);
1307 unsigned int offset = host->pio_offset;
1308 struct mmc_data *data = host->data;
1309 u32 value;
1310 u32 status;
1311 unsigned int nbytes = 0;
1312
1313 do {
1314 if (likely(offset + 4 <= sg->length)) {
1315 value = get_unaligned((u32 *)(buf + offset));
1316 mci_writel(host, TDR, value);
1317
1318 offset += 4;
1319 nbytes += 4;
1320 if (offset == sg->length) {
1321 host->sg = sg = sg_next(sg);
1322 if (!sg)
1323 goto done;
1324
1325 offset = 0;
1326 buf = sg_virt(sg);
1327 }
1328 } else {
1329 unsigned int remaining = sg->length - offset;
1330
1331 value = 0;
1332 memcpy(&value, buf + offset, remaining);
1333 nbytes += remaining;
1334
1335 host->sg = sg = sg_next(sg);
1336 if (!sg) {
1337 mci_writel(host, TDR, value);
1338 goto done;
1339 }
1340
1341 offset = 4 - remaining;
1342 buf = sg_virt(sg);
1343 memcpy((u8 *)&value + remaining, buf, offset);
1344 mci_writel(host, TDR, value);
1345 nbytes += offset;
1346 }
1347
1348 status = mci_readl(host, SR);
1349 if (status & ATMCI_DATA_ERROR_FLAGS) {
1350 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1351 | ATMCI_DATA_ERROR_FLAGS));
1352 host->data_status = status;
1353 data->bytes_xfered += nbytes;
1354 smp_wmb();
1355 atmci_set_pending(host, EVENT_DATA_ERROR);
1356 tasklet_schedule(&host->tasklet);
1357 return;
1358 }
1359 } while (status & MCI_TXRDY);
1360
1361 host->pio_offset = offset;
1362 data->bytes_xfered += nbytes;
1363
1364 return;
1365
1366 done:
1367 mci_writel(host, IDR, MCI_TXRDY);
1368 mci_writel(host, IER, MCI_NOTBUSY);
1369 data->bytes_xfered += nbytes;
1370 smp_wmb();
1371 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1372 }
1373
atmci_cmd_interrupt(struct atmel_mci * host,u32 status)1374 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1375 {
1376 mci_writel(host, IDR, MCI_CMDRDY);
1377
1378 host->cmd_status = status;
1379 smp_wmb();
1380 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1381 tasklet_schedule(&host->tasklet);
1382 }
1383
atmci_interrupt(int irq,void * dev_id)1384 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1385 {
1386 struct atmel_mci *host = dev_id;
1387 u32 status, mask, pending;
1388 unsigned int pass_count = 0;
1389
1390 do {
1391 status = mci_readl(host, SR);
1392 mask = mci_readl(host, IMR);
1393 pending = status & mask;
1394 if (!pending)
1395 break;
1396
1397 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1398 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1399 | MCI_RXRDY | MCI_TXRDY);
1400 pending &= mci_readl(host, IMR);
1401
1402 host->data_status = status;
1403 smp_wmb();
1404 atmci_set_pending(host, EVENT_DATA_ERROR);
1405 tasklet_schedule(&host->tasklet);
1406 }
1407 if (pending & MCI_NOTBUSY) {
1408 mci_writel(host, IDR,
1409 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1410 if (!host->data_status)
1411 host->data_status = status;
1412 smp_wmb();
1413 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1414 tasklet_schedule(&host->tasklet);
1415 }
1416 if (pending & MCI_RXRDY)
1417 atmci_read_data_pio(host);
1418 if (pending & MCI_TXRDY)
1419 atmci_write_data_pio(host);
1420
1421 if (pending & MCI_CMDRDY)
1422 atmci_cmd_interrupt(host, status);
1423 } while (pass_count++ < 5);
1424
1425 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1426 }
1427
atmci_detect_interrupt(int irq,void * dev_id)1428 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1429 {
1430 struct atmel_mci_slot *slot = dev_id;
1431
1432 /*
1433 * Disable interrupts until the pin has stabilized and check
1434 * the state then. Use mod_timer() since we may be in the
1435 * middle of the timer routine when this interrupt triggers.
1436 */
1437 disable_irq_nosync(irq);
1438 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1439
1440 return IRQ_HANDLED;
1441 }
1442
atmci_init_slot(struct atmel_mci * host,struct mci_slot_pdata * slot_data,unsigned int id,u32 sdc_reg)1443 static int __init atmci_init_slot(struct atmel_mci *host,
1444 struct mci_slot_pdata *slot_data, unsigned int id,
1445 u32 sdc_reg)
1446 {
1447 struct mmc_host *mmc;
1448 struct atmel_mci_slot *slot;
1449
1450 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1451 if (!mmc)
1452 return -ENOMEM;
1453
1454 slot = mmc_priv(mmc);
1455 slot->mmc = mmc;
1456 slot->host = host;
1457 slot->detect_pin = slot_data->detect_pin;
1458 slot->wp_pin = slot_data->wp_pin;
1459 slot->sdc_reg = sdc_reg;
1460
1461 mmc->ops = &atmci_ops;
1462 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1463 mmc->f_max = host->bus_hz / 2;
1464 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1465 if (slot_data->bus_width >= 4)
1466 mmc->caps |= MMC_CAP_4_BIT_DATA;
1467
1468 mmc->max_hw_segs = 64;
1469 mmc->max_phys_segs = 64;
1470 mmc->max_req_size = 32768 * 512;
1471 mmc->max_blk_size = 32768;
1472 mmc->max_blk_count = 512;
1473
1474 /* Assume card is present initially */
1475 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1476 if (gpio_is_valid(slot->detect_pin)) {
1477 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1478 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1479 slot->detect_pin = -EBUSY;
1480 } else if (gpio_get_value(slot->detect_pin)) {
1481 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1482 }
1483 }
1484
1485 if (!gpio_is_valid(slot->detect_pin))
1486 mmc->caps |= MMC_CAP_NEEDS_POLL;
1487
1488 if (gpio_is_valid(slot->wp_pin)) {
1489 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1490 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1491 slot->wp_pin = -EBUSY;
1492 }
1493 }
1494
1495 host->slot[id] = slot;
1496 mmc_add_host(mmc);
1497
1498 if (gpio_is_valid(slot->detect_pin)) {
1499 int ret;
1500
1501 setup_timer(&slot->detect_timer, atmci_detect_change,
1502 (unsigned long)slot);
1503
1504 ret = request_irq(gpio_to_irq(slot->detect_pin),
1505 atmci_detect_interrupt,
1506 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1507 "mmc-detect", slot);
1508 if (ret) {
1509 dev_dbg(&mmc->class_dev,
1510 "could not request IRQ %d for detect pin\n",
1511 gpio_to_irq(slot->detect_pin));
1512 gpio_free(slot->detect_pin);
1513 slot->detect_pin = -EBUSY;
1514 }
1515 }
1516
1517 atmci_init_debugfs(slot);
1518
1519 return 0;
1520 }
1521
atmci_cleanup_slot(struct atmel_mci_slot * slot,unsigned int id)1522 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1523 unsigned int id)
1524 {
1525 /* Debugfs stuff is cleaned up by mmc core */
1526
1527 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1528 smp_wmb();
1529
1530 mmc_remove_host(slot->mmc);
1531
1532 if (gpio_is_valid(slot->detect_pin)) {
1533 int pin = slot->detect_pin;
1534
1535 free_irq(gpio_to_irq(pin), slot);
1536 del_timer_sync(&slot->detect_timer);
1537 gpio_free(pin);
1538 }
1539 if (gpio_is_valid(slot->wp_pin))
1540 gpio_free(slot->wp_pin);
1541
1542 slot->host->slot[id] = NULL;
1543 mmc_free_host(slot->mmc);
1544 }
1545
1546 #ifdef CONFIG_MMC_ATMELMCI_DMA
filter(struct dma_chan * chan,void * slave)1547 static bool filter(struct dma_chan *chan, void *slave)
1548 {
1549 struct dw_dma_slave *dws = slave;
1550
1551 if (dws->dma_dev == chan->device->dev) {
1552 chan->private = dws;
1553 return true;
1554 } else
1555 return false;
1556 }
1557 #endif
1558
atmci_probe(struct platform_device * pdev)1559 static int __init atmci_probe(struct platform_device *pdev)
1560 {
1561 struct mci_platform_data *pdata;
1562 struct atmel_mci *host;
1563 struct resource *regs;
1564 unsigned int nr_slots;
1565 int irq;
1566 int ret;
1567
1568 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1569 if (!regs)
1570 return -ENXIO;
1571 pdata = pdev->dev.platform_data;
1572 if (!pdata)
1573 return -ENXIO;
1574 irq = platform_get_irq(pdev, 0);
1575 if (irq < 0)
1576 return irq;
1577
1578 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1579 if (!host)
1580 return -ENOMEM;
1581
1582 host->pdev = pdev;
1583 spin_lock_init(&host->lock);
1584 INIT_LIST_HEAD(&host->queue);
1585
1586 host->mck = clk_get(&pdev->dev, "mci_clk");
1587 if (IS_ERR(host->mck)) {
1588 ret = PTR_ERR(host->mck);
1589 goto err_clk_get;
1590 }
1591
1592 ret = -ENOMEM;
1593 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1594 if (!host->regs)
1595 goto err_ioremap;
1596
1597 clk_enable(host->mck);
1598 mci_writel(host, CR, MCI_CR_SWRST);
1599 host->bus_hz = clk_get_rate(host->mck);
1600 clk_disable(host->mck);
1601
1602 host->mapbase = regs->start;
1603
1604 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1605
1606 ret = request_irq(irq, atmci_interrupt, 0, pdev->dev.bus_id, host);
1607 if (ret)
1608 goto err_request_irq;
1609
1610 #ifdef CONFIG_MMC_ATMELMCI_DMA
1611 if (pdata->dma_slave.dma_dev) {
1612 struct dw_dma_slave *dws = &pdata->dma_slave;
1613 dma_cap_mask_t mask;
1614
1615 dws->tx_reg = regs->start + MCI_TDR;
1616 dws->rx_reg = regs->start + MCI_RDR;
1617
1618 /* Try to grab a DMA channel */
1619 dma_cap_zero(mask);
1620 dma_cap_set(DMA_SLAVE, mask);
1621 host->dma.chan = dma_request_channel(mask, filter, dws);
1622 }
1623 if (!host->dma.chan)
1624 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1625 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1626
1627 platform_set_drvdata(pdev, host);
1628
1629 /* We need at least one slot to succeed */
1630 nr_slots = 0;
1631 ret = -ENODEV;
1632 if (pdata->slot[0].bus_width) {
1633 ret = atmci_init_slot(host, &pdata->slot[0],
1634 MCI_SDCSEL_SLOT_A, 0);
1635 if (!ret)
1636 nr_slots++;
1637 }
1638 if (pdata->slot[1].bus_width) {
1639 ret = atmci_init_slot(host, &pdata->slot[1],
1640 MCI_SDCSEL_SLOT_B, 1);
1641 if (!ret)
1642 nr_slots++;
1643 }
1644
1645 if (!nr_slots)
1646 goto err_init_slot;
1647
1648 dev_info(&pdev->dev,
1649 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1650 host->mapbase, irq, nr_slots);
1651
1652 return 0;
1653
1654 err_init_slot:
1655 #ifdef CONFIG_MMC_ATMELMCI_DMA
1656 if (host->dma.chan)
1657 dma_release_channel(host->dma.chan);
1658 #endif
1659 free_irq(irq, host);
1660 err_request_irq:
1661 iounmap(host->regs);
1662 err_ioremap:
1663 clk_put(host->mck);
1664 err_clk_get:
1665 kfree(host);
1666 return ret;
1667 }
1668
atmci_remove(struct platform_device * pdev)1669 static int __exit atmci_remove(struct platform_device *pdev)
1670 {
1671 struct atmel_mci *host = platform_get_drvdata(pdev);
1672 unsigned int i;
1673
1674 platform_set_drvdata(pdev, NULL);
1675
1676 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1677 if (host->slot[i])
1678 atmci_cleanup_slot(host->slot[i], i);
1679 }
1680
1681 clk_enable(host->mck);
1682 mci_writel(host, IDR, ~0UL);
1683 mci_writel(host, CR, MCI_CR_MCIDIS);
1684 mci_readl(host, SR);
1685 clk_disable(host->mck);
1686
1687 #ifdef CONFIG_MMC_ATMELMCI_DMA
1688 if (host->dma.chan)
1689 dma_release_channel(host->dma.chan);
1690 #endif
1691
1692 free_irq(platform_get_irq(pdev, 0), host);
1693 iounmap(host->regs);
1694
1695 clk_put(host->mck);
1696 kfree(host);
1697
1698 return 0;
1699 }
1700
1701 static struct platform_driver atmci_driver = {
1702 .remove = __exit_p(atmci_remove),
1703 .driver = {
1704 .name = "atmel_mci",
1705 },
1706 };
1707
atmci_init(void)1708 static int __init atmci_init(void)
1709 {
1710 return platform_driver_probe(&atmci_driver, atmci_probe);
1711 }
1712
atmci_exit(void)1713 static void __exit atmci_exit(void)
1714 {
1715 platform_driver_unregister(&atmci_driver);
1716 }
1717
1718 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1719 module_exit(atmci_exit);
1720
1721 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1722 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1723 MODULE_LICENSE("GPL v2");
1724