1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
5
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
12
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
17
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
20
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 [link no longer provides useful info -jgarzik]
24 or
25 http://www.parl.clemson.edu/~keithu/hamachi.html
26
27 */
28
29 #define DRV_NAME "hamachi"
30 #define DRV_VERSION "2.1"
31 #define DRV_RELDATE "Sept 11, 2006"
32
33
34 /* A few user-configurable values. */
35
36 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
37 #define final_version
38 #define hamachi_debug debug
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
40 static int max_interrupt_work = 40;
41 static int mtu;
42 /* Default values selected by testing on a dual processor PIII-450 */
43 /* These six interrupt control parameters may be set directly when loading the
44 * module, or through the rx_params and tx_params variables
45 */
46 static int max_rx_latency = 0x11;
47 static int max_rx_gap = 0x05;
48 static int min_rx_pkt = 0x18;
49 static int max_tx_latency = 0x00;
50 static int max_tx_gap = 0x00;
51 static int min_tx_pkt = 0x30;
52
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
56 */
57 static int rx_copybreak;
58
59 /* An override for the hardware detection of bus width.
60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
61 Add 2 to disable parity detection.
62 */
63 static int force32;
64
65
66 /* Used to pass the media type, etc.
67 These exist for driver interoperability.
68 No media types are currently defined.
69 - The lower 4 bits are reserved for the media type.
70 - The next three bits may be set to one of the following:
71 0x00000000 : Autodetect PCI bus
72 0x00000010 : Force 32 bit PCI bus
73 0x00000020 : Disable parity detection
74 0x00000040 : Force 64 bit PCI bus
75 Default is autodetect
76 - The next bit can be used to force half-duplex. This is a bad
77 idea since no known implementations implement half-duplex, and,
78 in general, half-duplex for gigabit ethernet is a bad idea.
79 0x00000080 : Force half-duplex
80 Default is full-duplex.
81 - In the original driver, the ninth bit could be used to force
82 full-duplex. Maintain that for compatibility
83 0x00000200 : Force full-duplex
84 */
85 #define MAX_UNITS 8 /* More are supported, limit only on options */
86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
89 * interruput management. Parameters will be loaded as specified into
90 * the TxIntControl and RxIntControl registers.
91 *
92 * The registers are arranged as follows:
93 * 23 - 16 15 - 8 7 - 0
94 * _________________________________
95 * | min_pkt | max_gap | max_latency |
96 * ---------------------------------
97 * min_pkt : The minimum number of packets processed between
98 * interrupts.
99 * max_gap : The maximum inter-packet gap in units of 8.192 us
100 * max_latency : The absolute time between interrupts in units of 8.192 us
101 *
102 */
103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
105
106 /* Operational parameters that are set at compile time. */
107
108 /* Keep the ring sizes a power of two for compile efficiency.
109 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
110 Making the Tx ring too large decreases the effectiveness of channel
111 bonding and packet priority.
112 There are no ill effects from too-large receive rings, except for
113 excessive memory usage */
114 /* Empirically it appears that the Tx ring needs to be a little bigger
115 for these Gbit adapters or you get into an overrun condition really
116 easily. Also, things appear to work a bit better in back-to-back
117 configurations if the Rx ring is 8 times the size of the Tx ring
118 */
119 #define TX_RING_SIZE 64
120 #define RX_RING_SIZE 512
121 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
122 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
123
124 /*
125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
127 */
128
129 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
130 /* #define ADDRLEN 64 */
131
132 /*
133 * RX_CHECKSUM turns on card-generated receive checksum generation for
134 * TCP and UDP packets. Otherwise the upper layers do the calculation.
135 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
136 * easy mechanism by which to tell the TCP/UDP stack that it need not
137 * generate checksums for this device. But if somebody can find a way
138 * to get that to work, most of the card work is in here already.
139 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
140 */
141 #undef TX_CHECKSUM
142 #define RX_CHECKSUM
143
144 /* Operational parameters that usually are not changed. */
145 /* Time in jiffies before concluding the transmitter is hung. */
146 #define TX_TIMEOUT (5*HZ)
147
148 #include <linux/module.h>
149 #include <linux/kernel.h>
150 #include <linux/string.h>
151 #include <linux/timer.h>
152 #include <linux/time.h>
153 #include <linux/errno.h>
154 #include <linux/ioport.h>
155 #include <linux/slab.h>
156 #include <linux/interrupt.h>
157 #include <linux/pci.h>
158 #include <linux/init.h>
159 #include <linux/ethtool.h>
160 #include <linux/mii.h>
161 #include <linux/netdevice.h>
162 #include <linux/etherdevice.h>
163 #include <linux/skbuff.h>
164 #include <linux/ip.h>
165 #include <linux/delay.h>
166 #include <linux/bitops.h>
167
168 #include <asm/uaccess.h>
169 #include <asm/processor.h> /* Processor type for cache alignment. */
170 #include <asm/io.h>
171 #include <asm/unaligned.h>
172 #include <asm/cache.h>
173
174 static char version[] __devinitdata =
175 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
176 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
177 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
178
179
180 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
181 we need it for hardware checksumming support. FYI... some of
182 the definitions in <netinet/ip.h> conflict/duplicate those in
183 other linux headers causing many compiler warnings.
184 */
185 #ifndef IP_MF
186 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
187 #endif
188
189 /* Define IP_OFFSET to be IPOPT_OFFSET */
190 #ifndef IP_OFFSET
191 #ifdef IPOPT_OFFSET
192 #define IP_OFFSET IPOPT_OFFSET
193 #else
194 #define IP_OFFSET 2
195 #endif
196 #endif
197
198 #define RUN_AT(x) (jiffies + (x))
199
200 #ifndef ADDRLEN
201 #define ADDRLEN 32
202 #endif
203
204 /* Condensed bus+endian portability operations. */
205 #if ADDRLEN == 64
206 #define cpu_to_leXX(addr) cpu_to_le64(addr)
207 #define leXX_to_cpu(addr) le64_to_cpu(addr)
208 #else
209 #define cpu_to_leXX(addr) cpu_to_le32(addr)
210 #define leXX_to_cpu(addr) le32_to_cpu(addr)
211 #endif
212
213
214 /*
215 Theory of Operation
216
217 I. Board Compatibility
218
219 This device driver is designed for the Packet Engines "Hamachi"
220 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
221 66Mhz PCI card.
222
223 II. Board-specific settings
224
225 No jumpers exist on the board. The chip supports software correction of
226 various motherboard wiring errors, however this driver does not support
227 that feature.
228
229 III. Driver operation
230
231 IIIa. Ring buffers
232
233 The Hamachi uses a typical descriptor based bus-master architecture.
234 The descriptor list is similar to that used by the Digital Tulip.
235 This driver uses two statically allocated fixed-size descriptor lists
236 formed into rings by a branch from the final descriptor to the beginning of
237 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
238
239 This driver uses a zero-copy receive and transmit scheme similar my other
240 network drivers.
241 The driver allocates full frame size skbuffs for the Rx ring buffers at
242 open() time and passes the skb->data field to the Hamachi as receive data
243 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
244 a fresh skbuff is allocated and the frame is copied to the new skbuff.
245 When the incoming frame is larger, the skbuff is passed directly up the
246 protocol stack and replaced by a newly allocated skbuff.
247
248 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
249 using a full-sized skbuff for small frames vs. the copying costs of larger
250 frames. Gigabit cards are typically used on generously configured machines
251 and the underfilled buffers have negligible impact compared to the benefit of
252 a single allocation size, so the default value of zero results in never
253 copying packets.
254
255 IIIb/c. Transmit/Receive Structure
256
257 The Rx and Tx descriptor structure are straight-forward, with no historical
258 baggage that must be explained. Unlike the awkward DBDMA structure, there
259 are no unused fields or option bits that had only one allowable setting.
260
261 Two details should be noted about the descriptors: The chip supports both 32
262 bit and 64 bit address structures, and the length field is overwritten on
263 the receive descriptors. The descriptor length is set in the control word
264 for each channel. The development driver uses 32 bit addresses only, however
265 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
266
267 IIId. Synchronization
268
269 This driver is very similar to my other network drivers.
270 The driver runs as two independent, single-threaded flows of control. One
271 is the send-packet routine, which enforces single-threaded use by the
272 dev->tbusy flag. The other thread is the interrupt handler, which is single
273 threaded by the hardware and other software.
274
275 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
276 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
277 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
278 the 'hmp->tx_full' flag.
279
280 The interrupt handler has exclusive control over the Rx ring and records stats
281 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
282 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
283 clears both the tx_full and tbusy flags.
284
285 IV. Notes
286
287 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
288
289 IVb. References
290
291 Hamachi Engineering Design Specification, 5/15/97
292 (Note: This version was marked "Confidential".)
293
294 IVc. Errata
295
296 None noted.
297
298 V. Recent Changes
299
300 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
301 to help avoid some stall conditions -- this needs further research.
302
303 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
304 the Tx ring and is called from hamachi_start_xmit (this used to be
305 called from hamachi_interrupt but it tends to delay execution of the
306 interrupt handler and thus reduce bandwidth by reducing the latency
307 between hamachi_rx()'s). Notably, some modification has been made so
308 that the cleaning loop checks only to make sure that the DescOwn bit
309 isn't set in the status flag since the card is not required
310 to set the entire flag to zero after processing.
311
312 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
313 checked before attempting to add a buffer to the ring. If the ring is full
314 an attempt is made to free any dirty buffers and thus find space for
315 the new buffer or the function returns non-zero which should case the
316 scheduler to reschedule the buffer later.
317
318 01/15/1999 EPK Some adjustments were made to the chip initialization.
319 End-to-end flow control should now be fully active and the interrupt
320 algorithm vars have been changed. These could probably use further tuning.
321
322 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
323 set the rx and tx latencies for the Hamachi interrupts. If you're having
324 problems with network stalls, try setting these to higher values.
325 Valid values are 0x00 through 0xff.
326
327 01/15/1999 EPK In general, the overall bandwidth has increased and
328 latencies are better (sometimes by a factor of 2). Stalls are rare at
329 this point, however there still appears to be a bug somewhere between the
330 hardware and driver. TCP checksum errors under load also appear to be
331 eliminated at this point.
332
333 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
334 Rx and Tx rings. This appears to have been affecting whether a particular
335 peer-to-peer connection would hang under high load. I believe the Rx
336 rings was typically getting set correctly, but the Tx ring wasn't getting
337 the DescEndRing bit set during initialization. ??? Does this mean the
338 hamachi card is using the DescEndRing in processing even if a particular
339 slot isn't in use -- hypothetically, the card might be searching the
340 entire Tx ring for slots with the DescOwn bit set and then processing
341 them. If the DescEndRing bit isn't set, then it might just wander off
342 through memory until it hits a chunk of data with that bit set
343 and then looping back.
344
345 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
346 problem (TxCmd and RxCmd need only to be set when idle or stopped.
347
348 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
349 (Michel Mueller pointed out the ``permanently busy'' potential
350 problem here).
351
352 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
353
354 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
355 incorrectly defined and corrected (as per Michel Mueller).
356
357 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
358 were available before reseting the tbusy and tx_full flags
359 (as per Michel Mueller).
360
361 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
362
363 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
364 32 bit.
365
366 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
367 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
368 re-structuring I would like to do.
369
370 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
371 parameters on a dual P3-450 setup yielded the new default interrupt
372 mitigation parameters. Tx should interrupt VERY infrequently due to
373 Eric's scheme. Rx should be more often...
374
375 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
376 nicely with non-linux machines.
377
378 03/13/2000 KDU Experimented with some of the configuration values:
379
380 -It seems that enabling PCI performance commands for descriptors
381 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
382 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
383 leave them that way until I hear further feedback.
384
385 -Increasing the PCI_LATENCY_TIMER to 130
386 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
387 degrade performance. Leaving default at 64 pending further information.
388
389 03/14/2000 KDU Further tuning:
390
391 -adjusted boguscnt in hamachi_rx() to depend on interrupt
392 mitigation parameters chosen.
393
394 -Selected a set of interrupt parameters based on some extensive testing.
395 These may change with more testing.
396
397 TO DO:
398
399 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
400 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
401 that case.
402
403 -fix the reset procedure. It doesn't quite work.
404 */
405
406 /* A few values that may be tweaked. */
407 /* Size of each temporary Rx buffer, calculated as:
408 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
409 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
410 * 2 more because we use skb_reserve.
411 */
412 #define PKT_BUF_SZ 1538
413
414 /* For now, this is going to be set to the maximum size of an ethernet
415 * packet. Eventually, we may want to make it a variable that is
416 * related to the MTU
417 */
418 #define MAX_FRAME_SIZE 1518
419
420 /* The rest of these values should never change. */
421
422 static void hamachi_timer(unsigned long data);
423
424 enum capability_flags {CanHaveMII=1, };
425 static const struct chip_info {
426 u16 vendor_id, device_id, device_id_mask, pad;
427 const char *name;
428 void (*media_timer)(unsigned long data);
429 int flags;
430 } chip_tbl[] = {
431 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
432 {0,},
433 };
434
435 /* Offsets to the Hamachi registers. Various sizes. */
436 enum hamachi_offsets {
437 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
438 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
439 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
440 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
441 TxChecksum=0x074, RxChecksum=0x076,
442 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
443 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
444 EventStatus=0x08C,
445 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
446 /* See enum MII_offsets below. */
447 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
448 AddrMode=0x0D0, StationAddr=0x0D2,
449 /* Gigabit AutoNegotiation. */
450 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
451 ANLinkPartnerAbility=0x0EA,
452 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
453 FIFOcfg=0x0F8,
454 };
455
456 /* Offsets to the MII-mode registers. */
457 enum MII_offsets {
458 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
459 MII_Status=0xAE,
460 };
461
462 /* Bits in the interrupt status/mask registers. */
463 enum intr_status_bits {
464 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
465 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
466 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
467
468 /* The Hamachi Rx and Tx buffer descriptors. */
469 struct hamachi_desc {
470 __le32 status_n_length;
471 #if ADDRLEN == 64
472 u32 pad;
473 __le64 addr;
474 #else
475 __le32 addr;
476 #endif
477 };
478
479 /* Bits in hamachi_desc.status_n_length */
480 enum desc_status_bits {
481 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
482 DescIntr=0x10000000,
483 };
484
485 #define PRIV_ALIGN 15 /* Required alignment mask */
486 #define MII_CNT 4
487 struct hamachi_private {
488 /* Descriptor rings first for alignment. Tx requires a second descriptor
489 for status. */
490 struct hamachi_desc *rx_ring;
491 struct hamachi_desc *tx_ring;
492 struct sk_buff* rx_skbuff[RX_RING_SIZE];
493 struct sk_buff* tx_skbuff[TX_RING_SIZE];
494 dma_addr_t tx_ring_dma;
495 dma_addr_t rx_ring_dma;
496 struct net_device_stats stats;
497 struct timer_list timer; /* Media selection timer. */
498 /* Frequently used and paired value: keep adjacent for cache effect. */
499 spinlock_t lock;
500 int chip_id;
501 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
502 unsigned int cur_tx, dirty_tx;
503 unsigned int rx_buf_sz; /* Based on MTU+slack. */
504 unsigned int tx_full:1; /* The Tx queue is full. */
505 unsigned int duplex_lock:1;
506 unsigned int default_port:4; /* Last dev->if_port value. */
507 /* MII transceiver section. */
508 int mii_cnt; /* MII device addresses. */
509 struct mii_if_info mii_if; /* MII lib hooks/info */
510 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
511 u32 rx_int_var, tx_int_var; /* interrupt control variables */
512 u32 option; /* Hold on to a copy of the options */
513 struct pci_dev *pci_dev;
514 void __iomem *base;
515 };
516
517 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
518 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
519 MODULE_LICENSE("GPL");
520
521 module_param(max_interrupt_work, int, 0);
522 module_param(mtu, int, 0);
523 module_param(debug, int, 0);
524 module_param(min_rx_pkt, int, 0);
525 module_param(max_rx_gap, int, 0);
526 module_param(max_rx_latency, int, 0);
527 module_param(min_tx_pkt, int, 0);
528 module_param(max_tx_gap, int, 0);
529 module_param(max_tx_latency, int, 0);
530 module_param(rx_copybreak, int, 0);
531 module_param_array(rx_params, int, NULL, 0);
532 module_param_array(tx_params, int, NULL, 0);
533 module_param_array(options, int, NULL, 0);
534 module_param_array(full_duplex, int, NULL, 0);
535 module_param(force32, int, 0);
536 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
537 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
538 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
539 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
540 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
541 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
542 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
543 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
544 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
545 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
546 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
547 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
548 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
549 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
550 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
551
552 static int read_eeprom(void __iomem *ioaddr, int location);
553 static int mdio_read(struct net_device *dev, int phy_id, int location);
554 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
555 static int hamachi_open(struct net_device *dev);
556 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
557 static void hamachi_timer(unsigned long data);
558 static void hamachi_tx_timeout(struct net_device *dev);
559 static void hamachi_init_ring(struct net_device *dev);
560 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
561 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
562 static int hamachi_rx(struct net_device *dev);
563 static inline int hamachi_tx(struct net_device *dev);
564 static void hamachi_error(struct net_device *dev, int intr_status);
565 static int hamachi_close(struct net_device *dev);
566 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
567 static void set_rx_mode(struct net_device *dev);
568 static const struct ethtool_ops ethtool_ops;
569 static const struct ethtool_ops ethtool_ops_no_mii;
570
571 static const struct net_device_ops hamachi_netdev_ops = {
572 .ndo_open = hamachi_open,
573 .ndo_stop = hamachi_close,
574 .ndo_start_xmit = hamachi_start_xmit,
575 .ndo_get_stats = hamachi_get_stats,
576 .ndo_set_multicast_list = set_rx_mode,
577 .ndo_change_mtu = eth_change_mtu,
578 .ndo_validate_addr = eth_validate_addr,
579 .ndo_set_mac_address = eth_mac_addr,
580 .ndo_tx_timeout = hamachi_tx_timeout,
581 .ndo_do_ioctl = netdev_ioctl,
582 };
583
584
hamachi_init_one(struct pci_dev * pdev,const struct pci_device_id * ent)585 static int __devinit hamachi_init_one (struct pci_dev *pdev,
586 const struct pci_device_id *ent)
587 {
588 struct hamachi_private *hmp;
589 int option, i, rx_int_var, tx_int_var, boguscnt;
590 int chip_id = ent->driver_data;
591 int irq;
592 void __iomem *ioaddr;
593 unsigned long base;
594 static int card_idx;
595 struct net_device *dev;
596 void *ring_space;
597 dma_addr_t ring_dma;
598 int ret = -ENOMEM;
599
600 /* when built into the kernel, we only print version if device is found */
601 #ifndef MODULE
602 static int printed_version;
603 if (!printed_version++)
604 printk(version);
605 #endif
606
607 if (pci_enable_device(pdev)) {
608 ret = -EIO;
609 goto err_out;
610 }
611
612 base = pci_resource_start(pdev, 0);
613 #ifdef __alpha__ /* Really "64 bit addrs" */
614 base |= (pci_resource_start(pdev, 1) << 32);
615 #endif
616
617 pci_set_master(pdev);
618
619 i = pci_request_regions(pdev, DRV_NAME);
620 if (i)
621 return i;
622
623 irq = pdev->irq;
624 ioaddr = ioremap(base, 0x400);
625 if (!ioaddr)
626 goto err_out_release;
627
628 dev = alloc_etherdev(sizeof(struct hamachi_private));
629 if (!dev)
630 goto err_out_iounmap;
631
632 SET_NETDEV_DEV(dev, &pdev->dev);
633
634 #ifdef TX_CHECKSUM
635 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
636 dev->hard_header_len += 8; /* for cksum tag */
637 #endif
638
639 for (i = 0; i < 6; i++)
640 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
641 : readb(ioaddr + StationAddr + i);
642
643 #if ! defined(final_version)
644 if (hamachi_debug > 4)
645 for (i = 0; i < 0x10; i++)
646 printk("%2.2x%s",
647 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
648 #endif
649
650 hmp = netdev_priv(dev);
651 spin_lock_init(&hmp->lock);
652
653 hmp->mii_if.dev = dev;
654 hmp->mii_if.mdio_read = mdio_read;
655 hmp->mii_if.mdio_write = mdio_write;
656 hmp->mii_if.phy_id_mask = 0x1f;
657 hmp->mii_if.reg_num_mask = 0x1f;
658
659 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
660 if (!ring_space)
661 goto err_out_cleardev;
662 hmp->tx_ring = (struct hamachi_desc *)ring_space;
663 hmp->tx_ring_dma = ring_dma;
664
665 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
666 if (!ring_space)
667 goto err_out_unmap_tx;
668 hmp->rx_ring = (struct hamachi_desc *)ring_space;
669 hmp->rx_ring_dma = ring_dma;
670
671 /* Check for options being passed in */
672 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
673 if (dev->mem_start)
674 option = dev->mem_start;
675
676 /* If the bus size is misidentified, do the following. */
677 force32 = force32 ? force32 :
678 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
679 if (force32)
680 writeb(force32, ioaddr + VirtualJumpers);
681
682 /* Hmmm, do we really need to reset the chip???. */
683 writeb(0x01, ioaddr + ChipReset);
684
685 /* After a reset, the clock speed measurement of the PCI bus will not
686 * be valid for a moment. Wait for a little while until it is. If
687 * it takes more than 10ms, forget it.
688 */
689 udelay(10);
690 i = readb(ioaddr + PCIClkMeas);
691 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
692 udelay(10);
693 i = readb(ioaddr + PCIClkMeas);
694 }
695
696 hmp->base = ioaddr;
697 dev->base_addr = (unsigned long)ioaddr;
698 dev->irq = irq;
699 pci_set_drvdata(pdev, dev);
700
701 hmp->chip_id = chip_id;
702 hmp->pci_dev = pdev;
703
704 /* The lower four bits are the media type. */
705 if (option > 0) {
706 hmp->option = option;
707 if (option & 0x200)
708 hmp->mii_if.full_duplex = 1;
709 else if (option & 0x080)
710 hmp->mii_if.full_duplex = 0;
711 hmp->default_port = option & 15;
712 if (hmp->default_port)
713 hmp->mii_if.force_media = 1;
714 }
715 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
716 hmp->mii_if.full_duplex = 1;
717
718 /* lock the duplex mode if someone specified a value */
719 if (hmp->mii_if.full_duplex || (option & 0x080))
720 hmp->duplex_lock = 1;
721
722 /* Set interrupt tuning parameters */
723 max_rx_latency = max_rx_latency & 0x00ff;
724 max_rx_gap = max_rx_gap & 0x00ff;
725 min_rx_pkt = min_rx_pkt & 0x00ff;
726 max_tx_latency = max_tx_latency & 0x00ff;
727 max_tx_gap = max_tx_gap & 0x00ff;
728 min_tx_pkt = min_tx_pkt & 0x00ff;
729
730 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
731 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
732 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
733 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
734 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
735 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
736
737
738 /* The Hamachi-specific entries in the device structure. */
739 dev->netdev_ops = &hamachi_netdev_ops;
740 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
741 SET_ETHTOOL_OPS(dev, ðtool_ops);
742 else
743 SET_ETHTOOL_OPS(dev, ðtool_ops_no_mii);
744 dev->watchdog_timeo = TX_TIMEOUT;
745 if (mtu)
746 dev->mtu = mtu;
747
748 i = register_netdev(dev);
749 if (i) {
750 ret = i;
751 goto err_out_unmap_rx;
752 }
753
754 printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
755 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
756 ioaddr, dev->dev_addr, irq);
757 i = readb(ioaddr + PCIClkMeas);
758 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
759 "%2.2x, LPA %4.4x.\n",
760 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
761 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
762 readw(ioaddr + ANLinkPartnerAbility));
763
764 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
765 int phy, phy_idx = 0;
766 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
767 int mii_status = mdio_read(dev, phy, MII_BMSR);
768 if (mii_status != 0xffff &&
769 mii_status != 0x0000) {
770 hmp->phys[phy_idx++] = phy;
771 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
772 printk(KERN_INFO "%s: MII PHY found at address %d, status "
773 "0x%4.4x advertising %4.4x.\n",
774 dev->name, phy, mii_status, hmp->mii_if.advertising);
775 }
776 }
777 hmp->mii_cnt = phy_idx;
778 if (hmp->mii_cnt > 0)
779 hmp->mii_if.phy_id = hmp->phys[0];
780 else
781 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
782 }
783 /* Configure gigabit autonegotiation. */
784 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
785 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
786 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
787
788 card_idx++;
789 return 0;
790
791 err_out_unmap_rx:
792 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
793 hmp->rx_ring_dma);
794 err_out_unmap_tx:
795 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
796 hmp->tx_ring_dma);
797 err_out_cleardev:
798 free_netdev (dev);
799 err_out_iounmap:
800 iounmap(ioaddr);
801 err_out_release:
802 pci_release_regions(pdev);
803 err_out:
804 return ret;
805 }
806
read_eeprom(void __iomem * ioaddr,int location)807 static int __devinit read_eeprom(void __iomem *ioaddr, int location)
808 {
809 int bogus_cnt = 1000;
810
811 /* We should check busy first - per docs -KDU */
812 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
813 writew(location, ioaddr + EEAddr);
814 writeb(0x02, ioaddr + EECmdStatus);
815 bogus_cnt = 1000;
816 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
817 if (hamachi_debug > 5)
818 printk(" EEPROM status is %2.2x after %d ticks.\n",
819 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
820 return readb(ioaddr + EEData);
821 }
822
823 /* MII Managemen Data I/O accesses.
824 These routines assume the MDIO controller is idle, and do not exit until
825 the command is finished. */
826
mdio_read(struct net_device * dev,int phy_id,int location)827 static int mdio_read(struct net_device *dev, int phy_id, int location)
828 {
829 struct hamachi_private *hmp = netdev_priv(dev);
830 void __iomem *ioaddr = hmp->base;
831 int i;
832
833 /* We should check busy first - per docs -KDU */
834 for (i = 10000; i >= 0; i--)
835 if ((readw(ioaddr + MII_Status) & 1) == 0)
836 break;
837 writew((phy_id<<8) + location, ioaddr + MII_Addr);
838 writew(0x0001, ioaddr + MII_Cmd);
839 for (i = 10000; i >= 0; i--)
840 if ((readw(ioaddr + MII_Status) & 1) == 0)
841 break;
842 return readw(ioaddr + MII_Rd_Data);
843 }
844
mdio_write(struct net_device * dev,int phy_id,int location,int value)845 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
846 {
847 struct hamachi_private *hmp = netdev_priv(dev);
848 void __iomem *ioaddr = hmp->base;
849 int i;
850
851 /* We should check busy first - per docs -KDU */
852 for (i = 10000; i >= 0; i--)
853 if ((readw(ioaddr + MII_Status) & 1) == 0)
854 break;
855 writew((phy_id<<8) + location, ioaddr + MII_Addr);
856 writew(value, ioaddr + MII_Wr_Data);
857
858 /* Wait for the command to finish. */
859 for (i = 10000; i >= 0; i--)
860 if ((readw(ioaddr + MII_Status) & 1) == 0)
861 break;
862 return;
863 }
864
865
hamachi_open(struct net_device * dev)866 static int hamachi_open(struct net_device *dev)
867 {
868 struct hamachi_private *hmp = netdev_priv(dev);
869 void __iomem *ioaddr = hmp->base;
870 int i;
871 u32 rx_int_var, tx_int_var;
872 u16 fifo_info;
873
874 i = request_irq(dev->irq, &hamachi_interrupt, IRQF_SHARED, dev->name, dev);
875 if (i)
876 return i;
877
878 if (hamachi_debug > 1)
879 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
880 dev->name, dev->irq);
881
882 hamachi_init_ring(dev);
883
884 #if ADDRLEN == 64
885 /* writellll anyone ? */
886 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
887 writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
888 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
889 writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
890 #else
891 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
892 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
893 #endif
894
895 /* TODO: It would make sense to organize this as words since the card
896 * documentation does. -KDU
897 */
898 for (i = 0; i < 6; i++)
899 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
900
901 /* Initialize other registers: with so many this eventually this will
902 converted to an offset/value list. */
903
904 /* Configure the FIFO */
905 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
906 switch (fifo_info){
907 case 0 :
908 /* No FIFO */
909 writew(0x0000, ioaddr + FIFOcfg);
910 break;
911 case 1 :
912 /* Configure the FIFO for 512K external, 16K used for Tx. */
913 writew(0x0028, ioaddr + FIFOcfg);
914 break;
915 case 2 :
916 /* Configure the FIFO for 1024 external, 32K used for Tx. */
917 writew(0x004C, ioaddr + FIFOcfg);
918 break;
919 case 3 :
920 /* Configure the FIFO for 2048 external, 32K used for Tx. */
921 writew(0x006C, ioaddr + FIFOcfg);
922 break;
923 default :
924 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
925 dev->name);
926 /* Default to no FIFO */
927 writew(0x0000, ioaddr + FIFOcfg);
928 break;
929 }
930
931 if (dev->if_port == 0)
932 dev->if_port = hmp->default_port;
933
934
935 /* Setting the Rx mode will start the Rx process. */
936 /* If someone didn't choose a duplex, default to full-duplex */
937 if (hmp->duplex_lock != 1)
938 hmp->mii_if.full_duplex = 1;
939
940 /* always 1, takes no more time to do it */
941 writew(0x0001, ioaddr + RxChecksum);
942 #ifdef TX_CHECKSUM
943 writew(0x0001, ioaddr + TxChecksum);
944 #else
945 writew(0x0000, ioaddr + TxChecksum);
946 #endif
947 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
948 writew(0x215F, ioaddr + MACCnfg);
949 writew(0x000C, ioaddr + FrameGap0);
950 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
951 writew(0x1018, ioaddr + FrameGap1);
952 /* Why do we enable receives/transmits here? -KDU */
953 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
954 /* Enable automatic generation of flow control frames, period 0xffff. */
955 writel(0x0030FFFF, ioaddr + FlowCtrl);
956 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
957
958 /* Enable legacy links. */
959 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
960 /* Initial Link LED to blinking red. */
961 writeb(0x03, ioaddr + LEDCtrl);
962
963 /* Configure interrupt mitigation. This has a great effect on
964 performance, so systems tuning should start here!. */
965
966 rx_int_var = hmp->rx_int_var;
967 tx_int_var = hmp->tx_int_var;
968
969 if (hamachi_debug > 1) {
970 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
971 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
972 (tx_int_var & 0x00ff0000) >> 16);
973 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
974 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
975 (rx_int_var & 0x00ff0000) >> 16);
976 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
977 }
978
979 writel(tx_int_var, ioaddr + TxIntrCtrl);
980 writel(rx_int_var, ioaddr + RxIntrCtrl);
981
982 set_rx_mode(dev);
983
984 netif_start_queue(dev);
985
986 /* Enable interrupts by setting the interrupt mask. */
987 writel(0x80878787, ioaddr + InterruptEnable);
988 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
989
990 /* Configure and start the DMA channels. */
991 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
992 #if ADDRLEN == 64
993 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
994 writew(0x005D, ioaddr + TxDMACtrl);
995 #else
996 writew(0x001D, ioaddr + RxDMACtrl);
997 writew(0x001D, ioaddr + TxDMACtrl);
998 #endif
999 writew(0x0001, ioaddr + RxCmd);
1000
1001 if (hamachi_debug > 2) {
1002 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
1003 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
1004 }
1005 /* Set the timer to check for link beat. */
1006 init_timer(&hmp->timer);
1007 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1008 hmp->timer.data = (unsigned long)dev;
1009 hmp->timer.function = &hamachi_timer; /* timer handler */
1010 add_timer(&hmp->timer);
1011
1012 return 0;
1013 }
1014
hamachi_tx(struct net_device * dev)1015 static inline int hamachi_tx(struct net_device *dev)
1016 {
1017 struct hamachi_private *hmp = netdev_priv(dev);
1018
1019 /* Update the dirty pointer until we find an entry that is
1020 still owned by the card */
1021 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1022 int entry = hmp->dirty_tx % TX_RING_SIZE;
1023 struct sk_buff *skb;
1024
1025 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1026 break;
1027 /* Free the original skb. */
1028 skb = hmp->tx_skbuff[entry];
1029 if (skb) {
1030 pci_unmap_single(hmp->pci_dev,
1031 leXX_to_cpu(hmp->tx_ring[entry].addr),
1032 skb->len, PCI_DMA_TODEVICE);
1033 dev_kfree_skb(skb);
1034 hmp->tx_skbuff[entry] = NULL;
1035 }
1036 hmp->tx_ring[entry].status_n_length = 0;
1037 if (entry >= TX_RING_SIZE-1)
1038 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1039 cpu_to_le32(DescEndRing);
1040 hmp->stats.tx_packets++;
1041 }
1042
1043 return 0;
1044 }
1045
hamachi_timer(unsigned long data)1046 static void hamachi_timer(unsigned long data)
1047 {
1048 struct net_device *dev = (struct net_device *)data;
1049 struct hamachi_private *hmp = netdev_priv(dev);
1050 void __iomem *ioaddr = hmp->base;
1051 int next_tick = 10*HZ;
1052
1053 if (hamachi_debug > 2) {
1054 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1055 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1056 readw(ioaddr + ANLinkPartnerAbility));
1057 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1058 "%4.4x %4.4x %4.4x.\n", dev->name,
1059 readw(ioaddr + 0x0e0),
1060 readw(ioaddr + 0x0e2),
1061 readw(ioaddr + 0x0e4),
1062 readw(ioaddr + 0x0e6),
1063 readw(ioaddr + 0x0e8),
1064 readw(ioaddr + 0x0eA));
1065 }
1066 /* We could do something here... nah. */
1067 hmp->timer.expires = RUN_AT(next_tick);
1068 add_timer(&hmp->timer);
1069 }
1070
hamachi_tx_timeout(struct net_device * dev)1071 static void hamachi_tx_timeout(struct net_device *dev)
1072 {
1073 int i;
1074 struct hamachi_private *hmp = netdev_priv(dev);
1075 void __iomem *ioaddr = hmp->base;
1076
1077 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1078 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1079
1080 {
1081 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1082 for (i = 0; i < RX_RING_SIZE; i++)
1083 printk(" %8.8x", le32_to_cpu(hmp->rx_ring[i].status_n_length));
1084 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1085 for (i = 0; i < TX_RING_SIZE; i++)
1086 printk(" %4.4x", le32_to_cpu(hmp->tx_ring[i].status_n_length));
1087 printk("\n");
1088 }
1089
1090 /* Reinit the hardware and make sure the Rx and Tx processes
1091 are up and running.
1092 */
1093 dev->if_port = 0;
1094 /* The right way to do Reset. -KDU
1095 * -Clear OWN bit in all Rx/Tx descriptors
1096 * -Wait 50 uS for channels to go idle
1097 * -Turn off MAC receiver
1098 * -Issue Reset
1099 */
1100
1101 for (i = 0; i < RX_RING_SIZE; i++)
1102 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1103
1104 /* Presume that all packets in the Tx queue are gone if we have to
1105 * re-init the hardware.
1106 */
1107 for (i = 0; i < TX_RING_SIZE; i++){
1108 struct sk_buff *skb;
1109
1110 if (i >= TX_RING_SIZE - 1)
1111 hmp->tx_ring[i].status_n_length =
1112 cpu_to_le32(DescEndRing) |
1113 (hmp->tx_ring[i].status_n_length &
1114 cpu_to_le32(0x0000ffff));
1115 else
1116 hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1117 skb = hmp->tx_skbuff[i];
1118 if (skb){
1119 pci_unmap_single(hmp->pci_dev, leXX_to_cpu(hmp->tx_ring[i].addr),
1120 skb->len, PCI_DMA_TODEVICE);
1121 dev_kfree_skb(skb);
1122 hmp->tx_skbuff[i] = NULL;
1123 }
1124 }
1125
1126 udelay(60); /* Sleep 60 us just for safety sake */
1127 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1128
1129 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1130
1131 hmp->tx_full = 0;
1132 hmp->cur_rx = hmp->cur_tx = 0;
1133 hmp->dirty_rx = hmp->dirty_tx = 0;
1134 /* Rx packets are also presumed lost; however, we need to make sure a
1135 * ring of buffers is in tact. -KDU
1136 */
1137 for (i = 0; i < RX_RING_SIZE; i++){
1138 struct sk_buff *skb = hmp->rx_skbuff[i];
1139
1140 if (skb){
1141 pci_unmap_single(hmp->pci_dev,
1142 leXX_to_cpu(hmp->rx_ring[i].addr),
1143 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1144 dev_kfree_skb(skb);
1145 hmp->rx_skbuff[i] = NULL;
1146 }
1147 }
1148 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1149 for (i = 0; i < RX_RING_SIZE; i++) {
1150 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz);
1151 hmp->rx_skbuff[i] = skb;
1152 if (skb == NULL)
1153 break;
1154
1155 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1156 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1157 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1158 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1159 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1160 }
1161 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1162 /* Mark the last entry as wrapping the ring. */
1163 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1164
1165 /* Trigger an immediate transmit demand. */
1166 dev->trans_start = jiffies;
1167 hmp->stats.tx_errors++;
1168
1169 /* Restart the chip's Tx/Rx processes . */
1170 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1171 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1172 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1173
1174 netif_wake_queue(dev);
1175 }
1176
1177
1178 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
hamachi_init_ring(struct net_device * dev)1179 static void hamachi_init_ring(struct net_device *dev)
1180 {
1181 struct hamachi_private *hmp = netdev_priv(dev);
1182 int i;
1183
1184 hmp->tx_full = 0;
1185 hmp->cur_rx = hmp->cur_tx = 0;
1186 hmp->dirty_rx = hmp->dirty_tx = 0;
1187
1188 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1189 * card needs room to do 8 byte alignment, +2 so we can reserve
1190 * the first 2 bytes, and +16 gets room for the status word from the
1191 * card. -KDU
1192 */
1193 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1194 (((dev->mtu+26+7) & ~7) + 2 + 16));
1195
1196 /* Initialize all Rx descriptors. */
1197 for (i = 0; i < RX_RING_SIZE; i++) {
1198 hmp->rx_ring[i].status_n_length = 0;
1199 hmp->rx_skbuff[i] = NULL;
1200 }
1201 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1202 for (i = 0; i < RX_RING_SIZE; i++) {
1203 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1204 hmp->rx_skbuff[i] = skb;
1205 if (skb == NULL)
1206 break;
1207 skb->dev = dev; /* Mark as being used by this device. */
1208 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1209 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1210 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1211 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1212 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1213 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1214 }
1215 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1216 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1217
1218 for (i = 0; i < TX_RING_SIZE; i++) {
1219 hmp->tx_skbuff[i] = NULL;
1220 hmp->tx_ring[i].status_n_length = 0;
1221 }
1222 /* Mark the last entry of the ring */
1223 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1224
1225 return;
1226 }
1227
1228
1229 #ifdef TX_CHECKSUM
1230 #define csum_add(it, val) \
1231 do { \
1232 it += (u16) (val); \
1233 if (it & 0xffff0000) { \
1234 it &= 0xffff; \
1235 ++it; \
1236 } \
1237 } while (0)
1238 /* printk("add %04x --> %04x\n", val, it); \ */
1239
1240 /* uh->len already network format, do not swap */
1241 #define pseudo_csum_udp(sum,ih,uh) do { \
1242 sum = 0; \
1243 csum_add(sum, (ih)->saddr >> 16); \
1244 csum_add(sum, (ih)->saddr & 0xffff); \
1245 csum_add(sum, (ih)->daddr >> 16); \
1246 csum_add(sum, (ih)->daddr & 0xffff); \
1247 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1248 csum_add(sum, (uh)->len); \
1249 } while (0)
1250
1251 /* swap len */
1252 #define pseudo_csum_tcp(sum,ih,len) do { \
1253 sum = 0; \
1254 csum_add(sum, (ih)->saddr >> 16); \
1255 csum_add(sum, (ih)->saddr & 0xffff); \
1256 csum_add(sum, (ih)->daddr >> 16); \
1257 csum_add(sum, (ih)->daddr & 0xffff); \
1258 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1259 csum_add(sum, htons(len)); \
1260 } while (0)
1261 #endif
1262
hamachi_start_xmit(struct sk_buff * skb,struct net_device * dev)1263 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1264 {
1265 struct hamachi_private *hmp = netdev_priv(dev);
1266 unsigned entry;
1267 u16 status;
1268
1269 /* Ok, now make sure that the queue has space before trying to
1270 add another skbuff. if we return non-zero the scheduler
1271 should interpret this as a queue full and requeue the buffer
1272 for later.
1273 */
1274 if (hmp->tx_full) {
1275 /* We should NEVER reach this point -KDU */
1276 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1277
1278 /* Wake the potentially-idle transmit channel. */
1279 /* If we don't need to read status, DON'T -KDU */
1280 status=readw(hmp->base + TxStatus);
1281 if( !(status & 0x0001) || (status & 0x0002))
1282 writew(0x0001, hmp->base + TxCmd);
1283 return 1;
1284 }
1285
1286 /* Caution: the write order is important here, set the field
1287 with the "ownership" bits last. */
1288
1289 /* Calculate the next Tx descriptor entry. */
1290 entry = hmp->cur_tx % TX_RING_SIZE;
1291
1292 hmp->tx_skbuff[entry] = skb;
1293
1294 #ifdef TX_CHECKSUM
1295 {
1296 /* tack on checksum tag */
1297 u32 tagval = 0;
1298 struct ethhdr *eh = (struct ethhdr *)skb->data;
1299 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1300 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1301 if (ih->protocol == IPPROTO_UDP) {
1302 struct udphdr *uh
1303 = (struct udphdr *)((char *)ih + ih->ihl*4);
1304 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1305 u32 pseudo;
1306 pseudo_csum_udp(pseudo, ih, uh);
1307 pseudo = htons(pseudo);
1308 printk("udp cksum was %04x, sending pseudo %04x\n",
1309 uh->check, pseudo);
1310 uh->check = 0; /* zero out uh->check before card calc */
1311 /*
1312 * start at 14 (skip ethhdr), store at offset (uh->check),
1313 * use pseudo value given.
1314 */
1315 tagval = (14 << 24) | (offset << 16) | pseudo;
1316 } else if (ih->protocol == IPPROTO_TCP) {
1317 printk("tcp, no auto cksum\n");
1318 }
1319 }
1320 *(u32 *)skb_push(skb, 8) = tagval;
1321 }
1322 #endif
1323
1324 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1325 skb->data, skb->len, PCI_DMA_TODEVICE));
1326
1327 /* Hmmmm, could probably put a DescIntr on these, but the way
1328 the driver is currently coded makes Tx interrupts unnecessary
1329 since the clearing of the Tx ring is handled by the start_xmit
1330 routine. This organization helps mitigate the interrupts a
1331 bit and probably renders the max_tx_latency param useless.
1332
1333 Update: Putting a DescIntr bit on all of the descriptors and
1334 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1335 */
1336 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1337 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1338 DescEndPacket | DescEndRing | DescIntr | skb->len);
1339 else
1340 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1341 DescEndPacket | DescIntr | skb->len);
1342 hmp->cur_tx++;
1343
1344 /* Non-x86 Todo: explicitly flush cache lines here. */
1345
1346 /* Wake the potentially-idle transmit channel. */
1347 /* If we don't need to read status, DON'T -KDU */
1348 status=readw(hmp->base + TxStatus);
1349 if( !(status & 0x0001) || (status & 0x0002))
1350 writew(0x0001, hmp->base + TxCmd);
1351
1352 /* Immediately before returning, let's clear as many entries as we can. */
1353 hamachi_tx(dev);
1354
1355 /* We should kick the bottom half here, since we are not accepting
1356 * interrupts with every packet. i.e. realize that Gigabit ethernet
1357 * can transmit faster than ordinary machines can load packets;
1358 * hence, any packet that got put off because we were in the transmit
1359 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1360 */
1361 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1362 netif_wake_queue(dev); /* Typical path */
1363 else {
1364 hmp->tx_full = 1;
1365 netif_stop_queue(dev);
1366 }
1367 dev->trans_start = jiffies;
1368
1369 if (hamachi_debug > 4) {
1370 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1371 dev->name, hmp->cur_tx, entry);
1372 }
1373 return 0;
1374 }
1375
1376 /* The interrupt handler does all of the Rx thread work and cleans up
1377 after the Tx thread. */
hamachi_interrupt(int irq,void * dev_instance)1378 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1379 {
1380 struct net_device *dev = dev_instance;
1381 struct hamachi_private *hmp = netdev_priv(dev);
1382 void __iomem *ioaddr = hmp->base;
1383 long boguscnt = max_interrupt_work;
1384 int handled = 0;
1385
1386 #ifndef final_version /* Can never occur. */
1387 if (dev == NULL) {
1388 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1389 return IRQ_NONE;
1390 }
1391 #endif
1392
1393 spin_lock(&hmp->lock);
1394
1395 do {
1396 u32 intr_status = readl(ioaddr + InterruptClear);
1397
1398 if (hamachi_debug > 4)
1399 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1400 dev->name, intr_status);
1401
1402 if (intr_status == 0)
1403 break;
1404
1405 handled = 1;
1406
1407 if (intr_status & IntrRxDone)
1408 hamachi_rx(dev);
1409
1410 if (intr_status & IntrTxDone){
1411 /* This code should RARELY need to execute. After all, this is
1412 * a gigabit link, it should consume packets as fast as we put
1413 * them in AND we clear the Tx ring in hamachi_start_xmit().
1414 */
1415 if (hmp->tx_full){
1416 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1417 int entry = hmp->dirty_tx % TX_RING_SIZE;
1418 struct sk_buff *skb;
1419
1420 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1421 break;
1422 skb = hmp->tx_skbuff[entry];
1423 /* Free the original skb. */
1424 if (skb){
1425 pci_unmap_single(hmp->pci_dev,
1426 leXX_to_cpu(hmp->tx_ring[entry].addr),
1427 skb->len,
1428 PCI_DMA_TODEVICE);
1429 dev_kfree_skb_irq(skb);
1430 hmp->tx_skbuff[entry] = NULL;
1431 }
1432 hmp->tx_ring[entry].status_n_length = 0;
1433 if (entry >= TX_RING_SIZE-1)
1434 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1435 cpu_to_le32(DescEndRing);
1436 hmp->stats.tx_packets++;
1437 }
1438 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1439 /* The ring is no longer full */
1440 hmp->tx_full = 0;
1441 netif_wake_queue(dev);
1442 }
1443 } else {
1444 netif_wake_queue(dev);
1445 }
1446 }
1447
1448
1449 /* Abnormal error summary/uncommon events handlers. */
1450 if (intr_status &
1451 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1452 LinkChange | NegotiationChange | StatsMax))
1453 hamachi_error(dev, intr_status);
1454
1455 if (--boguscnt < 0) {
1456 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1457 dev->name, intr_status);
1458 break;
1459 }
1460 } while (1);
1461
1462 if (hamachi_debug > 3)
1463 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1464 dev->name, readl(ioaddr + IntrStatus));
1465
1466 #ifndef final_version
1467 /* Code that should never be run! Perhaps remove after testing.. */
1468 {
1469 static int stopit = 10;
1470 if (dev->start == 0 && --stopit < 0) {
1471 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1472 dev->name);
1473 free_irq(irq, dev);
1474 }
1475 }
1476 #endif
1477
1478 spin_unlock(&hmp->lock);
1479 return IRQ_RETVAL(handled);
1480 }
1481
1482 /* This routine is logically part of the interrupt handler, but separated
1483 for clarity and better register allocation. */
hamachi_rx(struct net_device * dev)1484 static int hamachi_rx(struct net_device *dev)
1485 {
1486 struct hamachi_private *hmp = netdev_priv(dev);
1487 int entry = hmp->cur_rx % RX_RING_SIZE;
1488 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1489
1490 if (hamachi_debug > 4) {
1491 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1492 entry, hmp->rx_ring[entry].status_n_length);
1493 }
1494
1495 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1496 while (1) {
1497 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1498 u32 desc_status = le32_to_cpu(desc->status_n_length);
1499 u16 data_size = desc_status; /* Implicit truncate */
1500 u8 *buf_addr;
1501 s32 frame_status;
1502
1503 if (desc_status & DescOwn)
1504 break;
1505 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1506 leXX_to_cpu(desc->addr),
1507 hmp->rx_buf_sz,
1508 PCI_DMA_FROMDEVICE);
1509 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1510 frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1511 if (hamachi_debug > 4)
1512 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1513 frame_status);
1514 if (--boguscnt < 0)
1515 break;
1516 if ( ! (desc_status & DescEndPacket)) {
1517 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1518 "multiple buffers, entry %#x length %d status %4.4x!\n",
1519 dev->name, hmp->cur_rx, data_size, desc_status);
1520 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1521 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1522 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1523 dev->name,
1524 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1525 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1526 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1527 hmp->stats.rx_length_errors++;
1528 } /* else Omit for prototype errata??? */
1529 if (frame_status & 0x00380000) {
1530 /* There was an error. */
1531 if (hamachi_debug > 2)
1532 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1533 frame_status);
1534 hmp->stats.rx_errors++;
1535 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1536 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1537 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1538 if (frame_status < 0) hmp->stats.rx_dropped++;
1539 } else {
1540 struct sk_buff *skb;
1541 /* Omit CRC */
1542 u16 pkt_len = (frame_status & 0x07ff) - 4;
1543 #ifdef RX_CHECKSUM
1544 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1545 #endif
1546
1547
1548 #ifndef final_version
1549 if (hamachi_debug > 4)
1550 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1551 " of %d, bogus_cnt %d.\n",
1552 pkt_len, data_size, boguscnt);
1553 if (hamachi_debug > 5)
1554 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1555 dev->name,
1556 *(s32*)&(buf_addr[data_size - 20]),
1557 *(s32*)&(buf_addr[data_size - 16]),
1558 *(s32*)&(buf_addr[data_size - 12]),
1559 *(s32*)&(buf_addr[data_size - 8]),
1560 *(s32*)&(buf_addr[data_size - 4]));
1561 #endif
1562 /* Check if the packet is long enough to accept without copying
1563 to a minimally-sized skbuff. */
1564 if (pkt_len < rx_copybreak
1565 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1566 #ifdef RX_CHECKSUM
1567 printk(KERN_ERR "%s: rx_copybreak non-zero "
1568 "not good with RX_CHECKSUM\n", dev->name);
1569 #endif
1570 skb_reserve(skb, 2); /* 16 byte align the IP header */
1571 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1572 leXX_to_cpu(hmp->rx_ring[entry].addr),
1573 hmp->rx_buf_sz,
1574 PCI_DMA_FROMDEVICE);
1575 /* Call copy + cksum if available. */
1576 #if 1 || USE_IP_COPYSUM
1577 skb_copy_to_linear_data(skb,
1578 hmp->rx_skbuff[entry]->data, pkt_len);
1579 skb_put(skb, pkt_len);
1580 #else
1581 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1582 + entry*sizeof(*desc), pkt_len);
1583 #endif
1584 pci_dma_sync_single_for_device(hmp->pci_dev,
1585 leXX_to_cpu(hmp->rx_ring[entry].addr),
1586 hmp->rx_buf_sz,
1587 PCI_DMA_FROMDEVICE);
1588 } else {
1589 pci_unmap_single(hmp->pci_dev,
1590 leXX_to_cpu(hmp->rx_ring[entry].addr),
1591 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1592 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1593 hmp->rx_skbuff[entry] = NULL;
1594 }
1595 skb->protocol = eth_type_trans(skb, dev);
1596
1597
1598 #ifdef RX_CHECKSUM
1599 /* TCP or UDP on ipv4, DIX encoding */
1600 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1601 struct iphdr *ih = (struct iphdr *) skb->data;
1602 /* Check that IP packet is at least 46 bytes, otherwise,
1603 * there may be pad bytes included in the hardware checksum.
1604 * This wouldn't happen if everyone padded with 0.
1605 */
1606 if (ntohs(ih->tot_len) >= 46){
1607 /* don't worry about frags */
1608 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1609 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1610 u32 *p = (u32 *) &buf_addr[data_size - 20];
1611 register u32 crc, p_r, p_r1;
1612
1613 if (inv & 4) {
1614 inv &= ~4;
1615 --p;
1616 }
1617 p_r = *p;
1618 p_r1 = *(p-1);
1619 switch (inv) {
1620 case 0:
1621 crc = (p_r & 0xffff) + (p_r >> 16);
1622 break;
1623 case 1:
1624 crc = (p_r >> 16) + (p_r & 0xffff)
1625 + (p_r1 >> 16 & 0xff00);
1626 break;
1627 case 2:
1628 crc = p_r + (p_r1 >> 16);
1629 break;
1630 case 3:
1631 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1632 break;
1633 default: /*NOTREACHED*/ crc = 0;
1634 }
1635 if (crc & 0xffff0000) {
1636 crc &= 0xffff;
1637 ++crc;
1638 }
1639 /* tcp/udp will add in pseudo */
1640 skb->csum = ntohs(pfck & 0xffff);
1641 if (skb->csum > crc)
1642 skb->csum -= crc;
1643 else
1644 skb->csum += (~crc & 0xffff);
1645 /*
1646 * could do the pseudo myself and return
1647 * CHECKSUM_UNNECESSARY
1648 */
1649 skb->ip_summed = CHECKSUM_COMPLETE;
1650 }
1651 }
1652 }
1653 #endif /* RX_CHECKSUM */
1654
1655 netif_rx(skb);
1656 hmp->stats.rx_packets++;
1657 }
1658 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1659 }
1660
1661 /* Refill the Rx ring buffers. */
1662 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1663 struct hamachi_desc *desc;
1664
1665 entry = hmp->dirty_rx % RX_RING_SIZE;
1666 desc = &(hmp->rx_ring[entry]);
1667 if (hmp->rx_skbuff[entry] == NULL) {
1668 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1669
1670 hmp->rx_skbuff[entry] = skb;
1671 if (skb == NULL)
1672 break; /* Better luck next round. */
1673 skb->dev = dev; /* Mark as being used by this device. */
1674 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1675 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1676 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1677 }
1678 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1679 if (entry >= RX_RING_SIZE-1)
1680 desc->status_n_length |= cpu_to_le32(DescOwn |
1681 DescEndPacket | DescEndRing | DescIntr);
1682 else
1683 desc->status_n_length |= cpu_to_le32(DescOwn |
1684 DescEndPacket | DescIntr);
1685 }
1686
1687 /* Restart Rx engine if stopped. */
1688 /* If we don't need to check status, don't. -KDU */
1689 if (readw(hmp->base + RxStatus) & 0x0002)
1690 writew(0x0001, hmp->base + RxCmd);
1691
1692 return 0;
1693 }
1694
1695 /* This is more properly named "uncommon interrupt events", as it covers more
1696 than just errors. */
hamachi_error(struct net_device * dev,int intr_status)1697 static void hamachi_error(struct net_device *dev, int intr_status)
1698 {
1699 struct hamachi_private *hmp = netdev_priv(dev);
1700 void __iomem *ioaddr = hmp->base;
1701
1702 if (intr_status & (LinkChange|NegotiationChange)) {
1703 if (hamachi_debug > 1)
1704 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1705 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1706 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1707 readw(ioaddr + ANLinkPartnerAbility),
1708 readl(ioaddr + IntrStatus));
1709 if (readw(ioaddr + ANStatus) & 0x20)
1710 writeb(0x01, ioaddr + LEDCtrl);
1711 else
1712 writeb(0x03, ioaddr + LEDCtrl);
1713 }
1714 if (intr_status & StatsMax) {
1715 hamachi_get_stats(dev);
1716 /* Read the overflow bits to clear. */
1717 readl(ioaddr + 0x370);
1718 readl(ioaddr + 0x3F0);
1719 }
1720 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1721 && hamachi_debug)
1722 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1723 dev->name, intr_status);
1724 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1725 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1726 hmp->stats.tx_fifo_errors++;
1727 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1728 hmp->stats.rx_fifo_errors++;
1729 }
1730
hamachi_close(struct net_device * dev)1731 static int hamachi_close(struct net_device *dev)
1732 {
1733 struct hamachi_private *hmp = netdev_priv(dev);
1734 void __iomem *ioaddr = hmp->base;
1735 struct sk_buff *skb;
1736 int i;
1737
1738 netif_stop_queue(dev);
1739
1740 if (hamachi_debug > 1) {
1741 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1742 dev->name, readw(ioaddr + TxStatus),
1743 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1744 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1745 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1746 }
1747
1748 /* Disable interrupts by clearing the interrupt mask. */
1749 writel(0x0000, ioaddr + InterruptEnable);
1750
1751 /* Stop the chip's Tx and Rx processes. */
1752 writel(2, ioaddr + RxCmd);
1753 writew(2, ioaddr + TxCmd);
1754
1755 #ifdef __i386__
1756 if (hamachi_debug > 2) {
1757 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1758 (int)hmp->tx_ring_dma);
1759 for (i = 0; i < TX_RING_SIZE; i++)
1760 printk(" %c #%d desc. %8.8x %8.8x.\n",
1761 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1762 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1763 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1764 (int)hmp->rx_ring_dma);
1765 for (i = 0; i < RX_RING_SIZE; i++) {
1766 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1767 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1768 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1769 if (hamachi_debug > 6) {
1770 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1771 u16 *addr = (u16 *)
1772 hmp->rx_skbuff[i]->data;
1773 int j;
1774
1775 for (j = 0; j < 0x50; j++)
1776 printk(" %4.4x", addr[j]);
1777 printk("\n");
1778 }
1779 }
1780 }
1781 }
1782 #endif /* __i386__ debugging only */
1783
1784 free_irq(dev->irq, dev);
1785
1786 del_timer_sync(&hmp->timer);
1787
1788 /* Free all the skbuffs in the Rx queue. */
1789 for (i = 0; i < RX_RING_SIZE; i++) {
1790 skb = hmp->rx_skbuff[i];
1791 hmp->rx_ring[i].status_n_length = 0;
1792 if (skb) {
1793 pci_unmap_single(hmp->pci_dev,
1794 leXX_to_cpu(hmp->rx_ring[i].addr),
1795 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1796 dev_kfree_skb(skb);
1797 hmp->rx_skbuff[i] = NULL;
1798 }
1799 hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1800 }
1801 for (i = 0; i < TX_RING_SIZE; i++) {
1802 skb = hmp->tx_skbuff[i];
1803 if (skb) {
1804 pci_unmap_single(hmp->pci_dev,
1805 leXX_to_cpu(hmp->tx_ring[i].addr),
1806 skb->len, PCI_DMA_TODEVICE);
1807 dev_kfree_skb(skb);
1808 hmp->tx_skbuff[i] = NULL;
1809 }
1810 }
1811
1812 writeb(0x00, ioaddr + LEDCtrl);
1813
1814 return 0;
1815 }
1816
hamachi_get_stats(struct net_device * dev)1817 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1818 {
1819 struct hamachi_private *hmp = netdev_priv(dev);
1820 void __iomem *ioaddr = hmp->base;
1821
1822 /* We should lock this segment of code for SMP eventually, although
1823 the vulnerability window is very small and statistics are
1824 non-critical. */
1825 /* Ok, what goes here? This appears to be stuck at 21 packets
1826 according to ifconfig. It does get incremented in hamachi_tx(),
1827 so I think I'll comment it out here and see if better things
1828 happen.
1829 */
1830 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1831
1832 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1833 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1834 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1835
1836 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1837 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1838 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1839 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1840 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1841
1842 return &hmp->stats;
1843 }
1844
set_rx_mode(struct net_device * dev)1845 static void set_rx_mode(struct net_device *dev)
1846 {
1847 struct hamachi_private *hmp = netdev_priv(dev);
1848 void __iomem *ioaddr = hmp->base;
1849
1850 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1851 writew(0x000F, ioaddr + AddrMode);
1852 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1853 /* Too many to match, or accept all multicasts. */
1854 writew(0x000B, ioaddr + AddrMode);
1855 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1856 struct dev_mc_list *mclist;
1857 int i;
1858 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1859 i++, mclist = mclist->next) {
1860 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1861 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1862 ioaddr + 0x104 + i*8);
1863 }
1864 /* Clear remaining entries. */
1865 for (; i < 64; i++)
1866 writel(0, ioaddr + 0x104 + i*8);
1867 writew(0x0003, ioaddr + AddrMode);
1868 } else { /* Normal, unicast/broadcast-only mode. */
1869 writew(0x0001, ioaddr + AddrMode);
1870 }
1871 }
1872
check_if_running(struct net_device * dev)1873 static int check_if_running(struct net_device *dev)
1874 {
1875 if (!netif_running(dev))
1876 return -EINVAL;
1877 return 0;
1878 }
1879
hamachi_get_drvinfo(struct net_device * dev,struct ethtool_drvinfo * info)1880 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1881 {
1882 struct hamachi_private *np = netdev_priv(dev);
1883 strcpy(info->driver, DRV_NAME);
1884 strcpy(info->version, DRV_VERSION);
1885 strcpy(info->bus_info, pci_name(np->pci_dev));
1886 }
1887
hamachi_get_settings(struct net_device * dev,struct ethtool_cmd * ecmd)1888 static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1889 {
1890 struct hamachi_private *np = netdev_priv(dev);
1891 spin_lock_irq(&np->lock);
1892 mii_ethtool_gset(&np->mii_if, ecmd);
1893 spin_unlock_irq(&np->lock);
1894 return 0;
1895 }
1896
hamachi_set_settings(struct net_device * dev,struct ethtool_cmd * ecmd)1897 static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1898 {
1899 struct hamachi_private *np = netdev_priv(dev);
1900 int res;
1901 spin_lock_irq(&np->lock);
1902 res = mii_ethtool_sset(&np->mii_if, ecmd);
1903 spin_unlock_irq(&np->lock);
1904 return res;
1905 }
1906
hamachi_nway_reset(struct net_device * dev)1907 static int hamachi_nway_reset(struct net_device *dev)
1908 {
1909 struct hamachi_private *np = netdev_priv(dev);
1910 return mii_nway_restart(&np->mii_if);
1911 }
1912
hamachi_get_link(struct net_device * dev)1913 static u32 hamachi_get_link(struct net_device *dev)
1914 {
1915 struct hamachi_private *np = netdev_priv(dev);
1916 return mii_link_ok(&np->mii_if);
1917 }
1918
1919 static const struct ethtool_ops ethtool_ops = {
1920 .begin = check_if_running,
1921 .get_drvinfo = hamachi_get_drvinfo,
1922 .get_settings = hamachi_get_settings,
1923 .set_settings = hamachi_set_settings,
1924 .nway_reset = hamachi_nway_reset,
1925 .get_link = hamachi_get_link,
1926 };
1927
1928 static const struct ethtool_ops ethtool_ops_no_mii = {
1929 .begin = check_if_running,
1930 .get_drvinfo = hamachi_get_drvinfo,
1931 };
1932
netdev_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)1933 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1934 {
1935 struct hamachi_private *np = netdev_priv(dev);
1936 struct mii_ioctl_data *data = if_mii(rq);
1937 int rc;
1938
1939 if (!netif_running(dev))
1940 return -EINVAL;
1941
1942 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1943 u32 *d = (u32 *)&rq->ifr_ifru;
1944 /* Should add this check here or an ordinary user can do nasty
1945 * things. -KDU
1946 *
1947 * TODO: Shut down the Rx and Tx engines while doing this.
1948 */
1949 if (!capable(CAP_NET_ADMIN))
1950 return -EPERM;
1951 writel(d[0], np->base + TxIntrCtrl);
1952 writel(d[1], np->base + RxIntrCtrl);
1953 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1954 (u32) readl(np->base + TxIntrCtrl),
1955 (u32) readl(np->base + RxIntrCtrl));
1956 rc = 0;
1957 }
1958
1959 else {
1960 spin_lock_irq(&np->lock);
1961 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1962 spin_unlock_irq(&np->lock);
1963 }
1964
1965 return rc;
1966 }
1967
1968
hamachi_remove_one(struct pci_dev * pdev)1969 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1970 {
1971 struct net_device *dev = pci_get_drvdata(pdev);
1972
1973 if (dev) {
1974 struct hamachi_private *hmp = netdev_priv(dev);
1975
1976 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1977 hmp->rx_ring_dma);
1978 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1979 hmp->tx_ring_dma);
1980 unregister_netdev(dev);
1981 iounmap(hmp->base);
1982 free_netdev(dev);
1983 pci_release_regions(pdev);
1984 pci_set_drvdata(pdev, NULL);
1985 }
1986 }
1987
1988 static struct pci_device_id hamachi_pci_tbl[] = {
1989 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1990 { 0, }
1991 };
1992 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1993
1994 static struct pci_driver hamachi_driver = {
1995 .name = DRV_NAME,
1996 .id_table = hamachi_pci_tbl,
1997 .probe = hamachi_init_one,
1998 .remove = __devexit_p(hamachi_remove_one),
1999 };
2000
hamachi_init(void)2001 static int __init hamachi_init (void)
2002 {
2003 /* when a module, this is printed whether or not devices are found in probe */
2004 #ifdef MODULE
2005 printk(version);
2006 #endif
2007 return pci_register_driver(&hamachi_driver);
2008 }
2009
hamachi_exit(void)2010 static void __exit hamachi_exit (void)
2011 {
2012 pci_unregister_driver(&hamachi_driver);
2013 }
2014
2015
2016 module_init(hamachi_init);
2017 module_exit(hamachi_exit);
2018