1 /*
2 * Alchemy Semi Au1000 IrDA driver
3 *
4 * Copyright 2001 MontaVista Software Inc.
5 * Author: MontaVista Software, Inc.
6 * ppopov@mvista.com or source@mvista.com
7 *
8 * This program is free software; you can distribute it and/or modify it
9 * under the terms of the GNU General Public License (Version 2) as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 * for more details.
16 *
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
20 */
21 #include <linux/module.h>
22 #include <linux/types.h>
23 #include <linux/init.h>
24 #include <linux/errno.h>
25 #include <linux/netdevice.h>
26 #include <linux/slab.h>
27 #include <linux/rtnetlink.h>
28 #include <linux/interrupt.h>
29 #include <linux/pm.h>
30 #include <linux/bitops.h>
31
32 #include <asm/irq.h>
33 #include <asm/io.h>
34 #include <asm/au1000.h>
35 #if defined(CONFIG_MIPS_PB1000) || defined(CONFIG_MIPS_PB1100)
36 #include <asm/pb1000.h>
37 #elif defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
38 #include <asm/db1x00.h>
39 #else
40 #error au1k_ir: unsupported board
41 #endif
42
43 #include <net/irda/irda.h>
44 #include <net/irda/irmod.h>
45 #include <net/irda/wrapper.h>
46 #include <net/irda/irda_device.h>
47 #include "au1000_ircc.h"
48
49 static int au1k_irda_net_init(struct net_device *);
50 static int au1k_irda_start(struct net_device *);
51 static int au1k_irda_stop(struct net_device *dev);
52 static int au1k_irda_hard_xmit(struct sk_buff *, struct net_device *);
53 static int au1k_irda_rx(struct net_device *);
54 static void au1k_irda_interrupt(int, void *);
55 static void au1k_tx_timeout(struct net_device *);
56 static int au1k_irda_ioctl(struct net_device *, struct ifreq *, int);
57 static int au1k_irda_set_speed(struct net_device *dev, int speed);
58
59 static void *dma_alloc(size_t, dma_addr_t *);
60 static void dma_free(void *, size_t);
61
62 static int qos_mtt_bits = 0x07; /* 1 ms or more */
63 static struct net_device *ir_devs[NUM_IR_IFF];
64 static char version[] __devinitdata =
65 "au1k_ircc:1.2 ppopov@mvista.com\n";
66
67 #define RUN_AT(x) (jiffies + (x))
68
69 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
70 static BCSR * const bcsr = (BCSR *)0xAE000000;
71 #endif
72
73 static DEFINE_SPINLOCK(ir_lock);
74
75 /*
76 * IrDA peripheral bug. You have to read the register
77 * twice to get the right value.
78 */
read_ir_reg(u32 addr)79 u32 read_ir_reg(u32 addr)
80 {
81 readl(addr);
82 return readl(addr);
83 }
84
85
86 /*
87 * Buffer allocation/deallocation routines. The buffer descriptor returned
88 * has the virtual and dma address of a buffer suitable for
89 * both, receive and transmit operations.
90 */
GetFreeDB(struct au1k_private * aup)91 static db_dest_t *GetFreeDB(struct au1k_private *aup)
92 {
93 db_dest_t *pDB;
94 pDB = aup->pDBfree;
95
96 if (pDB) {
97 aup->pDBfree = pDB->pnext;
98 }
99 return pDB;
100 }
101
ReleaseDB(struct au1k_private * aup,db_dest_t * pDB)102 static void ReleaseDB(struct au1k_private *aup, db_dest_t *pDB)
103 {
104 db_dest_t *pDBfree = aup->pDBfree;
105 if (pDBfree)
106 pDBfree->pnext = pDB;
107 aup->pDBfree = pDB;
108 }
109
110
111 /*
112 DMA memory allocation, derived from pci_alloc_consistent.
113 However, the Au1000 data cache is coherent (when programmed
114 so), therefore we return KSEG0 address, not KSEG1.
115 */
dma_alloc(size_t size,dma_addr_t * dma_handle)116 static void *dma_alloc(size_t size, dma_addr_t * dma_handle)
117 {
118 void *ret;
119 int gfp = GFP_ATOMIC | GFP_DMA;
120
121 ret = (void *) __get_free_pages(gfp, get_order(size));
122
123 if (ret != NULL) {
124 memset(ret, 0, size);
125 *dma_handle = virt_to_bus(ret);
126 ret = (void *)KSEG0ADDR(ret);
127 }
128 return ret;
129 }
130
131
dma_free(void * vaddr,size_t size)132 static void dma_free(void *vaddr, size_t size)
133 {
134 vaddr = (void *)KSEG0ADDR(vaddr);
135 free_pages((unsigned long) vaddr, get_order(size));
136 }
137
138
139 static void
setup_hw_rings(struct au1k_private * aup,u32 rx_base,u32 tx_base)140 setup_hw_rings(struct au1k_private *aup, u32 rx_base, u32 tx_base)
141 {
142 int i;
143 for (i=0; i<NUM_IR_DESC; i++) {
144 aup->rx_ring[i] = (volatile ring_dest_t *)
145 (rx_base + sizeof(ring_dest_t)*i);
146 }
147 for (i=0; i<NUM_IR_DESC; i++) {
148 aup->tx_ring[i] = (volatile ring_dest_t *)
149 (tx_base + sizeof(ring_dest_t)*i);
150 }
151 }
152
au1k_irda_init(void)153 static int au1k_irda_init(void)
154 {
155 static unsigned version_printed = 0;
156 struct au1k_private *aup;
157 struct net_device *dev;
158 int err;
159
160 if (version_printed++ == 0) printk(version);
161
162 dev = alloc_irdadev(sizeof(struct au1k_private));
163 if (!dev)
164 return -ENOMEM;
165
166 dev->irq = AU1000_IRDA_RX_INT; /* TX has its own interrupt */
167 err = au1k_irda_net_init(dev);
168 if (err)
169 goto out;
170 err = register_netdev(dev);
171 if (err)
172 goto out1;
173 ir_devs[0] = dev;
174 printk(KERN_INFO "IrDA: Registered device %s\n", dev->name);
175 return 0;
176
177 out1:
178 aup = netdev_priv(dev);
179 dma_free((void *)aup->db[0].vaddr,
180 MAX_BUF_SIZE * 2*NUM_IR_DESC);
181 dma_free((void *)aup->rx_ring[0],
182 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
183 kfree(aup->rx_buff.head);
184 out:
185 free_netdev(dev);
186 return err;
187 }
188
au1k_irda_init_iobuf(iobuff_t * io,int size)189 static int au1k_irda_init_iobuf(iobuff_t *io, int size)
190 {
191 io->head = kmalloc(size, GFP_KERNEL);
192 if (io->head != NULL) {
193 io->truesize = size;
194 io->in_frame = FALSE;
195 io->state = OUTSIDE_FRAME;
196 io->data = io->head;
197 }
198 return io->head ? 0 : -ENOMEM;
199 }
200
au1k_irda_net_init(struct net_device * dev)201 static int au1k_irda_net_init(struct net_device *dev)
202 {
203 struct au1k_private *aup = netdev_priv(dev);
204 int i, retval = 0, err;
205 db_dest_t *pDB, *pDBfree;
206 dma_addr_t temp;
207
208 err = au1k_irda_init_iobuf(&aup->rx_buff, 14384);
209 if (err)
210 goto out1;
211
212 dev->open = au1k_irda_start;
213 dev->hard_start_xmit = au1k_irda_hard_xmit;
214 dev->stop = au1k_irda_stop;
215 dev->do_ioctl = au1k_irda_ioctl;
216 dev->tx_timeout = au1k_tx_timeout;
217
218 irda_init_max_qos_capabilies(&aup->qos);
219
220 /* The only value we must override it the baudrate */
221 aup->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
222 IR_115200|IR_576000 |(IR_4000000 << 8);
223
224 aup->qos.min_turn_time.bits = qos_mtt_bits;
225 irda_qos_bits_to_value(&aup->qos);
226
227 retval = -ENOMEM;
228
229 /* Tx ring follows rx ring + 512 bytes */
230 /* we need a 1k aligned buffer */
231 aup->rx_ring[0] = (ring_dest_t *)
232 dma_alloc(2*MAX_NUM_IR_DESC*(sizeof(ring_dest_t)), &temp);
233 if (!aup->rx_ring[0])
234 goto out2;
235
236 /* allocate the data buffers */
237 aup->db[0].vaddr =
238 (void *)dma_alloc(MAX_BUF_SIZE * 2*NUM_IR_DESC, &temp);
239 if (!aup->db[0].vaddr)
240 goto out3;
241
242 setup_hw_rings(aup, (u32)aup->rx_ring[0], (u32)aup->rx_ring[0] + 512);
243
244 pDBfree = NULL;
245 pDB = aup->db;
246 for (i=0; i<(2*NUM_IR_DESC); i++) {
247 pDB->pnext = pDBfree;
248 pDBfree = pDB;
249 pDB->vaddr =
250 (u32 *)((unsigned)aup->db[0].vaddr + MAX_BUF_SIZE*i);
251 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
252 pDB++;
253 }
254 aup->pDBfree = pDBfree;
255
256 /* attach a data buffer to each descriptor */
257 for (i=0; i<NUM_IR_DESC; i++) {
258 pDB = GetFreeDB(aup);
259 if (!pDB) goto out;
260 aup->rx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
261 aup->rx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
262 aup->rx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
263 aup->rx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
264 aup->rx_db_inuse[i] = pDB;
265 }
266 for (i=0; i<NUM_IR_DESC; i++) {
267 pDB = GetFreeDB(aup);
268 if (!pDB) goto out;
269 aup->tx_ring[i]->addr_0 = (u8)(pDB->dma_addr & 0xff);
270 aup->tx_ring[i]->addr_1 = (u8)((pDB->dma_addr>>8) & 0xff);
271 aup->tx_ring[i]->addr_2 = (u8)((pDB->dma_addr>>16) & 0xff);
272 aup->tx_ring[i]->addr_3 = (u8)((pDB->dma_addr>>24) & 0xff);
273 aup->tx_ring[i]->count_0 = 0;
274 aup->tx_ring[i]->count_1 = 0;
275 aup->tx_ring[i]->flags = 0;
276 aup->tx_db_inuse[i] = pDB;
277 }
278
279 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
280 /* power on */
281 bcsr->resets &= ~BCSR_RESETS_IRDA_MODE_MASK;
282 bcsr->resets |= BCSR_RESETS_IRDA_MODE_FULL;
283 au_sync();
284 #endif
285
286 return 0;
287
288 out3:
289 dma_free((void *)aup->rx_ring[0],
290 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
291 out2:
292 kfree(aup->rx_buff.head);
293 out1:
294 printk(KERN_ERR "au1k_init_module failed. Returns %d\n", retval);
295 return retval;
296 }
297
298
au1k_init(struct net_device * dev)299 static int au1k_init(struct net_device *dev)
300 {
301 struct au1k_private *aup = netdev_priv(dev);
302 int i;
303 u32 control;
304 u32 ring_address;
305
306 /* bring the device out of reset */
307 control = 0xe; /* coherent, clock enable, one half system clock */
308
309 #ifndef CONFIG_CPU_LITTLE_ENDIAN
310 control |= 1;
311 #endif
312 aup->tx_head = 0;
313 aup->tx_tail = 0;
314 aup->rx_head = 0;
315
316 for (i=0; i<NUM_IR_DESC; i++) {
317 aup->rx_ring[i]->flags = AU_OWN;
318 }
319
320 writel(control, IR_INTERFACE_CONFIG);
321 au_sync_delay(10);
322
323 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE); /* disable PHY */
324 au_sync_delay(1);
325
326 writel(MAX_BUF_SIZE, IR_MAX_PKT_LEN);
327
328 ring_address = (u32)virt_to_phys((void *)aup->rx_ring[0]);
329 writel(ring_address >> 26, IR_RING_BASE_ADDR_H);
330 writel((ring_address >> 10) & 0xffff, IR_RING_BASE_ADDR_L);
331
332 writel(RING_SIZE_64<<8 | RING_SIZE_64<<12, IR_RING_SIZE);
333
334 writel(1<<2 | IR_ONE_PIN, IR_CONFIG_2); /* 48MHz */
335 writel(0, IR_RING_ADDR_CMPR);
336
337 au1k_irda_set_speed(dev, 9600);
338 return 0;
339 }
340
au1k_irda_start(struct net_device * dev)341 static int au1k_irda_start(struct net_device *dev)
342 {
343 int retval;
344 char hwname[32];
345 struct au1k_private *aup = netdev_priv(dev);
346
347 if ((retval = au1k_init(dev))) {
348 printk(KERN_ERR "%s: error in au1k_init\n", dev->name);
349 return retval;
350 }
351
352 if ((retval = request_irq(AU1000_IRDA_TX_INT, &au1k_irda_interrupt,
353 0, dev->name, dev))) {
354 printk(KERN_ERR "%s: unable to get IRQ %d\n",
355 dev->name, dev->irq);
356 return retval;
357 }
358 if ((retval = request_irq(AU1000_IRDA_RX_INT, &au1k_irda_interrupt,
359 0, dev->name, dev))) {
360 free_irq(AU1000_IRDA_TX_INT, dev);
361 printk(KERN_ERR "%s: unable to get IRQ %d\n",
362 dev->name, dev->irq);
363 return retval;
364 }
365
366 /* Give self a hardware name */
367 sprintf(hwname, "Au1000 SIR/FIR");
368 aup->irlap = irlap_open(dev, &aup->qos, hwname);
369 netif_start_queue(dev);
370
371 writel(read_ir_reg(IR_CONFIG_2) | 1<<8, IR_CONFIG_2); /* int enable */
372
373 aup->timer.expires = RUN_AT((3*HZ));
374 aup->timer.data = (unsigned long)dev;
375 return 0;
376 }
377
au1k_irda_stop(struct net_device * dev)378 static int au1k_irda_stop(struct net_device *dev)
379 {
380 struct au1k_private *aup = netdev_priv(dev);
381
382 /* disable interrupts */
383 writel(read_ir_reg(IR_CONFIG_2) & ~(1<<8), IR_CONFIG_2);
384 writel(0, IR_CONFIG_1);
385 writel(0, IR_INTERFACE_CONFIG); /* disable clock */
386 au_sync();
387
388 if (aup->irlap) {
389 irlap_close(aup->irlap);
390 aup->irlap = NULL;
391 }
392
393 netif_stop_queue(dev);
394 del_timer(&aup->timer);
395
396 /* disable the interrupt */
397 free_irq(AU1000_IRDA_TX_INT, dev);
398 free_irq(AU1000_IRDA_RX_INT, dev);
399 return 0;
400 }
401
au1k_irda_exit(void)402 static void __exit au1k_irda_exit(void)
403 {
404 struct net_device *dev = ir_devs[0];
405 struct au1k_private *aup = netdev_priv(dev);
406
407 unregister_netdev(dev);
408
409 dma_free((void *)aup->db[0].vaddr,
410 MAX_BUF_SIZE * 2*NUM_IR_DESC);
411 dma_free((void *)aup->rx_ring[0],
412 2 * MAX_NUM_IR_DESC*(sizeof(ring_dest_t)));
413 kfree(aup->rx_buff.head);
414 free_netdev(dev);
415 }
416
417
418 static inline void
update_tx_stats(struct net_device * dev,u32 status,u32 pkt_len)419 update_tx_stats(struct net_device *dev, u32 status, u32 pkt_len)
420 {
421 struct au1k_private *aup = netdev_priv(dev);
422 struct net_device_stats *ps = &aup->stats;
423
424 ps->tx_packets++;
425 ps->tx_bytes += pkt_len;
426
427 if (status & IR_TX_ERROR) {
428 ps->tx_errors++;
429 ps->tx_aborted_errors++;
430 }
431 }
432
433
au1k_tx_ack(struct net_device * dev)434 static void au1k_tx_ack(struct net_device *dev)
435 {
436 struct au1k_private *aup = netdev_priv(dev);
437 volatile ring_dest_t *ptxd;
438
439 ptxd = aup->tx_ring[aup->tx_tail];
440 while (!(ptxd->flags & AU_OWN) && (aup->tx_tail != aup->tx_head)) {
441 update_tx_stats(dev, ptxd->flags,
442 ptxd->count_1<<8 | ptxd->count_0);
443 ptxd->count_0 = 0;
444 ptxd->count_1 = 0;
445 au_sync();
446
447 aup->tx_tail = (aup->tx_tail + 1) & (NUM_IR_DESC - 1);
448 ptxd = aup->tx_ring[aup->tx_tail];
449
450 if (aup->tx_full) {
451 aup->tx_full = 0;
452 netif_wake_queue(dev);
453 }
454 }
455
456 if (aup->tx_tail == aup->tx_head) {
457 if (aup->newspeed) {
458 au1k_irda_set_speed(dev, aup->newspeed);
459 aup->newspeed = 0;
460 }
461 else {
462 writel(read_ir_reg(IR_CONFIG_1) & ~IR_TX_ENABLE,
463 IR_CONFIG_1);
464 au_sync();
465 writel(read_ir_reg(IR_CONFIG_1) | IR_RX_ENABLE,
466 IR_CONFIG_1);
467 writel(0, IR_RING_PROMPT);
468 au_sync();
469 }
470 }
471 }
472
473
474 /*
475 * Au1000 transmit routine.
476 */
au1k_irda_hard_xmit(struct sk_buff * skb,struct net_device * dev)477 static int au1k_irda_hard_xmit(struct sk_buff *skb, struct net_device *dev)
478 {
479 struct au1k_private *aup = netdev_priv(dev);
480 int speed = irda_get_next_speed(skb);
481 volatile ring_dest_t *ptxd;
482 u32 len;
483
484 u32 flags;
485 db_dest_t *pDB;
486
487 if (speed != aup->speed && speed != -1) {
488 aup->newspeed = speed;
489 }
490
491 if ((skb->len == 0) && (aup->newspeed)) {
492 if (aup->tx_tail == aup->tx_head) {
493 au1k_irda_set_speed(dev, speed);
494 aup->newspeed = 0;
495 }
496 dev_kfree_skb(skb);
497 return 0;
498 }
499
500 ptxd = aup->tx_ring[aup->tx_head];
501 flags = ptxd->flags;
502
503 if (flags & AU_OWN) {
504 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
505 netif_stop_queue(dev);
506 aup->tx_full = 1;
507 return 1;
508 }
509 else if (((aup->tx_head + 1) & (NUM_IR_DESC - 1)) == aup->tx_tail) {
510 printk(KERN_DEBUG "%s: tx_full\n", dev->name);
511 netif_stop_queue(dev);
512 aup->tx_full = 1;
513 return 1;
514 }
515
516 pDB = aup->tx_db_inuse[aup->tx_head];
517
518 #if 0
519 if (read_ir_reg(IR_RX_BYTE_CNT) != 0) {
520 printk("tx warning: rx byte cnt %x\n",
521 read_ir_reg(IR_RX_BYTE_CNT));
522 }
523 #endif
524
525 if (aup->speed == 4000000) {
526 /* FIR */
527 skb_copy_from_linear_data(skb, pDB->vaddr, skb->len);
528 ptxd->count_0 = skb->len & 0xff;
529 ptxd->count_1 = (skb->len >> 8) & 0xff;
530
531 }
532 else {
533 /* SIR */
534 len = async_wrap_skb(skb, (u8 *)pDB->vaddr, MAX_BUF_SIZE);
535 ptxd->count_0 = len & 0xff;
536 ptxd->count_1 = (len >> 8) & 0xff;
537 ptxd->flags |= IR_DIS_CRC;
538 au_writel(au_readl(0xae00000c) & ~(1<<13), 0xae00000c);
539 }
540 ptxd->flags |= AU_OWN;
541 au_sync();
542
543 writel(read_ir_reg(IR_CONFIG_1) | IR_TX_ENABLE, IR_CONFIG_1);
544 writel(0, IR_RING_PROMPT);
545 au_sync();
546
547 dev_kfree_skb(skb);
548 aup->tx_head = (aup->tx_head + 1) & (NUM_IR_DESC - 1);
549 dev->trans_start = jiffies;
550 return 0;
551 }
552
553
554 static inline void
update_rx_stats(struct net_device * dev,u32 status,u32 count)555 update_rx_stats(struct net_device *dev, u32 status, u32 count)
556 {
557 struct au1k_private *aup = netdev_priv(dev);
558 struct net_device_stats *ps = &aup->stats;
559
560 ps->rx_packets++;
561
562 if (status & IR_RX_ERROR) {
563 ps->rx_errors++;
564 if (status & (IR_PHY_ERROR|IR_FIFO_OVER))
565 ps->rx_missed_errors++;
566 if (status & IR_MAX_LEN)
567 ps->rx_length_errors++;
568 if (status & IR_CRC_ERROR)
569 ps->rx_crc_errors++;
570 }
571 else
572 ps->rx_bytes += count;
573 }
574
575 /*
576 * Au1000 receive routine.
577 */
au1k_irda_rx(struct net_device * dev)578 static int au1k_irda_rx(struct net_device *dev)
579 {
580 struct au1k_private *aup = netdev_priv(dev);
581 struct sk_buff *skb;
582 volatile ring_dest_t *prxd;
583 u32 flags, count;
584 db_dest_t *pDB;
585
586 prxd = aup->rx_ring[aup->rx_head];
587 flags = prxd->flags;
588
589 while (!(flags & AU_OWN)) {
590 pDB = aup->rx_db_inuse[aup->rx_head];
591 count = prxd->count_1<<8 | prxd->count_0;
592 if (!(flags & IR_RX_ERROR)) {
593 /* good frame */
594 update_rx_stats(dev, flags, count);
595 skb=alloc_skb(count+1,GFP_ATOMIC);
596 if (skb == NULL) {
597 aup->netdev->stats.rx_dropped++;
598 continue;
599 }
600 skb_reserve(skb, 1);
601 if (aup->speed == 4000000)
602 skb_put(skb, count);
603 else
604 skb_put(skb, count-2);
605 skb_copy_to_linear_data(skb, pDB->vaddr, count - 2);
606 skb->dev = dev;
607 skb_reset_mac_header(skb);
608 skb->protocol = htons(ETH_P_IRDA);
609 netif_rx(skb);
610 prxd->count_0 = 0;
611 prxd->count_1 = 0;
612 }
613 prxd->flags |= AU_OWN;
614 aup->rx_head = (aup->rx_head + 1) & (NUM_IR_DESC - 1);
615 writel(0, IR_RING_PROMPT);
616 au_sync();
617
618 /* next descriptor */
619 prxd = aup->rx_ring[aup->rx_head];
620 flags = prxd->flags;
621
622 }
623 return 0;
624 }
625
626
au1k_irda_interrupt(int dummy,void * dev_id)627 static irqreturn_t au1k_irda_interrupt(int dummy, void *dev_id)
628 {
629 struct net_device *dev = dev_id;
630
631 writel(0, IR_INT_CLEAR); /* ack irda interrupts */
632
633 au1k_irda_rx(dev);
634 au1k_tx_ack(dev);
635
636 return IRQ_HANDLED;
637 }
638
639
640 /*
641 * The Tx ring has been full longer than the watchdog timeout
642 * value. The transmitter must be hung?
643 */
au1k_tx_timeout(struct net_device * dev)644 static void au1k_tx_timeout(struct net_device *dev)
645 {
646 u32 speed;
647 struct au1k_private *aup = netdev_priv(dev);
648
649 printk(KERN_ERR "%s: tx timeout\n", dev->name);
650 speed = aup->speed;
651 aup->speed = 0;
652 au1k_irda_set_speed(dev, speed);
653 aup->tx_full = 0;
654 netif_wake_queue(dev);
655 }
656
657
658 /*
659 * Set the IrDA communications speed.
660 */
661 static int
au1k_irda_set_speed(struct net_device * dev,int speed)662 au1k_irda_set_speed(struct net_device *dev, int speed)
663 {
664 unsigned long flags;
665 struct au1k_private *aup = netdev_priv(dev);
666 u32 control;
667 int ret = 0, timeout = 10, i;
668 volatile ring_dest_t *ptxd;
669 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
670 unsigned long irda_resets;
671 #endif
672
673 if (speed == aup->speed)
674 return ret;
675
676 spin_lock_irqsave(&ir_lock, flags);
677
678 /* disable PHY first */
679 writel(read_ir_reg(IR_ENABLE) & ~0x8000, IR_ENABLE);
680
681 /* disable RX/TX */
682 writel(read_ir_reg(IR_CONFIG_1) & ~(IR_RX_ENABLE|IR_TX_ENABLE),
683 IR_CONFIG_1);
684 au_sync_delay(1);
685 while (read_ir_reg(IR_ENABLE) & (IR_RX_STATUS | IR_TX_STATUS)) {
686 mdelay(1);
687 if (!timeout--) {
688 printk(KERN_ERR "%s: rx/tx disable timeout\n",
689 dev->name);
690 break;
691 }
692 }
693
694 /* disable DMA */
695 writel(read_ir_reg(IR_CONFIG_1) & ~IR_DMA_ENABLE, IR_CONFIG_1);
696 au_sync_delay(1);
697
698 /*
699 * After we disable tx/rx. the index pointers
700 * go back to zero.
701 */
702 aup->tx_head = aup->tx_tail = aup->rx_head = 0;
703 for (i=0; i<NUM_IR_DESC; i++) {
704 ptxd = aup->tx_ring[i];
705 ptxd->flags = 0;
706 ptxd->count_0 = 0;
707 ptxd->count_1 = 0;
708 }
709
710 for (i=0; i<NUM_IR_DESC; i++) {
711 ptxd = aup->rx_ring[i];
712 ptxd->count_0 = 0;
713 ptxd->count_1 = 0;
714 ptxd->flags = AU_OWN;
715 }
716
717 if (speed == 4000000) {
718 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
719 bcsr->resets |= BCSR_RESETS_FIR_SEL;
720 #else /* Pb1000 and Pb1100 */
721 writel(1<<13, CPLD_AUX1);
722 #endif
723 }
724 else {
725 #if defined(CONFIG_MIPS_DB1000) || defined(CONFIG_MIPS_DB1100)
726 bcsr->resets &= ~BCSR_RESETS_FIR_SEL;
727 #else /* Pb1000 and Pb1100 */
728 writel(readl(CPLD_AUX1) & ~(1<<13), CPLD_AUX1);
729 #endif
730 }
731
732 switch (speed) {
733 case 9600:
734 writel(11<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
735 writel(IR_SIR_MODE, IR_CONFIG_1);
736 break;
737 case 19200:
738 writel(5<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
739 writel(IR_SIR_MODE, IR_CONFIG_1);
740 break;
741 case 38400:
742 writel(2<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
743 writel(IR_SIR_MODE, IR_CONFIG_1);
744 break;
745 case 57600:
746 writel(1<<10 | 12<<5, IR_WRITE_PHY_CONFIG);
747 writel(IR_SIR_MODE, IR_CONFIG_1);
748 break;
749 case 115200:
750 writel(12<<5, IR_WRITE_PHY_CONFIG);
751 writel(IR_SIR_MODE, IR_CONFIG_1);
752 break;
753 case 4000000:
754 writel(0xF, IR_WRITE_PHY_CONFIG);
755 writel(IR_FIR|IR_DMA_ENABLE|IR_RX_ENABLE, IR_CONFIG_1);
756 break;
757 default:
758 printk(KERN_ERR "%s unsupported speed %x\n", dev->name, speed);
759 ret = -EINVAL;
760 break;
761 }
762
763 aup->speed = speed;
764 writel(read_ir_reg(IR_ENABLE) | 0x8000, IR_ENABLE);
765 au_sync();
766
767 control = read_ir_reg(IR_ENABLE);
768 writel(0, IR_RING_PROMPT);
769 au_sync();
770
771 if (control & (1<<14)) {
772 printk(KERN_ERR "%s: configuration error\n", dev->name);
773 }
774 else {
775 if (control & (1<<11))
776 printk(KERN_DEBUG "%s Valid SIR config\n", dev->name);
777 if (control & (1<<12))
778 printk(KERN_DEBUG "%s Valid MIR config\n", dev->name);
779 if (control & (1<<13))
780 printk(KERN_DEBUG "%s Valid FIR config\n", dev->name);
781 if (control & (1<<10))
782 printk(KERN_DEBUG "%s TX enabled\n", dev->name);
783 if (control & (1<<9))
784 printk(KERN_DEBUG "%s RX enabled\n", dev->name);
785 }
786
787 spin_unlock_irqrestore(&ir_lock, flags);
788 return ret;
789 }
790
791 static int
au1k_irda_ioctl(struct net_device * dev,struct ifreq * ifreq,int cmd)792 au1k_irda_ioctl(struct net_device *dev, struct ifreq *ifreq, int cmd)
793 {
794 struct if_irda_req *rq = (struct if_irda_req *)ifreq;
795 struct au1k_private *aup = netdev_priv(dev);
796 int ret = -EOPNOTSUPP;
797
798 switch (cmd) {
799 case SIOCSBANDWIDTH:
800 if (capable(CAP_NET_ADMIN)) {
801 /*
802 * We are unable to set the speed if the
803 * device is not running.
804 */
805 if (aup->open)
806 ret = au1k_irda_set_speed(dev,
807 rq->ifr_baudrate);
808 else {
809 printk(KERN_ERR "%s ioctl: !netif_running\n",
810 dev->name);
811 ret = 0;
812 }
813 }
814 break;
815
816 case SIOCSMEDIABUSY:
817 ret = -EPERM;
818 if (capable(CAP_NET_ADMIN)) {
819 irda_device_set_media_busy(dev, TRUE);
820 ret = 0;
821 }
822 break;
823
824 case SIOCGRECEIVING:
825 rq->ifr_receiving = 0;
826 break;
827 default:
828 break;
829 }
830 return ret;
831 }
832
833 MODULE_AUTHOR("Pete Popov <ppopov@mvista.com>");
834 MODULE_DESCRIPTION("Au1000 IrDA Device Driver");
835
836 module_init(au1k_irda_init);
837 module_exit(au1k_irda_exit);
838