1 /*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2008 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26 *******************************************************************************/
27
28 /* ethtool support for ixgbe */
29
30 #include <linux/types.h>
31 #include <linux/module.h>
32 #include <linux/pci.h>
33 #include <linux/netdevice.h>
34 #include <linux/ethtool.h>
35 #include <linux/vmalloc.h>
36 #include <linux/uaccess.h>
37
38 #include "ixgbe.h"
39
40
41 #define IXGBE_ALL_RAR_ENTRIES 16
42
43 struct ixgbe_stats {
44 char stat_string[ETH_GSTRING_LEN];
45 int sizeof_stat;
46 int stat_offset;
47 };
48
49 #define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
50 offsetof(struct ixgbe_adapter, m)
51 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
52 {"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
53 {"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
54 {"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
55 {"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
56 {"lsc_int", IXGBE_STAT(lsc_int)},
57 {"tx_busy", IXGBE_STAT(tx_busy)},
58 {"non_eop_descs", IXGBE_STAT(non_eop_descs)},
59 {"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
60 {"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
61 {"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
62 {"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
63 {"multicast", IXGBE_STAT(net_stats.multicast)},
64 {"broadcast", IXGBE_STAT(stats.bprc)},
65 {"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
66 {"collisions", IXGBE_STAT(net_stats.collisions)},
67 {"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
68 {"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
69 {"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
70 {"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
71 {"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
72 {"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
73 {"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
74 {"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
75 {"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
76 {"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
77 {"tx_restart_queue", IXGBE_STAT(restart_queue)},
78 {"rx_long_length_errors", IXGBE_STAT(stats.roc)},
79 {"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
80 {"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
81 {"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
82 {"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
83 {"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
84 {"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
85 {"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
86 {"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
87 {"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
88 {"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
89 {"rx_header_split", IXGBE_STAT(rx_hdr_split)},
90 {"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
91 {"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
92 {"lro_aggregated", IXGBE_STAT(lro_aggregated)},
93 {"lro_flushed", IXGBE_STAT(lro_flushed)},
94 };
95
96 #define IXGBE_QUEUE_STATS_LEN \
97 ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
98 ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
99 (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
100 #define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
101 #define IXGBE_PB_STATS_LEN ( \
102 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
103 IXGBE_FLAG_DCB_ENABLED) ? \
104 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
105 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
106 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
107 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
108 / sizeof(u64) : 0)
109 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
110 IXGBE_PB_STATS_LEN + \
111 IXGBE_QUEUE_STATS_LEN)
112
ixgbe_get_settings(struct net_device * netdev,struct ethtool_cmd * ecmd)113 static int ixgbe_get_settings(struct net_device *netdev,
114 struct ethtool_cmd *ecmd)
115 {
116 struct ixgbe_adapter *adapter = netdev_priv(netdev);
117 struct ixgbe_hw *hw = &adapter->hw;
118 u32 link_speed = 0;
119 bool link_up;
120
121 ecmd->supported = SUPPORTED_10000baseT_Full;
122 ecmd->autoneg = AUTONEG_ENABLE;
123 ecmd->transceiver = XCVR_EXTERNAL;
124 if (hw->phy.media_type == ixgbe_media_type_copper) {
125 ecmd->supported |= (SUPPORTED_1000baseT_Full |
126 SUPPORTED_TP | SUPPORTED_Autoneg);
127
128 ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
129 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
130 ecmd->advertising |= ADVERTISED_10000baseT_Full;
131 if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
132 ecmd->advertising |= ADVERTISED_1000baseT_Full;
133
134 ecmd->port = PORT_TP;
135 } else {
136 ecmd->supported |= SUPPORTED_FIBRE;
137 ecmd->advertising = (ADVERTISED_10000baseT_Full |
138 ADVERTISED_FIBRE);
139 ecmd->port = PORT_FIBRE;
140 ecmd->autoneg = AUTONEG_DISABLE;
141 }
142
143 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
144 if (link_up) {
145 ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
146 SPEED_10000 : SPEED_1000;
147 ecmd->duplex = DUPLEX_FULL;
148 } else {
149 ecmd->speed = -1;
150 ecmd->duplex = -1;
151 }
152
153 return 0;
154 }
155
ixgbe_set_settings(struct net_device * netdev,struct ethtool_cmd * ecmd)156 static int ixgbe_set_settings(struct net_device *netdev,
157 struct ethtool_cmd *ecmd)
158 {
159 struct ixgbe_adapter *adapter = netdev_priv(netdev);
160 struct ixgbe_hw *hw = &adapter->hw;
161 u32 advertised, old;
162 s32 err;
163
164 switch (hw->phy.media_type) {
165 case ixgbe_media_type_fiber:
166 if ((ecmd->autoneg == AUTONEG_ENABLE) ||
167 (ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
168 return -EINVAL;
169 /* in this case we currently only support 10Gb/FULL */
170 break;
171 case ixgbe_media_type_copper:
172 /* 10000/copper and 1000/copper must autoneg
173 * this function does not support any duplex forcing, but can
174 * limit the advertising of the adapter to only 10000 or 1000 */
175 if (ecmd->autoneg == AUTONEG_DISABLE)
176 return -EINVAL;
177
178 old = hw->phy.autoneg_advertised;
179 advertised = 0;
180 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
181 advertised |= IXGBE_LINK_SPEED_10GB_FULL;
182
183 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
184 advertised |= IXGBE_LINK_SPEED_1GB_FULL;
185
186 if (old == advertised)
187 break;
188 /* this sets the link speed and restarts auto-neg */
189 err = hw->mac.ops.setup_link_speed(hw, advertised, true, true);
190 if (err) {
191 DPRINTK(PROBE, INFO,
192 "setup link failed with code %d\n", err);
193 hw->mac.ops.setup_link_speed(hw, old, true, true);
194 }
195 break;
196 default:
197 break;
198 }
199
200 return 0;
201 }
202
ixgbe_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)203 static void ixgbe_get_pauseparam(struct net_device *netdev,
204 struct ethtool_pauseparam *pause)
205 {
206 struct ixgbe_adapter *adapter = netdev_priv(netdev);
207 struct ixgbe_hw *hw = &adapter->hw;
208
209 pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0);
210
211 if (hw->fc.type == ixgbe_fc_rx_pause) {
212 pause->rx_pause = 1;
213 } else if (hw->fc.type == ixgbe_fc_tx_pause) {
214 pause->tx_pause = 1;
215 } else if (hw->fc.type == ixgbe_fc_full) {
216 pause->rx_pause = 1;
217 pause->tx_pause = 1;
218 }
219 }
220
ixgbe_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pause)221 static int ixgbe_set_pauseparam(struct net_device *netdev,
222 struct ethtool_pauseparam *pause)
223 {
224 struct ixgbe_adapter *adapter = netdev_priv(netdev);
225 struct ixgbe_hw *hw = &adapter->hw;
226
227 if ((pause->autoneg == AUTONEG_ENABLE) ||
228 (pause->rx_pause && pause->tx_pause))
229 hw->fc.type = ixgbe_fc_full;
230 else if (pause->rx_pause && !pause->tx_pause)
231 hw->fc.type = ixgbe_fc_rx_pause;
232 else if (!pause->rx_pause && pause->tx_pause)
233 hw->fc.type = ixgbe_fc_tx_pause;
234 else if (!pause->rx_pause && !pause->tx_pause)
235 hw->fc.type = ixgbe_fc_none;
236 else
237 return -EINVAL;
238
239 hw->fc.original_type = hw->fc.type;
240
241 if (netif_running(netdev))
242 ixgbe_reinit_locked(adapter);
243 else
244 ixgbe_reset(adapter);
245
246 return 0;
247 }
248
ixgbe_get_rx_csum(struct net_device * netdev)249 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
250 {
251 struct ixgbe_adapter *adapter = netdev_priv(netdev);
252 return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
253 }
254
ixgbe_set_rx_csum(struct net_device * netdev,u32 data)255 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
256 {
257 struct ixgbe_adapter *adapter = netdev_priv(netdev);
258 if (data)
259 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
260 else
261 adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
262
263 if (netif_running(netdev))
264 ixgbe_reinit_locked(adapter);
265 else
266 ixgbe_reset(adapter);
267
268 return 0;
269 }
270
ixgbe_get_tx_csum(struct net_device * netdev)271 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
272 {
273 return (netdev->features & NETIF_F_IP_CSUM) != 0;
274 }
275
ixgbe_set_tx_csum(struct net_device * netdev,u32 data)276 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
277 {
278 if (data)
279 netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
280 else
281 netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
282
283 return 0;
284 }
285
ixgbe_set_tso(struct net_device * netdev,u32 data)286 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
287 {
288 if (data) {
289 netdev->features |= NETIF_F_TSO;
290 netdev->features |= NETIF_F_TSO6;
291 } else {
292 netif_tx_stop_all_queues(netdev);
293 netdev->features &= ~NETIF_F_TSO;
294 netdev->features &= ~NETIF_F_TSO6;
295 netif_tx_start_all_queues(netdev);
296 }
297 return 0;
298 }
299
ixgbe_get_msglevel(struct net_device * netdev)300 static u32 ixgbe_get_msglevel(struct net_device *netdev)
301 {
302 struct ixgbe_adapter *adapter = netdev_priv(netdev);
303 return adapter->msg_enable;
304 }
305
ixgbe_set_msglevel(struct net_device * netdev,u32 data)306 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
307 {
308 struct ixgbe_adapter *adapter = netdev_priv(netdev);
309 adapter->msg_enable = data;
310 }
311
ixgbe_get_regs_len(struct net_device * netdev)312 static int ixgbe_get_regs_len(struct net_device *netdev)
313 {
314 #define IXGBE_REGS_LEN 1128
315 return IXGBE_REGS_LEN * sizeof(u32);
316 }
317
318 #define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
319
ixgbe_get_regs(struct net_device * netdev,struct ethtool_regs * regs,void * p)320 static void ixgbe_get_regs(struct net_device *netdev,
321 struct ethtool_regs *regs, void *p)
322 {
323 struct ixgbe_adapter *adapter = netdev_priv(netdev);
324 struct ixgbe_hw *hw = &adapter->hw;
325 u32 *regs_buff = p;
326 u8 i;
327
328 memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
329
330 regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
331
332 /* General Registers */
333 regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
334 regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
335 regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
336 regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
337 regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
338 regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
339 regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
340 regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
341
342 /* NVM Register */
343 regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
344 regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
345 regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
346 regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
347 regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
348 regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
349 regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
350 regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
351 regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
352 regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
353
354 /* Interrupt */
355 /* don't read EICR because it can clear interrupt causes, instead
356 * read EICS which is a shadow but doesn't clear EICR */
357 regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
358 regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
359 regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
360 regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
361 regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
362 regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
363 regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
364 regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
365 regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
366 regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
367 regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
368 regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
369
370 /* Flow Control */
371 regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
372 regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
373 regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
374 regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
375 regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
376 for (i = 0; i < 8; i++)
377 regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
378 for (i = 0; i < 8; i++)
379 regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
380 regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
381 regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
382
383 /* Receive DMA */
384 for (i = 0; i < 64; i++)
385 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
386 for (i = 0; i < 64; i++)
387 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
388 for (i = 0; i < 64; i++)
389 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
390 for (i = 0; i < 64; i++)
391 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
392 for (i = 0; i < 64; i++)
393 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
394 for (i = 0; i < 64; i++)
395 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
396 for (i = 0; i < 16; i++)
397 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
398 for (i = 0; i < 16; i++)
399 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
400 regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
401 for (i = 0; i < 8; i++)
402 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
403 regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
404 regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
405
406 /* Receive */
407 regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
408 regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
409 for (i = 0; i < 16; i++)
410 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
411 for (i = 0; i < 16; i++)
412 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
413 regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
414 regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
415 regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
416 regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
417 regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
418 regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
419 for (i = 0; i < 8; i++)
420 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
421 for (i = 0; i < 8; i++)
422 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
423 regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
424
425 /* Transmit */
426 for (i = 0; i < 32; i++)
427 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
428 for (i = 0; i < 32; i++)
429 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
430 for (i = 0; i < 32; i++)
431 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
432 for (i = 0; i < 32; i++)
433 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
434 for (i = 0; i < 32; i++)
435 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
436 for (i = 0; i < 32; i++)
437 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
438 for (i = 0; i < 32; i++)
439 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
440 for (i = 0; i < 32; i++)
441 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
442 regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
443 for (i = 0; i < 16; i++)
444 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
445 regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
446 for (i = 0; i < 8; i++)
447 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
448 regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
449
450 /* Wake Up */
451 regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
452 regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
453 regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
454 regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
455 regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
456 regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
457 regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
458 regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
459 regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT);
460
461 regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
462 regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
463 regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
464 regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
465 for (i = 0; i < 8; i++)
466 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
467 for (i = 0; i < 8; i++)
468 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
469 for (i = 0; i < 8; i++)
470 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
471 for (i = 0; i < 8; i++)
472 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
473 for (i = 0; i < 8; i++)
474 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
475 for (i = 0; i < 8; i++)
476 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
477
478 /* Statistics */
479 regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
480 regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
481 regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
482 regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
483 for (i = 0; i < 8; i++)
484 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
485 regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
486 regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
487 regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
488 regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
489 regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
490 regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
491 regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
492 for (i = 0; i < 8; i++)
493 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
494 for (i = 0; i < 8; i++)
495 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
496 for (i = 0; i < 8; i++)
497 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
498 for (i = 0; i < 8; i++)
499 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
500 regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
501 regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
502 regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
503 regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
504 regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
505 regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
506 regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
507 regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
508 regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
509 regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
510 regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
511 regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
512 for (i = 0; i < 8; i++)
513 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
514 regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
515 regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
516 regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
517 regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
518 regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
519 regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
520 regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
521 regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
522 regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
523 regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
524 regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
525 regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
526 regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
527 regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
528 regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
529 regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
530 regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
531 regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
532 regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
533 for (i = 0; i < 16; i++)
534 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
535 for (i = 0; i < 16; i++)
536 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
537 for (i = 0; i < 16; i++)
538 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
539 for (i = 0; i < 16; i++)
540 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
541
542 /* MAC */
543 regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
544 regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
545 regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
546 regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
547 regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
548 regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
549 regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
550 regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
551 regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
552 regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
553 regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
554 regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
555 regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
556 regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
557 regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
558 regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
559 regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
560 regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
561 regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
562 regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
563 regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
564 regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
565 regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
566 regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
567 regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
568 regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
569 regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
570 regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
571 regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
572 regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
573 regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
574 regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
575 regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
576
577 /* Diagnostic */
578 regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
579 for (i = 0; i < 8; i++)
580 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
581 regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
582 for (i = 0; i < 4; i++)
583 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
584 regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
585 regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
586 for (i = 0; i < 8; i++)
587 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
588 regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
589 for (i = 0; i < 4; i++)
590 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
591 regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
592 regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
593 regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
594 regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
595 regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
596 regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
597 regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
598 regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
599 regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
600 regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
601 regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
602 for (i = 0; i < 8; i++)
603 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
604 regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
605 regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
606 regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
607 regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
608 regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
609 regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
610 regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
611 regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
612 regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
613 }
614
ixgbe_get_eeprom_len(struct net_device * netdev)615 static int ixgbe_get_eeprom_len(struct net_device *netdev)
616 {
617 struct ixgbe_adapter *adapter = netdev_priv(netdev);
618 return adapter->hw.eeprom.word_size * 2;
619 }
620
ixgbe_get_eeprom(struct net_device * netdev,struct ethtool_eeprom * eeprom,u8 * bytes)621 static int ixgbe_get_eeprom(struct net_device *netdev,
622 struct ethtool_eeprom *eeprom, u8 *bytes)
623 {
624 struct ixgbe_adapter *adapter = netdev_priv(netdev);
625 struct ixgbe_hw *hw = &adapter->hw;
626 u16 *eeprom_buff;
627 int first_word, last_word, eeprom_len;
628 int ret_val = 0;
629 u16 i;
630
631 if (eeprom->len == 0)
632 return -EINVAL;
633
634 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
635
636 first_word = eeprom->offset >> 1;
637 last_word = (eeprom->offset + eeprom->len - 1) >> 1;
638 eeprom_len = last_word - first_word + 1;
639
640 eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
641 if (!eeprom_buff)
642 return -ENOMEM;
643
644 for (i = 0; i < eeprom_len; i++) {
645 if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
646 &eeprom_buff[i])))
647 break;
648 }
649
650 /* Device's eeprom is always little-endian, word addressable */
651 for (i = 0; i < eeprom_len; i++)
652 le16_to_cpus(&eeprom_buff[i]);
653
654 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
655 kfree(eeprom_buff);
656
657 return ret_val;
658 }
659
ixgbe_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * drvinfo)660 static void ixgbe_get_drvinfo(struct net_device *netdev,
661 struct ethtool_drvinfo *drvinfo)
662 {
663 struct ixgbe_adapter *adapter = netdev_priv(netdev);
664
665 strncpy(drvinfo->driver, ixgbe_driver_name, 32);
666 strncpy(drvinfo->version, ixgbe_driver_version, 32);
667 strncpy(drvinfo->fw_version, "N/A", 32);
668 strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
669 drvinfo->n_stats = IXGBE_STATS_LEN;
670 drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
671 }
672
ixgbe_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)673 static void ixgbe_get_ringparam(struct net_device *netdev,
674 struct ethtool_ringparam *ring)
675 {
676 struct ixgbe_adapter *adapter = netdev_priv(netdev);
677 struct ixgbe_ring *tx_ring = adapter->tx_ring;
678 struct ixgbe_ring *rx_ring = adapter->rx_ring;
679
680 ring->rx_max_pending = IXGBE_MAX_RXD;
681 ring->tx_max_pending = IXGBE_MAX_TXD;
682 ring->rx_mini_max_pending = 0;
683 ring->rx_jumbo_max_pending = 0;
684 ring->rx_pending = rx_ring->count;
685 ring->tx_pending = tx_ring->count;
686 ring->rx_mini_pending = 0;
687 ring->rx_jumbo_pending = 0;
688 }
689
ixgbe_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * ring)690 static int ixgbe_set_ringparam(struct net_device *netdev,
691 struct ethtool_ringparam *ring)
692 {
693 struct ixgbe_adapter *adapter = netdev_priv(netdev);
694 struct ixgbe_ring *temp_ring;
695 int i, err;
696 u32 new_rx_count, new_tx_count;
697
698 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
699 return -EINVAL;
700
701 new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
702 new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
703 new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
704
705 new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
706 new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
707 new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
708
709 if ((new_tx_count == adapter->tx_ring->count) &&
710 (new_rx_count == adapter->rx_ring->count)) {
711 /* nothing to do */
712 return 0;
713 }
714
715 temp_ring = kcalloc(adapter->num_tx_queues,
716 sizeof(struct ixgbe_ring), GFP_KERNEL);
717 if (!temp_ring)
718 return -ENOMEM;
719
720 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
721 msleep(1);
722
723 if (new_tx_count != adapter->tx_ring->count) {
724 for (i = 0; i < adapter->num_tx_queues; i++) {
725 temp_ring[i].count = new_tx_count;
726 err = ixgbe_setup_tx_resources(adapter, &temp_ring[i]);
727 if (err) {
728 while (i) {
729 i--;
730 ixgbe_free_tx_resources(adapter,
731 &temp_ring[i]);
732 }
733 goto err_setup;
734 }
735 temp_ring[i].v_idx = adapter->tx_ring[i].v_idx;
736 }
737 if (netif_running(netdev))
738 netdev->netdev_ops->ndo_stop(netdev);
739 ixgbe_reset_interrupt_capability(adapter);
740 ixgbe_napi_del_all(adapter);
741 INIT_LIST_HEAD(&netdev->napi_list);
742 kfree(adapter->tx_ring);
743 adapter->tx_ring = temp_ring;
744 temp_ring = NULL;
745 adapter->tx_ring_count = new_tx_count;
746 }
747
748 temp_ring = kcalloc(adapter->num_rx_queues,
749 sizeof(struct ixgbe_ring), GFP_KERNEL);
750 if (!temp_ring) {
751 if (netif_running(netdev))
752 netdev->netdev_ops->ndo_open(netdev);
753 return -ENOMEM;
754 }
755
756 if (new_rx_count != adapter->rx_ring->count) {
757 for (i = 0; i < adapter->num_rx_queues; i++) {
758 temp_ring[i].count = new_rx_count;
759 err = ixgbe_setup_rx_resources(adapter, &temp_ring[i]);
760 if (err) {
761 while (i) {
762 i--;
763 ixgbe_free_rx_resources(adapter,
764 &temp_ring[i]);
765 }
766 goto err_setup;
767 }
768 temp_ring[i].v_idx = adapter->rx_ring[i].v_idx;
769 }
770 if (netif_running(netdev))
771 netdev->netdev_ops->ndo_stop(netdev);
772 ixgbe_reset_interrupt_capability(adapter);
773 ixgbe_napi_del_all(adapter);
774 INIT_LIST_HEAD(&netdev->napi_list);
775 kfree(adapter->rx_ring);
776 adapter->rx_ring = temp_ring;
777 temp_ring = NULL;
778
779 adapter->rx_ring_count = new_rx_count;
780 }
781
782 /* success! */
783 err = 0;
784 err_setup:
785 ixgbe_init_interrupt_scheme(adapter);
786 if (netif_running(netdev))
787 netdev->netdev_ops->ndo_open(netdev);
788
789 clear_bit(__IXGBE_RESETTING, &adapter->state);
790 return err;
791 }
792
ixgbe_get_sset_count(struct net_device * netdev,int sset)793 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
794 {
795 switch (sset) {
796 case ETH_SS_STATS:
797 return IXGBE_STATS_LEN;
798 default:
799 return -EOPNOTSUPP;
800 }
801 }
802
ixgbe_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * stats,u64 * data)803 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
804 struct ethtool_stats *stats, u64 *data)
805 {
806 struct ixgbe_adapter *adapter = netdev_priv(netdev);
807 u64 *queue_stat;
808 int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
809 int j, k;
810 int i;
811 u64 aggregated = 0, flushed = 0, no_desc = 0;
812 for (i = 0; i < adapter->num_rx_queues; i++) {
813 aggregated += adapter->rx_ring[i].lro_mgr.stats.aggregated;
814 flushed += adapter->rx_ring[i].lro_mgr.stats.flushed;
815 no_desc += adapter->rx_ring[i].lro_mgr.stats.no_desc;
816 }
817 adapter->lro_aggregated = aggregated;
818 adapter->lro_flushed = flushed;
819 adapter->lro_no_desc = no_desc;
820
821 ixgbe_update_stats(adapter);
822 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
823 char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
824 data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
825 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
826 }
827 for (j = 0; j < adapter->num_tx_queues; j++) {
828 queue_stat = (u64 *)&adapter->tx_ring[j].stats;
829 for (k = 0; k < stat_count; k++)
830 data[i + k] = queue_stat[k];
831 i += k;
832 }
833 for (j = 0; j < adapter->num_rx_queues; j++) {
834 queue_stat = (u64 *)&adapter->rx_ring[j].stats;
835 for (k = 0; k < stat_count; k++)
836 data[i + k] = queue_stat[k];
837 i += k;
838 }
839 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
840 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
841 data[i++] = adapter->stats.pxontxc[j];
842 data[i++] = adapter->stats.pxofftxc[j];
843 }
844 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
845 data[i++] = adapter->stats.pxonrxc[j];
846 data[i++] = adapter->stats.pxoffrxc[j];
847 }
848 }
849 }
850
ixgbe_get_strings(struct net_device * netdev,u32 stringset,u8 * data)851 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
852 u8 *data)
853 {
854 struct ixgbe_adapter *adapter = netdev_priv(netdev);
855 char *p = (char *)data;
856 int i;
857
858 switch (stringset) {
859 case ETH_SS_STATS:
860 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
861 memcpy(p, ixgbe_gstrings_stats[i].stat_string,
862 ETH_GSTRING_LEN);
863 p += ETH_GSTRING_LEN;
864 }
865 for (i = 0; i < adapter->num_tx_queues; i++) {
866 sprintf(p, "tx_queue_%u_packets", i);
867 p += ETH_GSTRING_LEN;
868 sprintf(p, "tx_queue_%u_bytes", i);
869 p += ETH_GSTRING_LEN;
870 }
871 for (i = 0; i < adapter->num_rx_queues; i++) {
872 sprintf(p, "rx_queue_%u_packets", i);
873 p += ETH_GSTRING_LEN;
874 sprintf(p, "rx_queue_%u_bytes", i);
875 p += ETH_GSTRING_LEN;
876 }
877 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
878 for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
879 sprintf(p, "tx_pb_%u_pxon", i);
880 p += ETH_GSTRING_LEN;
881 sprintf(p, "tx_pb_%u_pxoff", i);
882 p += ETH_GSTRING_LEN;
883 }
884 for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
885 sprintf(p, "rx_pb_%u_pxon", i);
886 p += ETH_GSTRING_LEN;
887 sprintf(p, "rx_pb_%u_pxoff", i);
888 p += ETH_GSTRING_LEN;
889 }
890 }
891 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
892 break;
893 }
894 }
895
896
ixgbe_get_wol(struct net_device * netdev,struct ethtool_wolinfo * wol)897 static void ixgbe_get_wol(struct net_device *netdev,
898 struct ethtool_wolinfo *wol)
899 {
900 wol->supported = 0;
901 wol->wolopts = 0;
902
903 return;
904 }
905
ixgbe_nway_reset(struct net_device * netdev)906 static int ixgbe_nway_reset(struct net_device *netdev)
907 {
908 struct ixgbe_adapter *adapter = netdev_priv(netdev);
909
910 if (netif_running(netdev))
911 ixgbe_reinit_locked(adapter);
912
913 return 0;
914 }
915
ixgbe_phys_id(struct net_device * netdev,u32 data)916 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
917 {
918 struct ixgbe_adapter *adapter = netdev_priv(netdev);
919 struct ixgbe_hw *hw = &adapter->hw;
920 u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
921 u32 i;
922
923 if (!data || data > 300)
924 data = 300;
925
926 for (i = 0; i < (data * 1000); i += 400) {
927 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
928 msleep_interruptible(200);
929 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
930 msleep_interruptible(200);
931 }
932
933 /* Restore LED settings */
934 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
935
936 return 0;
937 }
938
ixgbe_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)939 static int ixgbe_get_coalesce(struct net_device *netdev,
940 struct ethtool_coalesce *ec)
941 {
942 struct ixgbe_adapter *adapter = netdev_priv(netdev);
943
944 ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
945
946 /* only valid if in constant ITR mode */
947 switch (adapter->itr_setting) {
948 case 0:
949 /* throttling disabled */
950 ec->rx_coalesce_usecs = 0;
951 break;
952 case 1:
953 /* dynamic ITR mode */
954 ec->rx_coalesce_usecs = 1;
955 break;
956 default:
957 /* fixed interrupt rate mode */
958 ec->rx_coalesce_usecs = 1000000/adapter->eitr_param;
959 break;
960 }
961 return 0;
962 }
963
ixgbe_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ec)964 static int ixgbe_set_coalesce(struct net_device *netdev,
965 struct ethtool_coalesce *ec)
966 {
967 struct ixgbe_adapter *adapter = netdev_priv(netdev);
968 struct ixgbe_hw *hw = &adapter->hw;
969 int i;
970
971 if (ec->tx_max_coalesced_frames_irq)
972 adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq;
973
974 if (ec->rx_coalesce_usecs > 1) {
975 /* store the value in ints/second */
976 adapter->eitr_param = 1000000/ec->rx_coalesce_usecs;
977
978 /* static value of interrupt rate */
979 adapter->itr_setting = adapter->eitr_param;
980 /* clear the lower bit */
981 adapter->itr_setting &= ~1;
982 } else if (ec->rx_coalesce_usecs == 1) {
983 /* 1 means dynamic mode */
984 adapter->eitr_param = 20000;
985 adapter->itr_setting = 1;
986 } else {
987 /* any other value means disable eitr, which is best
988 * served by setting the interrupt rate very high */
989 adapter->eitr_param = 3000000;
990 adapter->itr_setting = 0;
991 }
992
993 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
994 struct ixgbe_q_vector *q_vector = &adapter->q_vector[i];
995 if (q_vector->txr_count && !q_vector->rxr_count)
996 q_vector->eitr = (adapter->eitr_param >> 1);
997 else
998 /* rx only or mixed */
999 q_vector->eitr = adapter->eitr_param;
1000 IXGBE_WRITE_REG(hw, IXGBE_EITR(i),
1001 EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
1002 }
1003
1004 return 0;
1005 }
1006
1007
1008 static const struct ethtool_ops ixgbe_ethtool_ops = {
1009 .get_settings = ixgbe_get_settings,
1010 .set_settings = ixgbe_set_settings,
1011 .get_drvinfo = ixgbe_get_drvinfo,
1012 .get_regs_len = ixgbe_get_regs_len,
1013 .get_regs = ixgbe_get_regs,
1014 .get_wol = ixgbe_get_wol,
1015 .nway_reset = ixgbe_nway_reset,
1016 .get_link = ethtool_op_get_link,
1017 .get_eeprom_len = ixgbe_get_eeprom_len,
1018 .get_eeprom = ixgbe_get_eeprom,
1019 .get_ringparam = ixgbe_get_ringparam,
1020 .set_ringparam = ixgbe_set_ringparam,
1021 .get_pauseparam = ixgbe_get_pauseparam,
1022 .set_pauseparam = ixgbe_set_pauseparam,
1023 .get_rx_csum = ixgbe_get_rx_csum,
1024 .set_rx_csum = ixgbe_set_rx_csum,
1025 .get_tx_csum = ixgbe_get_tx_csum,
1026 .set_tx_csum = ixgbe_set_tx_csum,
1027 .get_sg = ethtool_op_get_sg,
1028 .set_sg = ethtool_op_set_sg,
1029 .get_msglevel = ixgbe_get_msglevel,
1030 .set_msglevel = ixgbe_set_msglevel,
1031 .get_tso = ethtool_op_get_tso,
1032 .set_tso = ixgbe_set_tso,
1033 .get_strings = ixgbe_get_strings,
1034 .phys_id = ixgbe_phys_id,
1035 .get_sset_count = ixgbe_get_sset_count,
1036 .get_ethtool_stats = ixgbe_get_ethtool_stats,
1037 .get_coalesce = ixgbe_get_coalesce,
1038 .set_coalesce = ixgbe_set_coalesce,
1039 .get_flags = ethtool_op_get_flags,
1040 .set_flags = ethtool_op_set_flags,
1041 };
1042
ixgbe_set_ethtool_ops(struct net_device * netdev)1043 void ixgbe_set_ethtool_ops(struct net_device *netdev)
1044 {
1045 SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
1046 }
1047