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1 /*
2  * Copyright (c) 2006, 2007 Cisco Systems, Inc.  All rights reserved.
3  * Copyright (c) 2007, 2008 Mellanox Technologies. All rights reserved.
4  *
5  * This software is available to you under a choice of one of two
6  * licenses.  You may choose to be licensed under the terms of the GNU
7  * General Public License (GPL) Version 2, available from the file
8  * COPYING in the main directory of this source tree, or the
9  * OpenIB.org BSD license below:
10  *
11  *     Redistribution and use in source and binary forms, with or
12  *     without modification, are permitted provided that the following
13  *     conditions are met:
14  *
15  *      - Redistributions of source code must retain the above
16  *        copyright notice, this list of conditions and the following
17  *        disclaimer.
18  *
19  *      - Redistributions in binary form must reproduce the above
20  *        copyright notice, this list of conditions and the following
21  *        disclaimer in the documentation and/or other materials
22  *        provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  */
33 
34 #include <linux/init.h>
35 #include <linux/errno.h>
36 #include <linux/pci.h>
37 #include <linux/delay.h>
38 #include <linux/slab.h>
39 #include <linux/jiffies.h>
40 
41 #include "mlx4.h"
42 
mlx4_reset(struct mlx4_dev * dev)43 int mlx4_reset(struct mlx4_dev *dev)
44 {
45 	void __iomem *reset;
46 	u32 *hca_header = NULL;
47 	int pcie_cap;
48 	u16 devctl;
49 	u16 linkctl;
50 	u16 vendor;
51 	unsigned long end;
52 	u32 sem;
53 	int i;
54 	int err = 0;
55 
56 #define MLX4_RESET_BASE		0xf0000
57 #define MLX4_RESET_SIZE		  0x400
58 #define MLX4_SEM_OFFSET		  0x3fc
59 #define MLX4_RESET_OFFSET	   0x10
60 #define MLX4_RESET_VALUE	swab32(1)
61 
62 #define MLX4_SEM_TIMEOUT_JIFFIES	(10 * HZ)
63 #define MLX4_RESET_TIMEOUT_JIFFIES	(2 * HZ)
64 
65 	/*
66 	 * Reset the chip.  This is somewhat ugly because we have to
67 	 * save off the PCI header before reset and then restore it
68 	 * after the chip reboots.  We skip config space offsets 22
69 	 * and 23 since those have a special meaning.
70 	 */
71 
72 	/* Do we need to save off the full 4K PCI Express header?? */
73 	hca_header = kmalloc(256, GFP_KERNEL);
74 	if (!hca_header) {
75 		err = -ENOMEM;
76 		mlx4_err(dev, "Couldn't allocate memory to save HCA "
77 			  "PCI header, aborting.\n");
78 		goto out;
79 	}
80 
81 	pcie_cap = pci_find_capability(dev->pdev, PCI_CAP_ID_EXP);
82 
83 	for (i = 0; i < 64; ++i) {
84 		if (i == 22 || i == 23)
85 			continue;
86 		if (pci_read_config_dword(dev->pdev, i * 4, hca_header + i)) {
87 			err = -ENODEV;
88 			mlx4_err(dev, "Couldn't save HCA "
89 				  "PCI header, aborting.\n");
90 			goto out;
91 		}
92 	}
93 
94 	reset = ioremap(pci_resource_start(dev->pdev, 0) + MLX4_RESET_BASE,
95 			MLX4_RESET_SIZE);
96 	if (!reset) {
97 		err = -ENOMEM;
98 		mlx4_err(dev, "Couldn't map HCA reset register, aborting.\n");
99 		goto out;
100 	}
101 
102 	/* grab HW semaphore to lock out flash updates */
103 	end = jiffies + MLX4_SEM_TIMEOUT_JIFFIES;
104 	do {
105 		sem = readl(reset + MLX4_SEM_OFFSET);
106 		if (!sem)
107 			break;
108 
109 		msleep(1);
110 	} while (time_before(jiffies, end));
111 
112 	if (sem) {
113 		mlx4_err(dev, "Failed to obtain HW semaphore, aborting\n");
114 		err = -EAGAIN;
115 		iounmap(reset);
116 		goto out;
117 	}
118 
119 	/* actually hit reset */
120 	writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET);
121 	iounmap(reset);
122 
123 	/* Docs say to wait one second before accessing device */
124 	msleep(1000);
125 
126 	end = jiffies + MLX4_RESET_TIMEOUT_JIFFIES;
127 	do {
128 		if (!pci_read_config_word(dev->pdev, PCI_VENDOR_ID, &vendor) &&
129 		    vendor != 0xffff)
130 			break;
131 
132 		msleep(1);
133 	} while (time_before(jiffies, end));
134 
135 	if (vendor == 0xffff) {
136 		err = -ENODEV;
137 		mlx4_err(dev, "PCI device did not come back after reset, "
138 			  "aborting.\n");
139 		goto out;
140 	}
141 
142 	/* Now restore the PCI headers */
143 	if (pcie_cap) {
144 		devctl = hca_header[(pcie_cap + PCI_EXP_DEVCTL) / 4];
145 		if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_DEVCTL,
146 					   devctl)) {
147 			err = -ENODEV;
148 			mlx4_err(dev, "Couldn't restore HCA PCI Express "
149 				 "Device Control register, aborting.\n");
150 			goto out;
151 		}
152 		linkctl = hca_header[(pcie_cap + PCI_EXP_LNKCTL) / 4];
153 		if (pci_write_config_word(dev->pdev, pcie_cap + PCI_EXP_LNKCTL,
154 					   linkctl)) {
155 			err = -ENODEV;
156 			mlx4_err(dev, "Couldn't restore HCA PCI Express "
157 				 "Link control register, aborting.\n");
158 			goto out;
159 		}
160 	}
161 
162 	for (i = 0; i < 16; ++i) {
163 		if (i * 4 == PCI_COMMAND)
164 			continue;
165 
166 		if (pci_write_config_dword(dev->pdev, i * 4, hca_header[i])) {
167 			err = -ENODEV;
168 			mlx4_err(dev, "Couldn't restore HCA reg %x, "
169 				  "aborting.\n", i);
170 			goto out;
171 		}
172 	}
173 
174 	if (pci_write_config_dword(dev->pdev, PCI_COMMAND,
175 				   hca_header[PCI_COMMAND / 4])) {
176 		err = -ENODEV;
177 		mlx4_err(dev, "Couldn't restore HCA COMMAND, "
178 			  "aborting.\n");
179 		goto out;
180 	}
181 
182 out:
183 	kfree(hca_header);
184 
185 	return err;
186 }
187