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1 /*
2 	Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 	<http://rt2x00.serialmonkey.com>
4 
5 	This program is free software; you can redistribute it and/or modify
6 	it under the terms of the GNU General Public License as published by
7 	the Free Software Foundation; either version 2 of the License, or
8 	(at your option) any later version.
9 
10 	This program is distributed in the hope that it will be useful,
11 	but WITHOUT ANY WARRANTY; without even the implied warranty of
12 	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 	GNU General Public License for more details.
14 
15 	You should have received a copy of the GNU General Public License
16 	along with this program; if not, write to the
17 	Free Software Foundation, Inc.,
18 	59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19  */
20 
21 /*
22 	Module: rt2x00
23 	Abstract: rt2x00 generic register information.
24  */
25 
26 #ifndef RT2X00REG_H
27 #define RT2X00REG_H
28 
29 /*
30  * RX crypto status
31  */
32 enum rx_crypto {
33 	RX_CRYPTO_SUCCESS = 0,
34 	RX_CRYPTO_FAIL_ICV = 1,
35 	RX_CRYPTO_FAIL_MIC = 2,
36 	RX_CRYPTO_FAIL_KEY = 3,
37 };
38 
39 /*
40  * Antenna values
41  */
42 enum antenna {
43 	ANTENNA_SW_DIVERSITY = 0,
44 	ANTENNA_A = 1,
45 	ANTENNA_B = 2,
46 	ANTENNA_HW_DIVERSITY = 3,
47 };
48 
49 /*
50  * Led mode values.
51  */
52 enum led_mode {
53 	LED_MODE_DEFAULT = 0,
54 	LED_MODE_TXRX_ACTIVITY = 1,
55 	LED_MODE_SIGNAL_STRENGTH = 2,
56 	LED_MODE_ASUS = 3,
57 	LED_MODE_ALPHA = 4,
58 };
59 
60 /*
61  * TSF sync values
62  */
63 enum tsf_sync {
64 	TSF_SYNC_NONE = 0,
65 	TSF_SYNC_INFRA = 1,
66 	TSF_SYNC_BEACON = 2,
67 };
68 
69 /*
70  * Device states
71  */
72 enum dev_state {
73 	STATE_DEEP_SLEEP = 0,
74 	STATE_SLEEP = 1,
75 	STATE_STANDBY = 2,
76 	STATE_AWAKE = 3,
77 
78 /*
79  * Additional device states, these values are
80  * not strict since they are not directly passed
81  * into the device.
82  */
83 	STATE_RADIO_ON,
84 	STATE_RADIO_OFF,
85 	STATE_RADIO_RX_ON,
86 	STATE_RADIO_RX_OFF,
87 	STATE_RADIO_RX_ON_LINK,
88 	STATE_RADIO_RX_OFF_LINK,
89 	STATE_RADIO_IRQ_ON,
90 	STATE_RADIO_IRQ_OFF,
91 };
92 
93 /*
94  * IFS backoff values
95  */
96 enum ifs {
97 	IFS_BACKOFF = 0,
98 	IFS_SIFS = 1,
99 	IFS_NEW_BACKOFF = 2,
100 	IFS_NONE = 3,
101 };
102 
103 /*
104  * Cipher types for hardware encryption
105  */
106 enum cipher {
107 	CIPHER_NONE = 0,
108 	CIPHER_WEP64 = 1,
109 	CIPHER_WEP128 = 2,
110 	CIPHER_TKIP = 3,
111 	CIPHER_AES = 4,
112 /*
113  * The following fields were added by rt61pci and rt73usb.
114  */
115 	CIPHER_CKIP64 = 5,
116 	CIPHER_CKIP128 = 6,
117 	CIPHER_TKIP_NO_MIC = 7, /* Don't send to device */
118 
119 /*
120  * Max cipher type.
121  * Note that CIPHER_NONE isn't counted, and CKIP64 and CKIP128
122  * are excluded due to limitations in mac80211.
123  */
124 	CIPHER_MAX = 4,
125 };
126 
127 /*
128  * Register handlers.
129  * We store the position of a register field inside a field structure,
130  * This will simplify the process of setting and reading a certain field
131  * inside the register while making sure the process remains byte order safe.
132  */
133 struct rt2x00_field8 {
134 	u8 bit_offset;
135 	u8 bit_mask;
136 };
137 
138 struct rt2x00_field16 {
139 	u16 bit_offset;
140 	u16 bit_mask;
141 };
142 
143 struct rt2x00_field32 {
144 	u32 bit_offset;
145 	u32 bit_mask;
146 };
147 
148 /*
149  * Power of two check, this will check
150  * if the mask that has been given contains and contiguous set of bits.
151  * Note that we cannot use the is_power_of_2() function since this
152  * check must be done at compile-time.
153  */
154 #define is_power_of_two(x)	( !((x) & ((x)-1)) )
155 #define low_bit_mask(x)		( ((x)-1) & ~(x) )
156 #define is_valid_mask(x)	is_power_of_two(1LU + (x) + low_bit_mask(x))
157 
158 /*
159  * Macro's to find first set bit in a variable.
160  * These macro's behaves the same as the __ffs() function with
161  * the most important difference that this is done during
162  * compile-time rather then run-time.
163  */
164 #define compile_ffs2(__x) \
165 	__builtin_choose_expr(((__x) & 0x1), 0, 1)
166 
167 #define compile_ffs4(__x) \
168 	__builtin_choose_expr(((__x) & 0x3), \
169 			      (compile_ffs2((__x))), \
170 			      (compile_ffs2((__x) >> 2) + 2))
171 
172 #define compile_ffs8(__x) \
173 	__builtin_choose_expr(((__x) & 0xf), \
174 			      (compile_ffs4((__x))), \
175 			      (compile_ffs4((__x) >> 4) + 4))
176 
177 #define compile_ffs16(__x) \
178 	__builtin_choose_expr(((__x) & 0xff), \
179 			      (compile_ffs8((__x))), \
180 			      (compile_ffs8((__x) >> 8) + 8))
181 
182 #define compile_ffs32(__x) \
183 	__builtin_choose_expr(((__x) & 0xffff), \
184 			      (compile_ffs16((__x))), \
185 			      (compile_ffs16((__x) >> 16) + 16))
186 
187 /*
188  * This macro will check the requirements for the FIELD{8,16,32} macros
189  * The mask should be a constant non-zero contiguous set of bits which
190  * does not exceed the given typelimit.
191  */
192 #define FIELD_CHECK(__mask, __type)			\
193 	BUILD_BUG_ON(!(__mask) ||			\
194 		     !is_valid_mask(__mask) ||		\
195 		     (__mask) != (__type)(__mask))	\
196 
197 #define FIELD8(__mask)				\
198 ({						\
199 	FIELD_CHECK(__mask, u8);		\
200 	(struct rt2x00_field8) {		\
201 		compile_ffs8(__mask), (__mask)	\
202 	};					\
203 })
204 
205 #define FIELD16(__mask)				\
206 ({						\
207 	FIELD_CHECK(__mask, u16);		\
208 	(struct rt2x00_field16) {		\
209 		compile_ffs16(__mask), (__mask)	\
210 	};					\
211 })
212 
213 #define FIELD32(__mask)				\
214 ({						\
215 	FIELD_CHECK(__mask, u32);		\
216 	(struct rt2x00_field32) {		\
217 		compile_ffs32(__mask), (__mask)	\
218 	};					\
219 })
220 
221 #define SET_FIELD(__reg, __type, __field, __value)\
222 ({						\
223 	typecheck(__type, __field);		\
224 	*(__reg) &= ~((__field).bit_mask);	\
225 	*(__reg) |= ((__value) <<		\
226 	    ((__field).bit_offset)) &		\
227 	    ((__field).bit_mask);		\
228 })
229 
230 #define GET_FIELD(__reg, __type, __field)	\
231 ({						\
232 	typecheck(__type, __field);		\
233 	((__reg) & ((__field).bit_mask)) >>	\
234 	    ((__field).bit_offset);		\
235 })
236 
237 #define rt2x00_set_field32(__reg, __field, __value) \
238 	SET_FIELD(__reg, struct rt2x00_field32, __field, __value)
239 #define rt2x00_get_field32(__reg, __field) \
240 	GET_FIELD(__reg, struct rt2x00_field32, __field)
241 
242 #define rt2x00_set_field16(__reg, __field, __value) \
243 	SET_FIELD(__reg, struct rt2x00_field16, __field, __value)
244 #define rt2x00_get_field16(__reg, __field) \
245 	GET_FIELD(__reg, struct rt2x00_field16, __field)
246 
247 #define rt2x00_set_field8(__reg, __field, __value) \
248 	SET_FIELD(__reg, struct rt2x00_field8, __field, __value)
249 #define rt2x00_get_field8(__reg, __field) \
250 	GET_FIELD(__reg, struct rt2x00_field8, __field)
251 
252 #endif /* RT2X00REG_H */
253