1 /*
2 * Definitions for RTL8187 hardware
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Based on the r8187 driver, which is:
8 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #ifndef RTL8187_H
16 #define RTL8187_H
17
18 #include "rtl818x.h"
19
20 #define RTL8187_EEPROM_TXPWR_BASE 0x05
21 #define RTL8187_EEPROM_MAC_ADDR 0x07
22 #define RTL8187_EEPROM_TXPWR_CHAN_1 0x16 /* 3 channels */
23 #define RTL8187_EEPROM_TXPWR_CHAN_6 0x1B /* 2 channels */
24 #define RTL8187_EEPROM_TXPWR_CHAN_4 0x3D /* 2 channels */
25
26 #define RTL8187_REQT_READ 0xC0
27 #define RTL8187_REQT_WRITE 0x40
28 #define RTL8187_REQ_GET_REG 0x05
29 #define RTL8187_REQ_SET_REG 0x05
30
31 #define RTL8187_MAX_RX 0x9C4
32
33 struct rtl8187_rx_info {
34 struct urb *urb;
35 struct ieee80211_hw *dev;
36 };
37
38 struct rtl8187_rx_hdr {
39 __le32 flags;
40 u8 noise;
41 u8 signal;
42 u8 agc;
43 u8 reserved;
44 __le64 mac_time;
45 } __attribute__((packed));
46
47 struct rtl8187b_rx_hdr {
48 __le32 flags;
49 __le64 mac_time;
50 u8 sq;
51 u8 rssi;
52 u8 agc;
53 u8 flags2;
54 __le16 snr_long2end;
55 s8 pwdb_g12;
56 u8 fot;
57 } __attribute__((packed));
58
59 /* {rtl8187,rtl8187b}_tx_info is in skb */
60
61 struct rtl8187_tx_hdr {
62 __le32 flags;
63 __le16 rts_duration;
64 __le16 len;
65 __le32 retry;
66 } __attribute__((packed));
67
68 struct rtl8187b_tx_hdr {
69 __le32 flags;
70 __le16 rts_duration;
71 __le16 len;
72 __le32 unused_1;
73 __le16 unused_2;
74 __le16 tx_duration;
75 __le32 unused_3;
76 __le32 retry;
77 __le32 unused_4[2];
78 } __attribute__((packed));
79
80 enum {
81 DEVICE_RTL8187,
82 DEVICE_RTL8187B
83 };
84
85 struct rtl8187_priv {
86 /* common between rtl818x drivers */
87 struct rtl818x_csr *map;
88 const struct rtl818x_rf_ops *rf;
89 struct ieee80211_vif *vif;
90 int mode;
91 /* The mutex protects the TX loopback state.
92 * Any attempt to set channels concurrently locks the device.
93 */
94 struct mutex conf_mutex;
95
96 /* rtl8187 specific */
97 struct ieee80211_channel channels[14];
98 struct ieee80211_rate rates[12];
99 struct ieee80211_supported_band band;
100 struct usb_device *udev;
101 u32 rx_conf;
102 struct usb_anchor anchored;
103 u16 txpwr_base;
104 u8 asic_rev;
105 u8 is_rtl8187b;
106 enum {
107 RTL8187BvB,
108 RTL8187BvD,
109 RTL8187BvE
110 } hw_rev;
111 struct sk_buff_head rx_queue;
112 u8 signal;
113 u8 quality;
114 u8 noise;
115 u8 slot_time;
116 u8 aifsn[4];
117 struct {
118 __le64 buf;
119 struct sk_buff_head queue;
120 } b_tx_status;
121 };
122
123 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
124
rtl818x_ioread8_idx(struct rtl8187_priv * priv,u8 * addr,u8 idx)125 static inline u8 rtl818x_ioread8_idx(struct rtl8187_priv *priv,
126 u8 *addr, u8 idx)
127 {
128 u8 val;
129
130 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
131 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
132 (unsigned long)addr, idx & 0x03, &val,
133 sizeof(val), HZ / 2);
134
135 return val;
136 }
137
rtl818x_ioread8(struct rtl8187_priv * priv,u8 * addr)138 static inline u8 rtl818x_ioread8(struct rtl8187_priv *priv, u8 *addr)
139 {
140 return rtl818x_ioread8_idx(priv, addr, 0);
141 }
142
rtl818x_ioread16_idx(struct rtl8187_priv * priv,__le16 * addr,u8 idx)143 static inline u16 rtl818x_ioread16_idx(struct rtl8187_priv *priv,
144 __le16 *addr, u8 idx)
145 {
146 __le16 val;
147
148 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
149 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
150 (unsigned long)addr, idx & 0x03, &val,
151 sizeof(val), HZ / 2);
152
153 return le16_to_cpu(val);
154 }
155
rtl818x_ioread16(struct rtl8187_priv * priv,__le16 * addr)156 static inline u16 rtl818x_ioread16(struct rtl8187_priv *priv, __le16 *addr)
157 {
158 return rtl818x_ioread16_idx(priv, addr, 0);
159 }
160
rtl818x_ioread32_idx(struct rtl8187_priv * priv,__le32 * addr,u8 idx)161 static inline u32 rtl818x_ioread32_idx(struct rtl8187_priv *priv,
162 __le32 *addr, u8 idx)
163 {
164 __le32 val;
165
166 usb_control_msg(priv->udev, usb_rcvctrlpipe(priv->udev, 0),
167 RTL8187_REQ_GET_REG, RTL8187_REQT_READ,
168 (unsigned long)addr, idx & 0x03, &val,
169 sizeof(val), HZ / 2);
170
171 return le32_to_cpu(val);
172 }
173
rtl818x_ioread32(struct rtl8187_priv * priv,__le32 * addr)174 static inline u32 rtl818x_ioread32(struct rtl8187_priv *priv, __le32 *addr)
175 {
176 return rtl818x_ioread32_idx(priv, addr, 0);
177 }
178
rtl818x_iowrite8_idx(struct rtl8187_priv * priv,u8 * addr,u8 val,u8 idx)179 static inline void rtl818x_iowrite8_idx(struct rtl8187_priv *priv,
180 u8 *addr, u8 val, u8 idx)
181 {
182 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
183 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
184 (unsigned long)addr, idx & 0x03, &val,
185 sizeof(val), HZ / 2);
186 }
187
rtl818x_iowrite8(struct rtl8187_priv * priv,u8 * addr,u8 val)188 static inline void rtl818x_iowrite8(struct rtl8187_priv *priv, u8 *addr, u8 val)
189 {
190 rtl818x_iowrite8_idx(priv, addr, val, 0);
191 }
192
rtl818x_iowrite16_idx(struct rtl8187_priv * priv,__le16 * addr,u16 val,u8 idx)193 static inline void rtl818x_iowrite16_idx(struct rtl8187_priv *priv,
194 __le16 *addr, u16 val, u8 idx)
195 {
196 __le16 buf = cpu_to_le16(val);
197
198 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
199 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
200 (unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
201 HZ / 2);
202 }
203
rtl818x_iowrite16(struct rtl8187_priv * priv,__le16 * addr,u16 val)204 static inline void rtl818x_iowrite16(struct rtl8187_priv *priv, __le16 *addr,
205 u16 val)
206 {
207 rtl818x_iowrite16_idx(priv, addr, val, 0);
208 }
209
rtl818x_iowrite32_idx(struct rtl8187_priv * priv,__le32 * addr,u32 val,u8 idx)210 static inline void rtl818x_iowrite32_idx(struct rtl8187_priv *priv,
211 __le32 *addr, u32 val, u8 idx)
212 {
213 __le32 buf = cpu_to_le32(val);
214
215 usb_control_msg(priv->udev, usb_sndctrlpipe(priv->udev, 0),
216 RTL8187_REQ_SET_REG, RTL8187_REQT_WRITE,
217 (unsigned long)addr, idx & 0x03, &buf, sizeof(buf),
218 HZ / 2);
219 }
220
rtl818x_iowrite32(struct rtl8187_priv * priv,__le32 * addr,u32 val)221 static inline void rtl818x_iowrite32(struct rtl8187_priv *priv, __le32 *addr,
222 u32 val)
223 {
224 rtl818x_iowrite32_idx(priv, addr, val, 0);
225 }
226
227 #endif /* RTL8187_H */
228