1 /* ZD1211 USB-WLAN driver for Linux
2 *
3 * Copyright (C) 2005-2007 Ulrich Kunitz <kune@deine-taler.de>
4 * Copyright (C) 2006-2007 Daniel Drake <dsd@gentoo.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20
21 #include <linux/kernel.h>
22
23 #include "zd_rf.h"
24 #include "zd_usb.h"
25 #include "zd_chip.h"
26
27 #define IS_AL2230S(chip) ((chip)->al2230s_bit || (chip)->rf.type == AL2230S_RF)
28
29 static const u32 zd1211_al2230_table[][3] = {
30 RF_CHANNEL( 1) = { 0x03f790, 0x033331, 0x00000d, },
31 RF_CHANNEL( 2) = { 0x03f790, 0x0b3331, 0x00000d, },
32 RF_CHANNEL( 3) = { 0x03e790, 0x033331, 0x00000d, },
33 RF_CHANNEL( 4) = { 0x03e790, 0x0b3331, 0x00000d, },
34 RF_CHANNEL( 5) = { 0x03f7a0, 0x033331, 0x00000d, },
35 RF_CHANNEL( 6) = { 0x03f7a0, 0x0b3331, 0x00000d, },
36 RF_CHANNEL( 7) = { 0x03e7a0, 0x033331, 0x00000d, },
37 RF_CHANNEL( 8) = { 0x03e7a0, 0x0b3331, 0x00000d, },
38 RF_CHANNEL( 9) = { 0x03f7b0, 0x033331, 0x00000d, },
39 RF_CHANNEL(10) = { 0x03f7b0, 0x0b3331, 0x00000d, },
40 RF_CHANNEL(11) = { 0x03e7b0, 0x033331, 0x00000d, },
41 RF_CHANNEL(12) = { 0x03e7b0, 0x0b3331, 0x00000d, },
42 RF_CHANNEL(13) = { 0x03f7c0, 0x033331, 0x00000d, },
43 RF_CHANNEL(14) = { 0x03e7c0, 0x066661, 0x00000d, },
44 };
45
46 static const u32 zd1211b_al2230_table[][3] = {
47 RF_CHANNEL( 1) = { 0x09efc0, 0x8cccc0, 0xb00000, },
48 RF_CHANNEL( 2) = { 0x09efc0, 0x8cccd0, 0xb00000, },
49 RF_CHANNEL( 3) = { 0x09e7c0, 0x8cccc0, 0xb00000, },
50 RF_CHANNEL( 4) = { 0x09e7c0, 0x8cccd0, 0xb00000, },
51 RF_CHANNEL( 5) = { 0x05efc0, 0x8cccc0, 0xb00000, },
52 RF_CHANNEL( 6) = { 0x05efc0, 0x8cccd0, 0xb00000, },
53 RF_CHANNEL( 7) = { 0x05e7c0, 0x8cccc0, 0xb00000, },
54 RF_CHANNEL( 8) = { 0x05e7c0, 0x8cccd0, 0xb00000, },
55 RF_CHANNEL( 9) = { 0x0defc0, 0x8cccc0, 0xb00000, },
56 RF_CHANNEL(10) = { 0x0defc0, 0x8cccd0, 0xb00000, },
57 RF_CHANNEL(11) = { 0x0de7c0, 0x8cccc0, 0xb00000, },
58 RF_CHANNEL(12) = { 0x0de7c0, 0x8cccd0, 0xb00000, },
59 RF_CHANNEL(13) = { 0x03efc0, 0x8cccc0, 0xb00000, },
60 RF_CHANNEL(14) = { 0x03e7c0, 0x866660, 0xb00000, },
61 };
62
63 static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
64 { CR240, 0x57 }, { CR9, 0xe0 },
65 };
66
67 static const struct zd_ioreq16 ioreqs_init_al2230s[] = {
68 { CR47, 0x1e }, /* MARK_002 */
69 { CR106, 0x22 },
70 { CR107, 0x2a }, /* MARK_002 */
71 { CR109, 0x13 }, /* MARK_002 */
72 { CR118, 0xf8 }, /* MARK_002 */
73 { CR119, 0x12 }, { CR122, 0xe0 },
74 { CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */
75 { CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */
76 { CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */
77 };
78
zd1211b_al2230_finalize_rf(struct zd_chip * chip)79 static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
80 {
81 int r;
82 static const struct zd_ioreq16 ioreqs[] = {
83 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 },
84 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 },
85 { CR203, 0x06 },
86 { },
87
88 { CR240, 0x80 },
89 };
90
91 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
92 if (r)
93 return r;
94
95 /* related to antenna selection? */
96 if (chip->new_phy_layout) {
97 r = zd_iowrite16_locked(chip, 0xe1, CR9);
98 if (r)
99 return r;
100 }
101
102 return zd_iowrite16_locked(chip, 0x06, CR203);
103 }
104
zd1211_al2230_init_hw(struct zd_rf * rf)105 static int zd1211_al2230_init_hw(struct zd_rf *rf)
106 {
107 int r;
108 struct zd_chip *chip = zd_rf_to_chip(rf);
109
110 static const struct zd_ioreq16 ioreqs_init[] = {
111 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 },
112 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 },
113 { CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a },
114 { CR109, 0x09 }, { CR110, 0x27 }, { CR111, 0x2b },
115 { CR112, 0x2b }, { CR119, 0x0a }, { CR10, 0x89 },
116 /* for newest (3rd cut) AL2300 */
117 { CR17, 0x28 },
118 { CR26, 0x93 }, { CR34, 0x30 },
119 /* for newest (3rd cut) AL2300 */
120 { CR35, 0x3e },
121 { CR41, 0x24 }, { CR44, 0x32 },
122 /* for newest (3rd cut) AL2300 */
123 { CR46, 0x96 },
124 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 },
125 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 },
126 { CR92, 0x0a }, { CR99, 0x28 }, { CR100, 0x00 },
127 { CR101, 0x13 }, { CR102, 0x27 }, { CR106, 0x24 },
128 { CR107, 0x2a }, { CR109, 0x09 }, { CR110, 0x13 },
129 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
130 { CR114, 0x27 },
131 /* for newest (3rd cut) AL2300 */
132 { CR115, 0x24 },
133 { CR116, 0x24 }, { CR117, 0xf4 }, { CR118, 0xfc },
134 { CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 },
135 { CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff },
136 { CR253, 0xff },
137 };
138
139 static const struct zd_ioreq16 ioreqs_pll[] = {
140 /* shdnb(PLL_ON)=0 */
141 { CR251, 0x2f },
142 /* shdnb(PLL_ON)=1 */
143 { CR251, 0x3f },
144 { CR138, 0x28 }, { CR203, 0x06 },
145 };
146
147 static const u32 rv1[] = {
148 /* Channel 1 */
149 0x03f790,
150 0x033331,
151 0x00000d,
152
153 0x0b3331,
154 0x03b812,
155 0x00fff3,
156 };
157
158 static const u32 rv2[] = {
159 0x000da4,
160 0x0f4dc5, /* fix freq shift, 0x04edc5 */
161 0x0805b6,
162 0x011687,
163 0x000688,
164 0x0403b9, /* external control TX power (CR31) */
165 0x00dbba,
166 0x00099b,
167 0x0bdffc,
168 0x00000d,
169 0x00500f,
170 };
171
172 static const u32 rv3[] = {
173 0x00d00f,
174 0x004c0f,
175 0x00540f,
176 0x00700f,
177 0x00500f,
178 };
179
180 r = zd_iowrite16a_locked(chip, ioreqs_init, ARRAY_SIZE(ioreqs_init));
181 if (r)
182 return r;
183
184 if (IS_AL2230S(chip)) {
185 r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
186 ARRAY_SIZE(ioreqs_init_al2230s));
187 if (r)
188 return r;
189 }
190
191 r = zd_rfwritev_locked(chip, rv1, ARRAY_SIZE(rv1), RF_RV_BITS);
192 if (r)
193 return r;
194
195 /* improve band edge for AL2230S */
196 if (IS_AL2230S(chip))
197 r = zd_rfwrite_locked(chip, 0x000824, RF_RV_BITS);
198 else
199 r = zd_rfwrite_locked(chip, 0x0005a4, RF_RV_BITS);
200 if (r)
201 return r;
202
203 r = zd_rfwritev_locked(chip, rv2, ARRAY_SIZE(rv2), RF_RV_BITS);
204 if (r)
205 return r;
206
207 r = zd_iowrite16a_locked(chip, ioreqs_pll, ARRAY_SIZE(ioreqs_pll));
208 if (r)
209 return r;
210
211 r = zd_rfwritev_locked(chip, rv3, ARRAY_SIZE(rv3), RF_RV_BITS);
212 if (r)
213 return r;
214
215 return 0;
216 }
217
zd1211b_al2230_init_hw(struct zd_rf * rf)218 static int zd1211b_al2230_init_hw(struct zd_rf *rf)
219 {
220 int r;
221 struct zd_chip *chip = zd_rf_to_chip(rf);
222
223 static const struct zd_ioreq16 ioreqs1[] = {
224 { CR10, 0x89 }, { CR15, 0x20 },
225 { CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
226 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 },
227 { CR28, 0x3e }, { CR29, 0x00 },
228 { CR33, 0x28 }, /* 5621 */
229 { CR34, 0x30 },
230 { CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
231 { CR41, 0x24 }, { CR44, 0x32 },
232 { CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
233 { CR47, 0x1e },
234
235 /* ZD1211B 05.06.10 */
236 { CR48, 0x06 }, { CR49, 0xf9 }, { CR51, 0x01 },
237 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 },
238 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 },
239 { CR69, 0x28 },
240
241 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 },
242 { CR87, 0x0a }, { CR89, 0x04 },
243 { CR91, 0x00 }, /* 5621 */
244 { CR92, 0x0a },
245 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */
246 { CR99, 0x00 }, /* 5621 */
247 { CR101, 0x13 }, { CR102, 0x27 },
248 { CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
249 { CR107, 0x2a },
250 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */
251 { CR110, 0x1f }, /* 4804, for 1212 new algorithm */
252 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 },
253 { CR114, 0x27 },
254 { CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */
255 { CR116, 0x24 },
256 { CR117, 0xfa }, /* for 1211b */
257 { CR118, 0xfa }, /* for 1211b */
258 { CR119, 0x10 },
259 { CR120, 0x4f },
260 { CR121, 0x6c }, /* for 1211b */
261 { CR122, 0xfc }, /* E0->FC at 4902 */
262 { CR123, 0x57 }, /* 5623 */
263 { CR125, 0xad }, /* 4804, for 1212 new algorithm */
264 { CR126, 0x6c }, /* 5614 */
265 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */
266 { CR137, 0x50 }, /* 5614 */
267 { CR138, 0xa8 },
268 { CR144, 0xac }, /* 5621 */
269 { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 },
270 };
271
272 static const u32 rv1[] = {
273 0x8cccd0,
274 0x481dc0,
275 0xcfff00,
276 0x25a000,
277 };
278
279 static const u32 rv2[] = {
280 /* To improve AL2230 yield, improve phase noise, 4713 */
281 0x25a000,
282 0xa3b2f0,
283
284 0x6da010, /* Reg6 update for MP versio */
285 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
286 0x116000,
287 0x9dc020, /* External control TX power (CR31) */
288 0x5ddb00, /* RegA update for MP version */
289 0xd99000, /* RegB update for MP version */
290 0x3ffbd0, /* RegC update for MP version */
291 0xb00000, /* RegD update for MP version */
292
293 /* improve phase noise and remove phase calibration,4713 */
294 0xf01a00,
295 };
296
297 static const struct zd_ioreq16 ioreqs2[] = {
298 { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
299 { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
300 };
301
302 static const u32 rv3[] = {
303 /* To improve AL2230 yield, 4713 */
304 0xf01b00,
305 0xf01e00,
306 0xf01a00,
307 };
308
309 static const struct zd_ioreq16 ioreqs3[] = {
310 /* related to 6M band edge patching, happens unconditionally */
311 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 },
312 };
313
314 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
315 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
316 if (r)
317 return r;
318 r = zd_iowrite16a_locked(chip, ioreqs1, ARRAY_SIZE(ioreqs1));
319 if (r)
320 return r;
321
322 if (IS_AL2230S(chip)) {
323 r = zd_iowrite16a_locked(chip, ioreqs_init_al2230s,
324 ARRAY_SIZE(ioreqs_init_al2230s));
325 if (r)
326 return r;
327 }
328
329 r = zd_rfwritev_cr_locked(chip, zd1211b_al2230_table[0], 3);
330 if (r)
331 return r;
332 r = zd_rfwritev_cr_locked(chip, rv1, ARRAY_SIZE(rv1));
333 if (r)
334 return r;
335
336 if (IS_AL2230S(chip))
337 r = zd_rfwrite_locked(chip, 0x241000, RF_RV_BITS);
338 else
339 r = zd_rfwrite_locked(chip, 0x25a000, RF_RV_BITS);
340 if (r)
341 return r;
342
343 r = zd_rfwritev_cr_locked(chip, rv2, ARRAY_SIZE(rv2));
344 if (r)
345 return r;
346 r = zd_iowrite16a_locked(chip, ioreqs2, ARRAY_SIZE(ioreqs2));
347 if (r)
348 return r;
349 r = zd_rfwritev_cr_locked(chip, rv3, ARRAY_SIZE(rv3));
350 if (r)
351 return r;
352 r = zd_iowrite16a_locked(chip, ioreqs3, ARRAY_SIZE(ioreqs3));
353 if (r)
354 return r;
355 return zd1211b_al2230_finalize_rf(chip);
356 }
357
zd1211_al2230_set_channel(struct zd_rf * rf,u8 channel)358 static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
359 {
360 int r;
361 const u32 *rv = zd1211_al2230_table[channel-1];
362 struct zd_chip *chip = zd_rf_to_chip(rf);
363 static const struct zd_ioreq16 ioreqs[] = {
364 { CR138, 0x28 },
365 { CR203, 0x06 },
366 };
367
368 r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
369 if (r)
370 return r;
371 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
372 }
373
zd1211b_al2230_set_channel(struct zd_rf * rf,u8 channel)374 static int zd1211b_al2230_set_channel(struct zd_rf *rf, u8 channel)
375 {
376 int r;
377 const u32 *rv = zd1211b_al2230_table[channel-1];
378 struct zd_chip *chip = zd_rf_to_chip(rf);
379
380 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
381 ARRAY_SIZE(zd1211b_ioreqs_shared_1));
382 if (r)
383 return r;
384
385 r = zd_rfwritev_cr_locked(chip, rv, 3);
386 if (r)
387 return r;
388
389 return zd1211b_al2230_finalize_rf(chip);
390 }
391
zd1211_al2230_switch_radio_on(struct zd_rf * rf)392 static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
393 {
394 struct zd_chip *chip = zd_rf_to_chip(rf);
395 static const struct zd_ioreq16 ioreqs[] = {
396 { CR11, 0x00 },
397 { CR251, 0x3f },
398 };
399
400 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
401 }
402
zd1211b_al2230_switch_radio_on(struct zd_rf * rf)403 static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
404 {
405 struct zd_chip *chip = zd_rf_to_chip(rf);
406 static const struct zd_ioreq16 ioreqs[] = {
407 { CR11, 0x00 },
408 { CR251, 0x7f },
409 };
410
411 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
412 }
413
al2230_switch_radio_off(struct zd_rf * rf)414 static int al2230_switch_radio_off(struct zd_rf *rf)
415 {
416 struct zd_chip *chip = zd_rf_to_chip(rf);
417 static const struct zd_ioreq16 ioreqs[] = {
418 { CR11, 0x04 },
419 { CR251, 0x2f },
420 };
421
422 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
423 }
424
zd_rf_init_al2230(struct zd_rf * rf)425 int zd_rf_init_al2230(struct zd_rf *rf)
426 {
427 struct zd_chip *chip = zd_rf_to_chip(rf);
428
429 rf->switch_radio_off = al2230_switch_radio_off;
430 if (zd_chip_is_zd1211b(chip)) {
431 rf->init_hw = zd1211b_al2230_init_hw;
432 rf->set_channel = zd1211b_al2230_set_channel;
433 rf->switch_radio_on = zd1211b_al2230_switch_radio_on;
434 } else {
435 rf->init_hw = zd1211_al2230_init_hw;
436 rf->set_channel = zd1211_al2230_set_channel;
437 rf->switch_radio_on = zd1211_al2230_switch_radio_on;
438 }
439 rf->patch_6m_band_edge = zd_rf_generic_patch_6m;
440 rf->patch_cck_gain = 1;
441 return 0;
442 }
443