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1 /*
2  *  linux/drivers/serial/cpm_uart.h
3  *
4  *  Driver for CPM (SCC/SMC) serial ports
5  *
6  *  Copyright (C) 2004 Freescale Semiconductor, Inc.
7  *
8  *  2006 (c) MontaVista Software, Inc.
9  *	Vitaly Bordug <vbordug@ru.mvista.com>
10  *
11  * This file is licensed under the terms of the GNU General Public License
12  * version 2. This program is licensed "as is" without any warranty of any
13  * kind, whether express or implied.
14  *
15  */
16 #ifndef CPM_UART_H
17 #define CPM_UART_H
18 
19 #include <linux/platform_device.h>
20 #include <linux/fs_uart_pd.h>
21 
22 #if defined(CONFIG_CPM2)
23 #include "cpm_uart_cpm2.h"
24 #elif defined(CONFIG_8xx)
25 #include "cpm_uart_cpm1.h"
26 #endif
27 
28 #define SERIAL_CPM_MAJOR	204
29 #define SERIAL_CPM_MINOR	46
30 
31 #define IS_SMC(pinfo)		(pinfo->flags & FLAG_SMC)
32 #define IS_DISCARDING(pinfo)	(pinfo->flags & FLAG_DISCARDING)
33 #define FLAG_DISCARDING	0x00000004	/* when set, don't discard */
34 #define FLAG_SMC	0x00000002
35 #define FLAG_CONSOLE	0x00000001
36 
37 #define UART_SMC1	fsid_smc1_uart
38 #define UART_SMC2	fsid_smc2_uart
39 #define UART_SCC1	fsid_scc1_uart
40 #define UART_SCC2	fsid_scc2_uart
41 #define UART_SCC3	fsid_scc3_uart
42 #define UART_SCC4	fsid_scc4_uart
43 
44 #define UART_NR		fs_uart_nr
45 
46 #define RX_NUM_FIFO	4
47 #define RX_BUF_SIZE	32
48 #define TX_NUM_FIFO	4
49 #define TX_BUF_SIZE	32
50 
51 #define SCC_WAIT_CLOSING 100
52 
53 #define GPIO_CTS	0
54 #define GPIO_RTS	1
55 #define GPIO_DCD	2
56 #define GPIO_DSR	3
57 #define GPIO_DTR	4
58 #define GPIO_RI		5
59 
60 #define NUM_GPIOS	(GPIO_RI+1)
61 
62 struct uart_cpm_port {
63 	struct uart_port	port;
64 	u16			rx_nrfifos;
65 	u16			rx_fifosize;
66 	u16			tx_nrfifos;
67 	u16			tx_fifosize;
68 	smc_t __iomem		*smcp;
69 	smc_uart_t __iomem	*smcup;
70 	scc_t __iomem		*sccp;
71 	scc_uart_t __iomem	*sccup;
72 	cbd_t __iomem		*rx_bd_base;
73 	cbd_t __iomem		*rx_cur;
74 	cbd_t __iomem		*tx_bd_base;
75 	cbd_t __iomem		*tx_cur;
76 	unsigned char		*tx_buf;
77 	unsigned char		*rx_buf;
78 	u32			flags;
79 	void			(*set_lineif)(struct uart_cpm_port *);
80 	struct clk		*clk;
81 	u8			brg;
82 	uint			 dp_addr;
83 	void			*mem_addr;
84 	dma_addr_t		 dma_addr;
85 	u32			mem_size;
86 	/* helpers */
87 	int			 baud;
88 	int			 bits;
89 	/* Keep track of 'odd' SMC2 wirings */
90 	int			is_portb;
91 	/* wait on close if needed */
92 	int			wait_closing;
93 	/* value to combine with opcode to form cpm command */
94 	u32			command;
95 	int			gpios[NUM_GPIOS];
96 };
97 
98 extern int cpm_uart_nr;
99 extern struct uart_cpm_port cpm_uart_ports[UART_NR];
100 
101 /* these are located in their respective files */
102 void cpm_line_cr_cmd(struct uart_cpm_port *port, int cmd);
103 void __iomem *cpm_uart_map_pram(struct uart_cpm_port *port,
104 				struct device_node *np);
105 void cpm_uart_unmap_pram(struct uart_cpm_port *port, void __iomem *pram);
106 int cpm_uart_init_portdesc(void);
107 int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
108 void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
109 
110 void smc1_lineif(struct uart_cpm_port *pinfo);
111 void smc2_lineif(struct uart_cpm_port *pinfo);
112 void scc1_lineif(struct uart_cpm_port *pinfo);
113 void scc2_lineif(struct uart_cpm_port *pinfo);
114 void scc3_lineif(struct uart_cpm_port *pinfo);
115 void scc4_lineif(struct uart_cpm_port *pinfo);
116 
117 /*
118    virtual to phys transtalion
119 */
cpu2cpm_addr(void * addr,struct uart_cpm_port * pinfo)120 static inline unsigned long cpu2cpm_addr(void *addr,
121                                          struct uart_cpm_port *pinfo)
122 {
123 	int offset;
124 	u32 val = (u32)addr;
125 	u32 mem = (u32)pinfo->mem_addr;
126 	/* sane check */
127 	if (likely(val >= mem && val < mem + pinfo->mem_size)) {
128 		offset = val - mem;
129 		return pinfo->dma_addr + offset;
130 	}
131 	/* something nasty happened */
132 	BUG();
133 	return 0;
134 }
135 
cpm2cpu_addr(unsigned long addr,struct uart_cpm_port * pinfo)136 static inline void *cpm2cpu_addr(unsigned long addr,
137                                  struct uart_cpm_port *pinfo)
138 {
139 	int offset;
140 	u32 val = addr;
141 	u32 dma = (u32)pinfo->dma_addr;
142 	/* sane check */
143 	if (likely(val >= dma && val < dma + pinfo->mem_size)) {
144 		offset = val - dma;
145 		return pinfo->mem_addr + offset;
146 	}
147 	/* something nasty happened */
148 	BUG();
149 	return NULL;
150 }
151 
152 
153 #endif /* CPM_UART_H */
154