1 /**************************************************************************
2 *
3 * Copyright 2000-2006 Alacritech, Inc. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above
12 * copyright notice, this list of conditions and the following
13 * disclaimer in the documentation and/or other materials provided
14 * with the distribution.
15 *
16 * Alternatively, this software may be distributed under the terms of the
17 * GNU General Public License ("GPL") version 2 as published by the Free
18 * Software Foundation.
19 *
20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR
24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 * The views and conclusions contained in the software and documentation
34 * are those of the authors and should not be interpreted as representing
35 * official policies, either expressed or implied, of Alacritech, Inc.
36 *
37 **************************************************************************/
38
39 /*
40 * FILENAME: slicoss.c
41 *
42 * The SLICOSS driver for Alacritech's IS-NIC products.
43 *
44 * This driver is supposed to support:
45 *
46 * Mojave cards (single port PCI Gigabit) both copper and fiber
47 * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
48 * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
49 *
50 * The driver was acutally tested on Oasis and Kalahari cards.
51 *
52 *
53 * NOTE: This is the standard, non-accelerated version of Alacritech's
54 * IS-NIC driver.
55 */
56
57
58 #define SLIC_DUMP_ENABLED 0
59 #define KLUDGE_FOR_4GB_BOUNDARY 1
60 #define DEBUG_MICROCODE 1
61 #define SLIC_PRODUCTION_BUILD 1
62 #define SLIC_FAILURE_RESET 1
63 #define DBG 1
64 #define SLIC_ASSERT_ENABLED 1
65 #define SLIC_GET_STATS_ENABLED 1
66 #define SLIC_GET_STATS_TIMER_ENABLED 0
67 #define SLIC_PING_TIMER_ENABLED 1
68 #define SLIC_POWER_MANAGEMENT_ENABLED 0
69 #define SLIC_INTERRUPT_PROCESS_LIMIT 1
70 #define LINUX_FREES_ADAPTER_RESOURCES 1
71 #define SLIC_OFFLOAD_IP_CHECKSUM 1
72 #define STATS_TIMER_INTERVAL 2
73 #define PING_TIMER_INTERVAL 1
74
75 #include <linux/kernel.h>
76 #include <linux/string.h>
77 #include <linux/errno.h>
78 #include <linux/ioport.h>
79 #include <linux/slab.h>
80 #include <linux/interrupt.h>
81 #include <linux/timer.h>
82 #include <linux/pci.h>
83 #include <linux/spinlock.h>
84 #include <linux/init.h>
85 #include <linux/bitops.h>
86 #include <linux/io.h>
87 #include <linux/netdevice.h>
88 #include <linux/etherdevice.h>
89 #include <linux/skbuff.h>
90 #include <linux/delay.h>
91 #include <linux/debugfs.h>
92 #include <linux/seq_file.h>
93 #include <linux/kthread.h>
94 #include <linux/module.h>
95 #include <linux/moduleparam.h>
96
97 #include <linux/firmware.h>
98 #include <linux/types.h>
99 #include <linux/dma-mapping.h>
100 #include <linux/mii.h>
101 #include <linux/if_vlan.h>
102 #include <asm/unaligned.h>
103
104 #include <linux/ethtool.h>
105 #define SLIC_ETHTOOL_SUPPORT 1
106
107 #include <linux/uaccess.h>
108 #include "slicinc.h"
109
110 #if SLIC_DUMP_ENABLED
111 #include "slicdump.h"
112 #endif
113
114 #define SLIC_POWER_MANAGEMENT 0
115
116 static uint slic_first_init = 1;
117 static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
118 "and Storage Accelerator (Non-Accelerated)\n";
119
120 static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00";
121 static char *slic_product_name = "SLIC Technology(tm) Server "\
122 "and Storage Accelerator (Non-Accelerated)";
123 static char *slic_vendor = "Alacritech, Inc.";
124
125 static int slic_debug = 1;
126 static int debug = -1;
127 static struct net_device *head_netdevice;
128
129 static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
130 static int intagg_delay = 100;
131 static u32 dynamic_intagg;
132 static int errormsg;
133 static int goodmsg;
134 static unsigned int rcv_count;
135 static struct dentry *slic_debugfs;
136
137 #define DRV_NAME "slicoss"
138 #define DRV_VERSION "2.0.1"
139 #define DRV_AUTHOR "Alacritech, Inc. Engineering"
140 #define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\
141 "Non-Accelerated Driver"
142 #define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\
143 "All rights reserved."
144 #define PFX DRV_NAME " "
145
146 MODULE_AUTHOR(DRV_AUTHOR);
147 MODULE_DESCRIPTION(DRV_DESCRIPTION);
148 MODULE_LICENSE("Dual BSD/GPL");
149
150 module_param(dynamic_intagg, int, 0);
151 MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
152 module_param(intagg_delay, int, 0);
153 MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
154
155 static struct pci_device_id slic_pci_tbl[] __devinitdata = {
156 {PCI_VENDOR_ID_ALACRITECH,
157 SLIC_1GB_DEVICE_ID,
158 PCI_ANY_ID, PCI_ANY_ID,},
159 {PCI_VENDOR_ID_ALACRITECH,
160 SLIC_2GB_DEVICE_ID,
161 PCI_ANY_ID, PCI_ANY_ID,},
162 {0,}
163 };
164
165 MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
166
167 #define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle) \
168 { \
169 spin_lock_irqsave(&_adapter->handle_lock.lock, \
170 _adapter->handle_lock.flags); \
171 _pslic_handle = _adapter->pfree_slic_handles; \
172 if (_pslic_handle) { \
173 ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE); \
174 _adapter->pfree_slic_handles = _pslic_handle->next; \
175 } \
176 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
177 _adapter->handle_lock.flags); \
178 }
179
180 #define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle) \
181 { \
182 _pslic_handle->type = SLIC_HANDLE_FREE; \
183 spin_lock_irqsave(&_adapter->handle_lock.lock, \
184 _adapter->handle_lock.flags); \
185 _pslic_handle->next = _adapter->pfree_slic_handles; \
186 _adapter->pfree_slic_handles = _pslic_handle; \
187 spin_unlock_irqrestore(&_adapter->handle_lock.lock, \
188 _adapter->handle_lock.flags); \
189 }
190
191 static void slic_debug_init(void);
192 static void slic_debug_cleanup(void);
193 static void slic_debug_adapter_create(struct adapter *adapter);
194 static void slic_debug_adapter_destroy(struct adapter *adapter);
195 static void slic_debug_card_create(struct sliccard *card);
196 static void slic_debug_card_destroy(struct sliccard *card);
197
slic_reg32_write(void __iomem * reg,u32 value,uint flush)198 static inline void slic_reg32_write(void __iomem *reg, u32 value, uint flush)
199 {
200 writel(value, reg);
201 if (flush)
202 mb();
203 }
204
slic_reg64_write(struct adapter * adapter,void __iomem * reg,u32 value,void __iomem * regh,u32 paddrh,uint flush)205 static inline void slic_reg64_write(struct adapter *adapter,
206 void __iomem *reg,
207 u32 value,
208 void __iomem *regh, u32 paddrh, uint flush)
209 {
210 spin_lock_irqsave(&adapter->bit64reglock.lock,
211 adapter->bit64reglock.flags);
212 if (paddrh != adapter->curaddrupper) {
213 adapter->curaddrupper = paddrh;
214 writel(paddrh, regh);
215 }
216 writel(value, reg);
217 if (flush)
218 mb();
219 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
220 adapter->bit64reglock.flags);
221 }
222
slic_init_driver(void)223 static void slic_init_driver(void)
224 {
225 if (slic_first_init) {
226 DBG_MSG("slicoss: %s slic_first_init set jiffies[%lx]\n",
227 __func__, jiffies);
228 slic_first_init = 0;
229 spin_lock_init(&slic_global.driver_lock.lock);
230 slic_debug_init();
231 }
232 }
233
slic_dbg_macaddrs(struct adapter * adapter)234 static void slic_dbg_macaddrs(struct adapter *adapter)
235 {
236 DBG_MSG(" (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
237 adapter->netdev->name, adapter->currmacaddr[0],
238 adapter->currmacaddr[1], adapter->currmacaddr[2],
239 adapter->currmacaddr[3], adapter->currmacaddr[4],
240 adapter->currmacaddr[5]);
241 DBG_MSG(" (%s) mac %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
242 adapter->netdev->name, adapter->macaddr[0],
243 adapter->macaddr[1], adapter->macaddr[2],
244 adapter->macaddr[3], adapter->macaddr[4], adapter->macaddr[5]);
245 return;
246 }
247
248 #ifdef DEBUG_REGISTER_TRACE
slic_dbg_register_trace(struct adapter * adapter,struct sliccard * card)249 static void slic_dbg_register_trace(struct adapter *adapter,
250 struct sliccard *card)
251 {
252 uint i;
253
254 DBG_ERROR("Dump Register Write Trace: curr_ix == %d\n", card->debug_ix);
255 for (i = 0; i < 32; i++) {
256 DBG_ERROR("%2d %d %4x %x %x\n",
257 i, card->reg_type[i], card->reg_offset[i],
258 card->reg_value[i], card->reg_valueh[i]);
259 }
260 }
261 #endif
262
slic_init_adapter(struct net_device * netdev,struct pci_dev * pcidev,const struct pci_device_id * pci_tbl_entry,void __iomem * memaddr,int chip_idx)263 static void slic_init_adapter(struct net_device *netdev,
264 struct pci_dev *pcidev,
265 const struct pci_device_id *pci_tbl_entry,
266 void __iomem *memaddr, int chip_idx)
267 {
268 ushort index;
269 struct slic_handle *pslic_handle;
270 struct adapter *adapter = (struct adapter *)netdev_priv(netdev);
271 /*
272 DBG_MSG("slicoss: %s (%s)\n netdev [%p]\n adapter[%p]\n "
273 "pcidev [%p]\n", __func__, netdev->name, netdev, adapter, pcidev);*/
274 /* adapter->pcidev = pcidev;*/
275 adapter->vendid = pci_tbl_entry->vendor;
276 adapter->devid = pci_tbl_entry->device;
277 adapter->subsysid = pci_tbl_entry->subdevice;
278 adapter->busnumber = pcidev->bus->number;
279 adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F);
280 adapter->functionnumber = (pcidev->devfn & 0x7);
281 adapter->memorylength = pci_resource_len(pcidev, 0);
282 adapter->slic_regs = (__iomem struct slic_regs *)memaddr;
283 adapter->irq = pcidev->irq;
284 /* adapter->netdev = netdev;*/
285 adapter->next_netdevice = head_netdevice;
286 head_netdevice = netdev;
287 adapter->chipid = chip_idx;
288 adapter->port = 0; /*adapter->functionnumber;*/
289 adapter->cardindex = adapter->port;
290 adapter->memorybase = memaddr;
291 spin_lock_init(&adapter->upr_lock.lock);
292 spin_lock_init(&adapter->bit64reglock.lock);
293 spin_lock_init(&adapter->adapter_lock.lock);
294 spin_lock_init(&adapter->reset_lock.lock);
295 spin_lock_init(&adapter->handle_lock.lock);
296
297 adapter->card_size = 1;
298 /*
299 Initialize slic_handle array
300 */
301 ASSERT(SLIC_CMDQ_MAXCMDS <= 0xFFFF);
302 /*
303 Start with 1. 0 is an invalid host handle.
304 */
305 for (index = 1, pslic_handle = &adapter->slic_handles[1];
306 index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) {
307
308 pslic_handle->token.handle_index = index;
309 pslic_handle->type = SLIC_HANDLE_FREE;
310 pslic_handle->next = adapter->pfree_slic_handles;
311 adapter->pfree_slic_handles = pslic_handle;
312 }
313 /*
314 DBG_MSG(".........\nix[%d] phandle[%p] pfree[%p] next[%p]\n",
315 index, pslic_handle, adapter->pfree_slic_handles, pslic_handle->next);*/
316 adapter->pshmem = (struct slic_shmem *)
317 pci_alloc_consistent(adapter->pcidev,
318 sizeof(struct slic_shmem),
319 &adapter->
320 phys_shmem);
321 /*
322 DBG_MSG("slicoss: %s (%s)\n pshmem [%p]\n phys_shmem[%p]\n"\
323 "slic_regs [%p]\n", __func__, netdev->name, adapter->pshmem,
324 (void *)adapter->phys_shmem, adapter->slic_regs);
325 */
326 ASSERT(adapter->pshmem);
327
328 memset(adapter->pshmem, 0, sizeof(struct slic_shmem));
329
330 return;
331 }
332
slic_entry_probe(struct pci_dev * pcidev,const struct pci_device_id * pci_tbl_entry)333 static int __devinit slic_entry_probe(struct pci_dev *pcidev,
334 const struct pci_device_id *pci_tbl_entry)
335 {
336 static int cards_found;
337 static int did_version;
338 int err;
339 struct net_device *netdev;
340 struct adapter *adapter;
341 void __iomem *memmapped_ioaddr = NULL;
342 u32 status = 0;
343 ulong mmio_start = 0;
344 ulong mmio_len = 0;
345 struct sliccard *card = NULL;
346
347 DBG_MSG("slicoss: %s 2.6 VERSION ENTER jiffies[%lx] cpu %d\n",
348 __func__, jiffies, smp_processor_id());
349
350 slic_global.dynamic_intagg = dynamic_intagg;
351
352 err = pci_enable_device(pcidev);
353
354 DBG_MSG("Call pci_enable_device(%p) status[%x]\n", pcidev, err);
355 if (err)
356 return err;
357
358 if (slic_debug > 0 && did_version++ == 0) {
359 printk(slic_banner);
360 printk(slic_proc_version);
361 }
362
363 err = pci_set_dma_mask(pcidev, DMA_64BIT_MASK);
364 if (!err) {
365 DBG_MSG("pci_set_dma_mask(DMA_64BIT_MASK) successful\n");
366 } else {
367 err = pci_set_dma_mask(pcidev, DMA_32BIT_MASK);
368 if (err) {
369 DBG_MSG
370 ("No usable DMA configuration, aborting err[%x]\n",
371 err);
372 return err;
373 }
374 DBG_MSG("pci_set_dma_mask(DMA_32BIT_MASK) successful\n");
375 }
376
377 DBG_MSG("Call pci_request_regions\n");
378
379 err = pci_request_regions(pcidev, DRV_NAME);
380 if (err) {
381 DBG_MSG("pci_request_regions FAILED err[%x]\n", err);
382 return err;
383 }
384
385 DBG_MSG("call pci_set_master\n");
386 pci_set_master(pcidev);
387
388 DBG_MSG("call alloc_etherdev\n");
389 netdev = alloc_etherdev(sizeof(struct adapter));
390 if (!netdev) {
391 err = -ENOMEM;
392 goto err_out_exit_slic_probe;
393 }
394 DBG_MSG("alloc_etherdev for slic netdev[%p]\n", netdev);
395
396 SET_NETDEV_DEV(netdev, &pcidev->dev);
397
398 pci_set_drvdata(pcidev, netdev);
399 adapter = netdev_priv(netdev);
400 adapter->netdev = netdev;
401 adapter->pcidev = pcidev;
402
403 mmio_start = pci_resource_start(pcidev, 0);
404 mmio_len = pci_resource_len(pcidev, 0);
405
406 DBG_MSG("slicoss: call ioremap(mmio_start[%lx], mmio_len[%lx])\n",
407 mmio_start, mmio_len);
408
409 /* memmapped_ioaddr = (u32)ioremap_nocache(mmio_start, mmio_len);*/
410 memmapped_ioaddr = ioremap(mmio_start, mmio_len);
411 DBG_MSG("slicoss: %s MEMMAPPED_IOADDR [%p]\n", __func__,
412 memmapped_ioaddr);
413 if (!memmapped_ioaddr) {
414 DBG_ERROR("%s cannot remap MMIO region %lx @ %lx\n",
415 __func__, mmio_len, mmio_start);
416 goto err_out_free_mmio_region;
417 }
418
419 DBG_MSG
420 ("slicoss: %s found Alacritech SLICOSS PCI, MMIO at %p, "\
421 "start[%lx] len[%lx], IRQ %d.\n",
422 __func__, memmapped_ioaddr, mmio_start, mmio_len, pcidev->irq);
423
424 slic_config_pci(pcidev);
425
426 slic_init_driver();
427
428 slic_init_adapter(netdev,
429 pcidev, pci_tbl_entry, memmapped_ioaddr, cards_found);
430
431 status = slic_card_locate(adapter);
432 if (status) {
433 DBG_ERROR("%s cannot locate card\n", __func__);
434 goto err_out_free_mmio_region;
435 }
436
437 card = adapter->card;
438
439 if (!adapter->allocated) {
440 card->adapters_allocated++;
441 adapter->allocated = 1;
442 }
443
444 DBG_MSG("slicoss: %s card: %p\n", __func__,
445 adapter->card);
446 DBG_MSG("slicoss: %s card->adapter[%d] == [%p]\n", __func__,
447 (uint) adapter->port, adapter);
448 DBG_MSG("slicoss: %s card->adapters_allocated [%d]\n", __func__,
449 card->adapters_allocated);
450 DBG_MSG("slicoss: %s card->adapters_activated [%d]\n", __func__,
451 card->adapters_activated);
452
453 status = slic_card_init(card, adapter);
454
455 if (status != STATUS_SUCCESS) {
456 card->state = CARD_FAIL;
457 adapter->state = ADAPT_FAIL;
458 adapter->linkstate = LINK_DOWN;
459 DBG_ERROR("slic_card_init FAILED status[%x]\n", status);
460 } else {
461 slic_adapter_set_hwaddr(adapter);
462 }
463
464 netdev->base_addr = (unsigned long)adapter->memorybase;
465 netdev->irq = adapter->irq;
466 netdev->open = slic_entry_open;
467 netdev->stop = slic_entry_halt;
468 netdev->hard_start_xmit = slic_xmit_start;
469 netdev->do_ioctl = slic_ioctl;
470 netdev->set_mac_address = slic_mac_set_address;
471 #if SLIC_GET_STATS_ENABLED
472 netdev->get_stats = slic_get_stats;
473 #endif
474 netdev->set_multicast_list = slic_mcast_set_list;
475
476 slic_debug_adapter_create(adapter);
477
478 strcpy(netdev->name, "eth%d");
479 err = register_netdev(netdev);
480 if (err) {
481 DBG_ERROR("Cannot register net device, aborting.\n");
482 goto err_out_unmap;
483 }
484
485 DBG_MSG
486 ("slicoss: addr 0x%lx, irq %d, MAC addr "\
487 "%02X:%02X:%02X:%02X:%02X:%02X\n",
488 mmio_start, /*pci_resource_start(pcidev, 0), */ pcidev->irq,
489 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
490 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
491
492 cards_found++;
493 DBG_MSG("slicoss: %s EXIT status[%x] jiffies[%lx] cpu %d\n",
494 __func__, status, jiffies, smp_processor_id());
495
496 return status;
497
498 err_out_unmap:
499 iounmap(memmapped_ioaddr);
500
501 err_out_free_mmio_region:
502 release_mem_region(mmio_start, mmio_len);
503
504 err_out_exit_slic_probe:
505 pci_release_regions(pcidev);
506 DBG_ERROR("%s EXIT jiffies[%lx] cpu %d\n", __func__, jiffies,
507 smp_processor_id());
508
509 return -ENODEV;
510 }
511
slic_entry_open(struct net_device * dev)512 static int slic_entry_open(struct net_device *dev)
513 {
514 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
515 struct sliccard *card = adapter->card;
516 u32 locked = 0;
517 int status;
518
519 ASSERT(adapter);
520 ASSERT(card);
521 DBG_MSG
522 ("slicoss: %s adapter->activated[%d] card->adapters[%x] "\
523 "allocd[%x]\n", __func__, adapter->activated,
524 card->adapters_activated,
525 card->adapters_allocated);
526 DBG_MSG
527 ("slicoss: %s (%s): [jiffies[%lx] cpu %d] dev[%p] adapt[%p] "\
528 "port[%d] card[%p]\n",
529 __func__, adapter->netdev->name, jiffies, smp_processor_id(),
530 adapter->netdev, adapter, adapter->port, card);
531
532 netif_stop_queue(adapter->netdev);
533
534 spin_lock_irqsave(&slic_global.driver_lock.lock,
535 slic_global.driver_lock.flags);
536 locked = 1;
537 if (!adapter->activated) {
538 card->adapters_activated++;
539 slic_global.num_slic_ports_active++;
540 adapter->activated = 1;
541 }
542 status = slic_if_init(adapter);
543
544 if (status != STATUS_SUCCESS) {
545 if (adapter->activated) {
546 card->adapters_activated--;
547 slic_global.num_slic_ports_active--;
548 adapter->activated = 0;
549 }
550 if (locked) {
551 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
552 slic_global.driver_lock.flags);
553 locked = 0;
554 }
555 return status;
556 }
557 DBG_MSG("slicoss: %s set card->master[%p] adapter[%p]\n", __func__,
558 card->master, adapter);
559 if (!card->master)
560 card->master = adapter;
561 #if SLIC_DUMP_ENABLED
562 if (!(card->dumpthread_running))
563 init_waitqueue_head(&card->dump_wq);
564 #endif
565
566 if (locked) {
567 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
568 slic_global.driver_lock.flags);
569 locked = 0;
570 }
571 #if SLIC_DUMP_ENABLED
572 if (!(card->dumpthread_running)) {
573 DBG_MSG("attempt to initialize dump thread\n");
574 status = slic_init_dump_thread(card);
575 /*
576 Even if the dump thread fails, we will continue at this point
577 */
578 }
579 #endif
580
581 return STATUS_SUCCESS;
582 }
583
slic_entry_remove(struct pci_dev * pcidev)584 static void __devexit slic_entry_remove(struct pci_dev *pcidev)
585 {
586 struct net_device *dev = pci_get_drvdata(pcidev);
587 u32 mmio_start = 0;
588 uint mmio_len = 0;
589 struct adapter *adapter = (struct adapter *) netdev_priv(dev);
590 struct sliccard *card;
591 struct mcast_address *mcaddr, *mlist;
592
593 ASSERT(adapter);
594 DBG_MSG("slicoss: %s ENTER dev[%p] adapter[%p]\n", __func__, dev,
595 adapter);
596 slic_adapter_freeresources(adapter);
597 slic_unmap_mmio_space(adapter);
598 DBG_MSG("slicoss: %s unregister_netdev\n", __func__);
599 unregister_netdev(dev);
600
601 mmio_start = pci_resource_start(pcidev, 0);
602 mmio_len = pci_resource_len(pcidev, 0);
603
604 DBG_MSG("slicoss: %s rel_region(0) start[%x] len[%x]\n", __func__,
605 mmio_start, mmio_len);
606 release_mem_region(mmio_start, mmio_len);
607
608 DBG_MSG("slicoss: %s iounmap dev->base_addr[%x]\n", __func__,
609 (uint) dev->base_addr);
610 iounmap((void __iomem *)dev->base_addr);
611 /* free multicast addresses */
612 mlist = adapter->mcastaddrs;
613 while (mlist) {
614 mcaddr = mlist;
615 mlist = mlist->next;
616 kfree(mcaddr);
617 }
618 ASSERT(adapter->card);
619 card = adapter->card;
620 ASSERT(card->adapters_allocated);
621 card->adapters_allocated--;
622 adapter->allocated = 0;
623 DBG_MSG
624 ("slicoss: %s init[%x] alloc[%x] card[%p] adapter[%p]\n",
625 __func__, card->adapters_activated, card->adapters_allocated,
626 card, adapter);
627 if (!card->adapters_allocated) {
628 struct sliccard *curr_card = slic_global.slic_card;
629 if (curr_card == card) {
630 slic_global.slic_card = card->next;
631 } else {
632 while (curr_card->next != card)
633 curr_card = curr_card->next;
634 ASSERT(curr_card);
635 curr_card->next = card->next;
636 }
637 ASSERT(slic_global.num_slic_cards);
638 slic_global.num_slic_cards--;
639 slic_card_cleanup(card);
640 }
641 DBG_MSG("slicoss: %s deallocate device\n", __func__);
642 kfree(dev);
643 pci_release_regions(pcidev);
644 DBG_MSG("slicoss: %s EXIT\n", __func__);
645 }
646
slic_entry_halt(struct net_device * dev)647 static int slic_entry_halt(struct net_device *dev)
648 {
649 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
650 struct sliccard *card = adapter->card;
651 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
652
653 spin_lock_irqsave(&slic_global.driver_lock.lock,
654 slic_global.driver_lock.flags);
655 ASSERT(card);
656 DBG_MSG("slicoss: %s (%s) ENTER\n", __func__, dev->name);
657 DBG_MSG("slicoss: %s (%s) actvtd[%d] alloc[%d] state[%x] adapt[%p]\n",
658 __func__, dev->name, card->adapters_activated,
659 card->adapters_allocated, card->state, adapter);
660 slic_if_stop_queue(adapter);
661 adapter->state = ADAPT_DOWN;
662 adapter->linkstate = LINK_DOWN;
663 adapter->upr_list = NULL;
664 adapter->upr_busy = 0;
665 adapter->devflags_prev = 0;
666 DBG_MSG("slicoss: %s (%s) set adapter[%p] state to ADAPT_DOWN(%d)\n",
667 __func__, dev->name, adapter, adapter->state);
668 ASSERT(card->adapter[adapter->cardindex] == adapter);
669 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
670 adapter->all_reg_writes++;
671 adapter->icr_reg_writes++;
672 slic_config_clear(adapter);
673 DBG_MSG("slicoss: %s (%s) dev[%p] adapt[%p] card[%p]\n",
674 __func__, dev->name, dev, adapter, card);
675 if (adapter->activated) {
676 card->adapters_activated--;
677 slic_global.num_slic_ports_active--;
678 adapter->activated = 0;
679 }
680 #ifdef AUTOMATIC_RESET
681 WRITE_REG(slic_regs->slic_reset_iface, 0, FLUSH);
682 #endif
683 /*
684 * Reset the adapter's rsp, cmd, and rcv queues
685 */
686 slic_cmdq_reset(adapter);
687 slic_rspqueue_reset(adapter);
688 slic_rcvqueue_reset(adapter);
689
690 #ifdef AUTOMATIC_RESET
691 if (!card->adapters_activated) {
692
693 #if SLIC_DUMP_ENABLED
694 if (card->dumpthread_running) {
695 uint status;
696 DBG_MSG("attempt to terminate dump thread pid[%x]\n",
697 card->dump_task_id);
698 status = kill_proc(card->dump_task_id->pid, SIGKILL, 1);
699
700 if (!status) {
701 int count = 10 * 100;
702 while (card->dumpthread_running && --count) {
703 current->state = TASK_INTERRUPTIBLE;
704 schedule_timeout(1);
705 }
706
707 if (!count) {
708 DBG_MSG
709 ("slicmon thread cleanup FAILED \
710 pid[%x]\n",
711 card->dump_task_id->pid);
712 }
713 }
714 }
715 #endif
716 DBG_MSG("slicoss: %s (%s) initiate CARD_HALT\n", __func__,
717 dev->name);
718
719 slic_card_init(card, adapter);
720 }
721 #endif
722
723 DBG_MSG("slicoss: %s (%s) EXIT\n", __func__, dev->name);
724 DBG_MSG("slicoss: %s EXIT\n", __func__);
725 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
726 slic_global.driver_lock.flags);
727 return STATUS_SUCCESS;
728 }
729
slic_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)730 static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
731 {
732 ASSERT(rq);
733 /*
734 DBG_MSG("slicoss: %s cmd[%x] rq[%p] dev[%p]\n", __func__, cmd, rq, dev);
735 */
736 switch (cmd) {
737 case SIOCSLICSETINTAGG:
738 {
739 struct adapter *adapter = (struct adapter *)
740 netdev_priv(dev);
741 u32 data[7];
742 u32 intagg;
743
744 if (copy_from_user(data, rq->ifr_data, 28)) {
745 DBG_ERROR
746 ("copy_from_user FAILED getting initial \
747 params\n");
748 return -EFAULT;
749 }
750 intagg = data[0];
751 printk(KERN_EMERG
752 "%s: set interrupt aggregation to %d\n",
753 __func__, intagg);
754 slic_intagg_set(adapter, intagg);
755 return 0;
756 }
757 #ifdef SLIC_USER_REQUEST_DUMP_ENABLED
758 case SIOCSLICDUMPCARD:
759 {
760 struct adapter *adapter = netdev_priv(dev);
761 struct sliccard *card;
762
763 ASSERT(adapter);
764 ASSERT(adapter->card)
765 card = adapter->card;
766
767 DBG_IOCTL("slic_ioctl SIOCSLIC_DUMP_CARD\n");
768
769 if (card->dump_requested == SLIC_DUMP_DONE) {
770 printk(SLICLEVEL
771 "SLIC Card dump to be overwritten\n");
772 card->dump_requested = SLIC_DUMP_REQUESTED;
773 } else if ((card->dump_requested == SLIC_DUMP_REQUESTED)
774 || (card->dump_requested ==
775 SLIC_DUMP_IN_PROGRESS)) {
776 printk(SLICLEVEL
777 "SLIC Card dump Requested but already \
778 in progress... ignore\n");
779 } else {
780 printk(SLICLEVEL
781 "SLIC Card #%d Dump Requested\n",
782 card->cardnum);
783 card->dump_requested = SLIC_DUMP_REQUESTED;
784 }
785 return 0;
786 }
787 #endif
788
789 #ifdef SLIC_TRACE_DUMP_ENABLED
790 case SIOCSLICTRACEDUMP:
791 {
792 ulong data[7];
793 ulong value;
794
795 DBG_IOCTL("slic_ioctl SIOCSLIC_TRACE_DUMP\n");
796
797 if (copy_from_user(data, rq->ifr_data, 28)) {
798 PRINT_ERROR
799 ("slic: copy_from_user FAILED getting \
800 initial simba param\n");
801 return -EFAULT;
802 }
803
804 value = data[0];
805 if (tracemon_request == SLIC_DUMP_DONE) {
806 PRINT_ERROR
807 ("ATK Diagnostic Trace Dump Requested\n");
808 tracemon_request = SLIC_DUMP_REQUESTED;
809 tracemon_request_type = value;
810 tracemon_timestamp = jiffies;
811 } else if ((tracemon_request == SLIC_DUMP_REQUESTED) ||
812 (tracemon_request ==
813 SLIC_DUMP_IN_PROGRESS)) {
814 PRINT_ERROR
815 ("ATK Diagnostic Trace Dump Requested but \
816 already in progress... ignore\n");
817 } else {
818 PRINT_ERROR
819 ("ATK Diagnostic Trace Dump Requested\n");
820 tracemon_request = SLIC_DUMP_REQUESTED;
821 tracemon_request_type = value;
822 tracemon_timestamp = jiffies;
823 }
824 return 0;
825 }
826 #endif
827 #if SLIC_ETHTOOL_SUPPORT
828 case SIOCETHTOOL:
829 {
830 struct adapter *adapter = (struct adapter *)
831 netdev_priv(dev);
832 struct ethtool_cmd data;
833 struct ethtool_cmd ecmd;
834
835 ASSERT(adapter);
836 /* DBG_MSG("slicoss: %s SIOCETHTOOL\n", __func__); */
837 if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd)))
838 return -EFAULT;
839
840 if (ecmd.cmd == ETHTOOL_GSET) {
841 data.supported =
842 (SUPPORTED_10baseT_Half |
843 SUPPORTED_10baseT_Full |
844 SUPPORTED_100baseT_Half |
845 SUPPORTED_100baseT_Full |
846 SUPPORTED_Autoneg | SUPPORTED_MII);
847 data.port = PORT_MII;
848 data.transceiver = XCVR_INTERNAL;
849 data.phy_address = 0;
850 if (adapter->linkspeed == LINK_100MB)
851 data.speed = SPEED_100;
852 else if (adapter->linkspeed == LINK_10MB)
853 data.speed = SPEED_10;
854 else
855 data.speed = 0;
856
857 if (adapter->linkduplex == LINK_FULLD)
858 data.duplex = DUPLEX_FULL;
859 else
860 data.duplex = DUPLEX_HALF;
861
862 data.autoneg = AUTONEG_ENABLE;
863 data.maxtxpkt = 1;
864 data.maxrxpkt = 1;
865 if (copy_to_user
866 (rq->ifr_data, &data, sizeof(data)))
867 return -EFAULT;
868
869 } else if (ecmd.cmd == ETHTOOL_SSET) {
870 if (!capable(CAP_NET_ADMIN))
871 return -EPERM;
872
873 if (adapter->linkspeed == LINK_100MB)
874 data.speed = SPEED_100;
875 else if (adapter->linkspeed == LINK_10MB)
876 data.speed = SPEED_10;
877 else
878 data.speed = 0;
879
880 if (adapter->linkduplex == LINK_FULLD)
881 data.duplex = DUPLEX_FULL;
882 else
883 data.duplex = DUPLEX_HALF;
884
885 data.autoneg = AUTONEG_ENABLE;
886 data.maxtxpkt = 1;
887 data.maxrxpkt = 1;
888 if ((ecmd.speed != data.speed) ||
889 (ecmd.duplex != data.duplex)) {
890 u32 speed;
891 u32 duplex;
892
893 if (ecmd.speed == SPEED_10) {
894 speed = 0;
895 SLIC_DISPLAY
896 ("%s: slic ETHTOOL set \
897 link speed==10MB",
898 dev->name);
899 } else {
900 speed = PCR_SPEED_100;
901 SLIC_DISPLAY
902 ("%s: slic ETHTOOL set \
903 link speed==100MB",
904 dev->name);
905 }
906 if (ecmd.duplex == DUPLEX_FULL) {
907 duplex = PCR_DUPLEX_FULL;
908 SLIC_DISPLAY
909 (": duplex==FULL\n");
910 } else {
911 duplex = 0;
912 SLIC_DISPLAY
913 (": duplex==HALF\n");
914 }
915 slic_link_config(adapter,
916 speed, duplex);
917 slic_link_event_handler(adapter);
918 }
919 }
920 return 0;
921 }
922 #endif
923 default:
924 /* DBG_MSG("slicoss: %s UNSUPPORTED[%x]\n", __func__, cmd); */
925 return -EOPNOTSUPP;
926 }
927 }
928
929 #define XMIT_FAIL_LINK_STATE 1
930 #define XMIT_FAIL_ZERO_LENGTH 2
931 #define XMIT_FAIL_HOSTCMD_FAIL 3
932
slic_xmit_build_request(struct adapter * adapter,struct slic_hostcmd * hcmd,struct sk_buff * skb)933 static void slic_xmit_build_request(struct adapter *adapter,
934 struct slic_hostcmd *hcmd, struct sk_buff *skb)
935 {
936 struct slic_host64_cmd *ihcmd;
937 ulong phys_addr;
938
939 ihcmd = &hcmd->cmd64;
940
941 ihcmd->flags = (adapter->port << IHFLG_IFSHFT);
942 ihcmd->command = IHCMD_XMT_REQ;
943 ihcmd->u.slic_buffers.totlen = skb->len;
944 phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len,
945 PCI_DMA_TODEVICE);
946 ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr);
947 ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr);
948 ihcmd->u.slic_buffers.bufs[0].length = skb->len;
949 #if defined(CONFIG_X86_64)
950 hcmd->cmdsize = (u32) ((((u64)&ihcmd->u.slic_buffers.bufs[1] -
951 (u64) hcmd) + 31) >> 5);
952 #elif defined(CONFIG_X86)
953 hcmd->cmdsize = ((((u32) &ihcmd->u.slic_buffers.bufs[1] -
954 (u32) hcmd) + 31) >> 5);
955 #else
956 Stop Compilation;
957 #endif
958 }
959
960 #define NORMAL_ETHFRAME 0
961
slic_xmit_start(struct sk_buff * skb,struct net_device * dev)962 static int slic_xmit_start(struct sk_buff *skb, struct net_device *dev)
963 {
964 struct sliccard *card;
965 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
966 struct slic_hostcmd *hcmd = NULL;
967 u32 status = 0;
968 u32 skbtype = NORMAL_ETHFRAME;
969 void *offloadcmd = NULL;
970
971 card = adapter->card;
972 ASSERT(card);
973 /*
974 DBG_ERROR("xmit_start (%s) ENTER skb[%p] len[%d] linkstate[%x] state[%x]\n",
975 adapter->netdev->name, skb, skb->len, adapter->linkstate,
976 adapter->state);
977 */
978 if ((adapter->linkstate != LINK_UP) ||
979 (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) {
980 status = XMIT_FAIL_LINK_STATE;
981 goto xmit_fail;
982
983 } else if (skb->len == 0) {
984 status = XMIT_FAIL_ZERO_LENGTH;
985 goto xmit_fail;
986 }
987
988 if (skbtype == NORMAL_ETHFRAME) {
989 hcmd = slic_cmdq_getfree(adapter);
990 if (!hcmd) {
991 adapter->xmitq_full = 1;
992 status = XMIT_FAIL_HOSTCMD_FAIL;
993 goto xmit_fail;
994 }
995 ASSERT(hcmd->pslic_handle);
996 ASSERT(hcmd->cmd64.hosthandle ==
997 hcmd->pslic_handle->token.handle_token);
998 hcmd->skb = skb;
999 hcmd->busy = 1;
1000 hcmd->type = SLIC_CMD_DUMB;
1001 if (skbtype == NORMAL_ETHFRAME)
1002 slic_xmit_build_request(adapter, hcmd, skb);
1003 }
1004 adapter->stats.tx_packets++;
1005 adapter->stats.tx_bytes += skb->len;
1006
1007 #ifdef DEBUG_DUMP
1008 if (adapter->kill_card) {
1009 struct slic_host64_cmd ihcmd;
1010
1011 ihcmd = &hcmd->cmd64;
1012
1013 ihcmd->flags |= 0x40;
1014 adapter->kill_card = 0; /* only do this once */
1015 }
1016 #endif
1017 if (hcmd->paddrh == 0) {
1018 WRITE_REG(adapter->slic_regs->slic_cbar,
1019 (hcmd->paddrl | hcmd->cmdsize), DONT_FLUSH);
1020 } else {
1021 WRITE_REG64(adapter,
1022 adapter->slic_regs->slic_cbar64,
1023 (hcmd->paddrl | hcmd->cmdsize),
1024 adapter->slic_regs->slic_addr_upper,
1025 hcmd->paddrh, DONT_FLUSH);
1026 }
1027 xmit_done:
1028 return 0;
1029 xmit_fail:
1030 slic_xmit_fail(adapter, skb, offloadcmd, skbtype, status);
1031 goto xmit_done;
1032 }
1033
slic_xmit_fail(struct adapter * adapter,struct sk_buff * skb,void * cmd,u32 skbtype,u32 status)1034 static void slic_xmit_fail(struct adapter *adapter,
1035 struct sk_buff *skb,
1036 void *cmd, u32 skbtype, u32 status)
1037 {
1038 if (adapter->xmitq_full)
1039 slic_if_stop_queue(adapter);
1040 if ((cmd == NULL) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) {
1041 switch (status) {
1042 case XMIT_FAIL_LINK_STATE:
1043 DBG_ERROR
1044 ("(%s) reject xmit skb[%p: %x] linkstate[%s] \
1045 adapter[%s:%d] card[%s:%d]\n",
1046 adapter->netdev->name, skb, skb->pkt_type,
1047 SLIC_LINKSTATE(adapter->linkstate),
1048 SLIC_ADAPTER_STATE(adapter->state), adapter->state,
1049 SLIC_CARD_STATE(adapter->card->state),
1050 adapter->card->state);
1051 break;
1052 case XMIT_FAIL_ZERO_LENGTH:
1053 DBG_ERROR
1054 ("xmit_start skb->len == 0 skb[%p] type[%x]!!!! \n",
1055 skb, skb->pkt_type);
1056 break;
1057 case XMIT_FAIL_HOSTCMD_FAIL:
1058 DBG_ERROR
1059 ("xmit_start skb[%p] type[%x] No host commands \
1060 available !!!! \n",
1061 skb, skb->pkt_type);
1062 break;
1063 default:
1064 ASSERT(0);
1065 }
1066 }
1067 dev_kfree_skb(skb);
1068 adapter->stats.tx_dropped++;
1069 }
1070
slic_rcv_handle_error(struct adapter * adapter,struct slic_rcvbuf * rcvbuf)1071 static void slic_rcv_handle_error(struct adapter *adapter,
1072 struct slic_rcvbuf *rcvbuf)
1073 {
1074 struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data;
1075
1076 if (adapter->devid != SLIC_1GB_DEVICE_ID) {
1077 if (hdr->frame_status14 & VRHSTAT_802OE)
1078 adapter->if_events.oflow802++;
1079 if (hdr->frame_status14 & VRHSTAT_TPOFLO)
1080 adapter->if_events.Tprtoflow++;
1081 if (hdr->frame_status_b14 & VRHSTATB_802UE)
1082 adapter->if_events.uflow802++;
1083 if (hdr->frame_status_b14 & VRHSTATB_RCVE) {
1084 adapter->if_events.rcvearly++;
1085 adapter->stats.rx_fifo_errors++;
1086 }
1087 if (hdr->frame_status_b14 & VRHSTATB_BUFF) {
1088 adapter->if_events.Bufov++;
1089 adapter->stats.rx_over_errors++;
1090 }
1091 if (hdr->frame_status_b14 & VRHSTATB_CARRE) {
1092 adapter->if_events.Carre++;
1093 adapter->stats.tx_carrier_errors++;
1094 }
1095 if (hdr->frame_status_b14 & VRHSTATB_LONGE)
1096 adapter->if_events.Longe++;
1097 if (hdr->frame_status_b14 & VRHSTATB_PREA)
1098 adapter->if_events.Invp++;
1099 if (hdr->frame_status_b14 & VRHSTATB_CRC) {
1100 adapter->if_events.Crc++;
1101 adapter->stats.rx_crc_errors++;
1102 }
1103 if (hdr->frame_status_b14 & VRHSTATB_DRBL)
1104 adapter->if_events.Drbl++;
1105 if (hdr->frame_status_b14 & VRHSTATB_CODE)
1106 adapter->if_events.Code++;
1107 if (hdr->frame_status_b14 & VRHSTATB_TPCSUM)
1108 adapter->if_events.TpCsum++;
1109 if (hdr->frame_status_b14 & VRHSTATB_TPHLEN)
1110 adapter->if_events.TpHlen++;
1111 if (hdr->frame_status_b14 & VRHSTATB_IPCSUM)
1112 adapter->if_events.IpCsum++;
1113 if (hdr->frame_status_b14 & VRHSTATB_IPLERR)
1114 adapter->if_events.IpLen++;
1115 if (hdr->frame_status_b14 & VRHSTATB_IPHERR)
1116 adapter->if_events.IpHlen++;
1117 } else {
1118 if (hdr->frame_statusGB & VGBSTAT_XPERR) {
1119 u32 xerr = hdr->frame_statusGB >> VGBSTAT_XERRSHFT;
1120
1121 if (xerr == VGBSTAT_XCSERR)
1122 adapter->if_events.TpCsum++;
1123 if (xerr == VGBSTAT_XUFLOW)
1124 adapter->if_events.Tprtoflow++;
1125 if (xerr == VGBSTAT_XHLEN)
1126 adapter->if_events.TpHlen++;
1127 }
1128 if (hdr->frame_statusGB & VGBSTAT_NETERR) {
1129 u32 nerr =
1130 (hdr->
1131 frame_statusGB >> VGBSTAT_NERRSHFT) &
1132 VGBSTAT_NERRMSK;
1133 if (nerr == VGBSTAT_NCSERR)
1134 adapter->if_events.IpCsum++;
1135 if (nerr == VGBSTAT_NUFLOW)
1136 adapter->if_events.IpLen++;
1137 if (nerr == VGBSTAT_NHLEN)
1138 adapter->if_events.IpHlen++;
1139 }
1140 if (hdr->frame_statusGB & VGBSTAT_LNKERR) {
1141 u32 lerr = hdr->frame_statusGB & VGBSTAT_LERRMSK;
1142
1143 if (lerr == VGBSTAT_LDEARLY)
1144 adapter->if_events.rcvearly++;
1145 if (lerr == VGBSTAT_LBOFLO)
1146 adapter->if_events.Bufov++;
1147 if (lerr == VGBSTAT_LCODERR)
1148 adapter->if_events.Code++;
1149 if (lerr == VGBSTAT_LDBLNBL)
1150 adapter->if_events.Drbl++;
1151 if (lerr == VGBSTAT_LCRCERR)
1152 adapter->if_events.Crc++;
1153 if (lerr == VGBSTAT_LOFLO)
1154 adapter->if_events.oflow802++;
1155 if (lerr == VGBSTAT_LUFLO)
1156 adapter->if_events.uflow802++;
1157 }
1158 }
1159 return;
1160 }
1161
1162 #define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000
1163 #define M_FAST_PATH 0x0040
1164
slic_rcv_handler(struct adapter * adapter)1165 static void slic_rcv_handler(struct adapter *adapter)
1166 {
1167 struct sk_buff *skb;
1168 struct slic_rcvbuf *rcvbuf;
1169 u32 frames = 0;
1170
1171 while ((skb = slic_rcvqueue_getnext(adapter))) {
1172 u32 rx_bytes;
1173
1174 ASSERT(skb->head);
1175 rcvbuf = (struct slic_rcvbuf *)skb->head;
1176 adapter->card->events++;
1177 if (rcvbuf->status & IRHDDR_ERR) {
1178 adapter->rx_errors++;
1179 slic_rcv_handle_error(adapter, rcvbuf);
1180 slic_rcvqueue_reinsert(adapter, skb);
1181 continue;
1182 }
1183
1184 if (!slic_mac_filter(adapter, (struct ether_header *)
1185 rcvbuf->data)) {
1186 #if 0
1187 DBG_MSG
1188 ("slicoss: %s (%s) drop frame due to mac filter\n",
1189 __func__, adapter->netdev->name);
1190 #endif
1191 slic_rcvqueue_reinsert(adapter, skb);
1192 continue;
1193 }
1194 skb_pull(skb, SLIC_RCVBUF_HEADSIZE);
1195 rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK);
1196 skb_put(skb, rx_bytes);
1197 adapter->stats.rx_packets++;
1198 adapter->stats.rx_bytes += rx_bytes;
1199 #if SLIC_OFFLOAD_IP_CHECKSUM
1200 skb->ip_summed = CHECKSUM_UNNECESSARY;
1201 #endif
1202
1203 skb->dev = adapter->netdev;
1204 skb->protocol = eth_type_trans(skb, skb->dev);
1205 netif_rx(skb);
1206
1207 ++frames;
1208 #if SLIC_INTERRUPT_PROCESS_LIMIT
1209 if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) {
1210 adapter->rcv_interrupt_yields++;
1211 break;
1212 }
1213 #endif
1214 }
1215 adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames);
1216 }
1217
slic_xmit_complete(struct adapter * adapter)1218 static void slic_xmit_complete(struct adapter *adapter)
1219 {
1220 struct slic_hostcmd *hcmd;
1221 struct slic_rspbuf *rspbuf;
1222 u32 frames = 0;
1223 struct slic_handle_word slic_handle_word;
1224
1225 do {
1226 rspbuf = slic_rspqueue_getnext(adapter);
1227 if (!rspbuf)
1228 break;
1229 adapter->xmit_completes++;
1230 adapter->card->events++;
1231 /*
1232 Get the complete host command buffer
1233 */
1234 slic_handle_word.handle_token = rspbuf->hosthandle;
1235 ASSERT(slic_handle_word.handle_index);
1236 ASSERT(slic_handle_word.handle_index <= SLIC_CMDQ_MAXCMDS);
1237 hcmd =
1238 (struct slic_hostcmd *)
1239 adapter->slic_handles[slic_handle_word.handle_index].
1240 address;
1241 /* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */
1242 ASSERT(hcmd);
1243 ASSERT(hcmd->pslic_handle ==
1244 &adapter->slic_handles[slic_handle_word.handle_index]);
1245 /*
1246 DBG_ERROR("xmit_complete (%s) hcmd[%p] hosthandle[%x]\n",
1247 adapter->netdev->name, hcmd, hcmd->cmd64.hosthandle);
1248 DBG_ERROR(" skb[%p] len %d hcmdtype[%x]\n", hcmd->skb,
1249 hcmd->skb->len, hcmd->type);
1250 */
1251 if (hcmd->type == SLIC_CMD_DUMB) {
1252 if (hcmd->skb)
1253 dev_kfree_skb_irq(hcmd->skb);
1254 slic_cmdq_putdone_irq(adapter, hcmd);
1255 }
1256 rspbuf->status = 0;
1257 rspbuf->hosthandle = 0;
1258 frames++;
1259 } while (1);
1260 adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames);
1261 }
1262
slic_interrupt(int irq,void * dev_id)1263 static irqreturn_t slic_interrupt(int irq, void *dev_id)
1264 {
1265 struct net_device *dev = (struct net_device *)dev_id;
1266 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1267 u32 isr;
1268
1269 if ((adapter->pshmem) && (adapter->pshmem->isr)) {
1270 WRITE_REG(adapter->slic_regs->slic_icr, ICR_INT_MASK, FLUSH);
1271 isr = adapter->isrcopy = adapter->pshmem->isr;
1272 adapter->pshmem->isr = 0;
1273 adapter->num_isrs++;
1274 switch (adapter->card->state) {
1275 case CARD_UP:
1276 if (isr & ~ISR_IO) {
1277 if (isr & ISR_ERR) {
1278 adapter->error_interrupts++;
1279 if (isr & ISR_RMISS) {
1280 int count;
1281 int pre_count;
1282 int errors;
1283
1284 struct slic_rcvqueue *rcvq =
1285 &adapter->rcvqueue;
1286
1287 adapter->
1288 error_rmiss_interrupts++;
1289 if (!rcvq->errors)
1290 rcv_count = rcvq->count;
1291 pre_count = rcvq->count;
1292 errors = rcvq->errors;
1293
1294 while (rcvq->count <
1295 SLIC_RCVQ_FILLTHRESH) {
1296 count =
1297 slic_rcvqueue_fill
1298 (adapter);
1299 if (!count)
1300 break;
1301 }
1302 DBG_MSG
1303 ("(%s): [%x] ISR_RMISS \
1304 initial[%x] pre[%x] \
1305 errors[%x] \
1306 post_count[%x]\n",
1307 adapter->netdev->name,
1308 isr, rcv_count, pre_count,
1309 errors, rcvq->count);
1310 } else if (isr & ISR_XDROP) {
1311 DBG_ERROR
1312 ("isr & ISR_ERR [%x] \
1313 ISR_XDROP \n",
1314 isr);
1315 } else {
1316 DBG_ERROR
1317 ("isr & ISR_ERR [%x]\n",
1318 isr);
1319 }
1320 }
1321
1322 if (isr & ISR_LEVENT) {
1323 /*DBG_MSG("%s (%s) ISR_LEVENT \n",
1324 __func__, adapter->netdev->name);*/
1325 adapter->linkevent_interrupts++;
1326 slic_link_event_handler(adapter);
1327 }
1328
1329 if ((isr & ISR_UPC) ||
1330 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1331 adapter->upr_interrupts++;
1332 slic_upr_request_complete(adapter, isr);
1333 }
1334 }
1335
1336 if (isr & ISR_RCV) {
1337 adapter->rcv_interrupts++;
1338 slic_rcv_handler(adapter);
1339 }
1340
1341 if (isr & ISR_CMD) {
1342 adapter->xmit_interrupts++;
1343 slic_xmit_complete(adapter);
1344 }
1345 break;
1346
1347 case CARD_DOWN:
1348 if ((isr & ISR_UPC) ||
1349 (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1350 adapter->upr_interrupts++;
1351 slic_upr_request_complete(adapter, isr);
1352 }
1353 break;
1354
1355 default:
1356 break;
1357 }
1358
1359 adapter->isrcopy = 0;
1360 adapter->all_reg_writes += 2;
1361 adapter->isr_reg_writes++;
1362 WRITE_REG(adapter->slic_regs->slic_isr, 0, FLUSH);
1363 } else {
1364 adapter->false_interrupts++;
1365 }
1366 return IRQ_HANDLED;
1367 }
1368
1369 /*
1370 * slic_link_event_handler -
1371 *
1372 * Initiate a link configuration sequence. The link configuration begins
1373 * by issuing a READ_LINK_STATUS command to the Utility Processor on the
1374 * SLIC. Since the command finishes asynchronously, the slic_upr_comlete
1375 * routine will follow it up witha UP configuration write command, which
1376 * will also complete asynchronously.
1377 *
1378 */
slic_link_event_handler(struct adapter * adapter)1379 static void slic_link_event_handler(struct adapter *adapter)
1380 {
1381 int status;
1382 struct slic_shmem *pshmem;
1383
1384 if (adapter->state != ADAPT_UP) {
1385 /* Adapter is not operational. Ignore. */
1386 return;
1387 }
1388
1389 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1390
1391 #if defined(CONFIG_X86_64)
1392 /*
1393 DBG_MSG("slic_event_handler pshmem->linkstatus[%x] pshmem[%p]\n \
1394 &linkstatus[%p] &isr[%p]\n", adapter->pshmem->linkstatus, pshmem,
1395 &pshmem->linkstatus, &pshmem->isr);
1396 */
1397 status = slic_upr_request(adapter,
1398 SLIC_UPR_RLSR,
1399 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1400 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1401 0, 0);
1402 #elif defined(CONFIG_X86)
1403 status = slic_upr_request(adapter, SLIC_UPR_RLSR,
1404 (u32) &pshmem->linkstatus, /* no 4GB wrap guaranteed */
1405 0, 0, 0);
1406 #else
1407 Stop compilation;
1408 #endif
1409 ASSERT((status == STATUS_SUCCESS) || (status == STATUS_PENDING));
1410 }
1411
slic_init_cleanup(struct adapter * adapter)1412 static void slic_init_cleanup(struct adapter *adapter)
1413 {
1414 DBG_MSG("slicoss: %s ENTER adapter[%p] ", __func__, adapter);
1415 if (adapter->intrregistered) {
1416 DBG_MSG("FREE_IRQ ");
1417 adapter->intrregistered = 0;
1418 free_irq(adapter->netdev->irq, adapter->netdev);
1419
1420 }
1421 if (adapter->pshmem) {
1422 DBG_MSG("FREE_SHMEM ");
1423 DBG_MSG("adapter[%p] port %d pshmem[%p] FreeShmem ",
1424 adapter, adapter->port, (void *) adapter->pshmem);
1425 pci_free_consistent(adapter->pcidev,
1426 sizeof(struct slic_shmem),
1427 adapter->pshmem, adapter->phys_shmem);
1428 adapter->pshmem = NULL;
1429 adapter->phys_shmem = (dma_addr_t) NULL;
1430 }
1431 #if SLIC_GET_STATS_TIMER_ENABLED
1432 if (adapter->statstimerset) {
1433 DBG_MSG("statstimer ");
1434 adapter->statstimerset = 0;
1435 del_timer(&adapter->statstimer);
1436 }
1437 #endif
1438 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1439 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1440 if (adapter->pingtimerset) {
1441 DBG_MSG("pingtimer ");
1442 adapter->pingtimerset = 0;
1443 del_timer(&adapter->pingtimer);
1444 }
1445 #endif
1446 slic_rspqueue_free(adapter);
1447 slic_cmdq_free(adapter);
1448 slic_rcvqueue_free(adapter);
1449
1450 DBG_MSG("\n");
1451 }
1452
1453 #if SLIC_GET_STATS_ENABLED
slic_get_stats(struct net_device * dev)1454 static struct net_device_stats *slic_get_stats(struct net_device *dev)
1455 {
1456 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1457 struct net_device_stats *stats;
1458
1459 ASSERT(adapter);
1460 stats = &adapter->stats;
1461 stats->collisions = adapter->slic_stats.iface.xmit_collisions;
1462 stats->rx_errors = adapter->slic_stats.iface.rcv_errors;
1463 stats->tx_errors = adapter->slic_stats.iface.xmt_errors;
1464 stats->rx_missed_errors = adapter->slic_stats.iface.rcv_discards;
1465 stats->tx_heartbeat_errors = 0;
1466 stats->tx_aborted_errors = 0;
1467 stats->tx_window_errors = 0;
1468 stats->tx_fifo_errors = 0;
1469 stats->rx_frame_errors = 0;
1470 stats->rx_length_errors = 0;
1471 return &adapter->stats;
1472 }
1473 #endif
1474
1475 /*
1476 * Allocate a mcast_address structure to hold the multicast address.
1477 * Link it in.
1478 */
slic_mcast_add_list(struct adapter * adapter,char * address)1479 static int slic_mcast_add_list(struct adapter *adapter, char *address)
1480 {
1481 struct mcast_address *mcaddr, *mlist;
1482 bool equaladdr;
1483
1484 /* Check to see if it already exists */
1485 mlist = adapter->mcastaddrs;
1486 while (mlist) {
1487 ETHER_EQ_ADDR(mlist->address, address, equaladdr);
1488 if (equaladdr)
1489 return STATUS_SUCCESS;
1490 mlist = mlist->next;
1491 }
1492
1493 /* Doesn't already exist. Allocate a structure to hold it */
1494 mcaddr = kmalloc(sizeof(struct mcast_address), GFP_ATOMIC);
1495 if (mcaddr == NULL)
1496 return 1;
1497
1498 memcpy(mcaddr->address, address, 6);
1499
1500 mcaddr->next = adapter->mcastaddrs;
1501 adapter->mcastaddrs = mcaddr;
1502
1503 return STATUS_SUCCESS;
1504 }
1505
1506 /*
1507 * Functions to obtain the CRC corresponding to the destination mac address.
1508 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
1509 * the polynomial:
1510 * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
1511 * x^4 + x^2 + x^1.
1512 *
1513 * After the CRC for the 6 bytes is generated (but before the value is
1514 * complemented),
1515 * we must then transpose the value and return bits 30-23.
1516 *
1517 */
1518 static u32 slic_crc_table[256]; /* Table of CRCs for all possible byte values */
1519 static u32 slic_crc_init; /* Is table initialized */
1520
1521 /*
1522 * Contruct the CRC32 table
1523 */
slic_mcast_init_crc32(void)1524 static void slic_mcast_init_crc32(void)
1525 {
1526 u32 c; /* CRC shit reg */
1527 u32 e = 0; /* Poly X-or pattern */
1528 int i; /* counter */
1529 int k; /* byte being shifted into crc */
1530
1531 static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
1532
1533 for (i = 0; i < sizeof(p) / sizeof(int); i++)
1534 e |= 1L << (31 - p[i]);
1535
1536 for (i = 1; i < 256; i++) {
1537 c = i;
1538 for (k = 8; k; k--)
1539 c = c & 1 ? (c >> 1) ^ e : c >> 1;
1540 slic_crc_table[i] = c;
1541 }
1542 }
1543
1544 /*
1545 * Return the MAC hast as described above.
1546 */
slic_mcast_get_mac_hash(char * macaddr)1547 static unsigned char slic_mcast_get_mac_hash(char *macaddr)
1548 {
1549 u32 crc;
1550 char *p;
1551 int i;
1552 unsigned char machash = 0;
1553
1554 if (!slic_crc_init) {
1555 slic_mcast_init_crc32();
1556 slic_crc_init = 1;
1557 }
1558
1559 crc = 0xFFFFFFFF; /* Preload shift register, per crc-32 spec */
1560 for (i = 0, p = macaddr; i < 6; ++p, ++i)
1561 crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
1562
1563 /* Return bits 1-8, transposed */
1564 for (i = 1; i < 9; i++)
1565 machash |= (((crc >> i) & 1) << (8 - i));
1566
1567 return machash;
1568 }
1569
slic_mcast_set_bit(struct adapter * adapter,char * address)1570 static void slic_mcast_set_bit(struct adapter *adapter, char *address)
1571 {
1572 unsigned char crcpoly;
1573
1574 /* Get the CRC polynomial for the mac address */
1575 crcpoly = slic_mcast_get_mac_hash(address);
1576
1577 /* We only have space on the SLIC for 64 entries. Lop
1578 * off the top two bits. (2^6 = 64)
1579 */
1580 crcpoly &= 0x3F;
1581
1582 /* OR in the new bit into our 64 bit mask. */
1583 adapter->mcastmask |= (u64) 1 << crcpoly;
1584 }
1585
slic_mcast_set_list(struct net_device * dev)1586 static void slic_mcast_set_list(struct net_device *dev)
1587 {
1588 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
1589 int status = STATUS_SUCCESS;
1590 int i;
1591 char *addresses;
1592 struct dev_mc_list *mc_list = dev->mc_list;
1593 int mc_count = dev->mc_count;
1594
1595 ASSERT(adapter);
1596
1597 for (i = 1; i <= mc_count; i++) {
1598 addresses = (char *) &mc_list->dmi_addr;
1599 if (mc_list->dmi_addrlen == 6) {
1600 status = slic_mcast_add_list(adapter, addresses);
1601 if (status != STATUS_SUCCESS)
1602 break;
1603 } else {
1604 status = -EINVAL;
1605 break;
1606 }
1607 slic_mcast_set_bit(adapter, addresses);
1608 mc_list = mc_list->next;
1609 }
1610
1611 DBG_MSG("%s a->devflags_prev[%x] dev->flags[%x] status[%x]\n",
1612 __func__, adapter->devflags_prev, dev->flags, status);
1613 if (adapter->devflags_prev != dev->flags) {
1614 adapter->macopts = MAC_DIRECTED;
1615 if (dev->flags) {
1616 if (dev->flags & IFF_BROADCAST)
1617 adapter->macopts |= MAC_BCAST;
1618 if (dev->flags & IFF_PROMISC)
1619 adapter->macopts |= MAC_PROMISC;
1620 if (dev->flags & IFF_ALLMULTI)
1621 adapter->macopts |= MAC_ALLMCAST;
1622 if (dev->flags & IFF_MULTICAST)
1623 adapter->macopts |= MAC_MCAST;
1624 }
1625 adapter->devflags_prev = dev->flags;
1626 DBG_MSG("%s call slic_config_set adapter->macopts[%x]\n",
1627 __func__, adapter->macopts);
1628 slic_config_set(adapter, TRUE);
1629 } else {
1630 if (status == STATUS_SUCCESS)
1631 slic_mcast_set_mask(adapter);
1632 }
1633 return;
1634 }
1635
slic_mcast_set_mask(struct adapter * adapter)1636 static void slic_mcast_set_mask(struct adapter *adapter)
1637 {
1638 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1639
1640 DBG_MSG("%s ENTER (%s) macopts[%x] mask[%llx]\n", __func__,
1641 adapter->netdev->name, (uint) adapter->macopts,
1642 adapter->mcastmask);
1643
1644 if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
1645 /* Turn on all multicast addresses. We have to do this for
1646 * promiscuous mode as well as ALLMCAST mode. It saves the
1647 * Microcode from having to keep state about the MAC
1648 * configuration.
1649 */
1650 /* DBG_MSG("slicoss: %s macopts = MAC_ALLMCAST | MAC_PROMISC\n\
1651 SLUT MODE!!!\n",__func__); */
1652 WRITE_REG(slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
1653 WRITE_REG(slic_regs->slic_mcasthigh, 0xFFFFFFFF, FLUSH);
1654 /* DBG_MSG("%s (%s) WRITE to slic_regs slic_mcastlow&high 0xFFFFFFFF\n",
1655 _func__, adapter->netdev->name); */
1656 } else {
1657 /* Commit our multicast mast to the SLIC by writing to the
1658 * multicast address mask registers
1659 */
1660 DBG_MSG("%s (%s) WRITE mcastlow[%x] mcasthigh[%x]\n",
1661 __func__, adapter->netdev->name,
1662 ((ulong) (adapter->mcastmask & 0xFFFFFFFF)),
1663 ((ulong) ((adapter->mcastmask >> 32) & 0xFFFFFFFF)));
1664
1665 WRITE_REG(slic_regs->slic_mcastlow,
1666 (u32) (adapter->mcastmask & 0xFFFFFFFF), FLUSH);
1667 WRITE_REG(slic_regs->slic_mcasthigh,
1668 (u32) ((adapter->mcastmask >> 32) & 0xFFFFFFFF),
1669 FLUSH);
1670 }
1671 }
1672
slic_timer_ping(ulong dev)1673 static void slic_timer_ping(ulong dev)
1674 {
1675 struct adapter *adapter;
1676 struct sliccard *card;
1677
1678 ASSERT(dev);
1679 adapter = netdev_priv((struct net_device *)dev);
1680 ASSERT(adapter);
1681 card = adapter->card;
1682 ASSERT(card);
1683 #if !SLIC_DUMP_ENABLED
1684 /*#if SLIC_DUMP_ENABLED*/
1685 if ((adapter->state == ADAPT_UP) && (card->state == CARD_UP)) {
1686 int status;
1687
1688 if (card->pingstatus != ISR_PINGMASK) {
1689 if (errormsg++ < 5) {
1690 DBG_MSG
1691 ("%s (%s) CARD HAS CRASHED PING_status == \
1692 %x ERRORMSG# %d\n",
1693 __func__, adapter->netdev->name,
1694 card->pingstatus, errormsg);
1695 }
1696 /* ASSERT(card->pingstatus == ISR_PINGMASK); */
1697 } else {
1698 if (goodmsg++ < 5) {
1699 DBG_MSG
1700 ("slicoss: %s (%s) PING_status == %x \
1701 GOOD!!!!!!!! msg# %d\n",
1702 __func__, adapter->netdev->name,
1703 card->pingstatus, errormsg);
1704 }
1705 }
1706 card->pingstatus = 0;
1707 status = slic_upr_request(adapter, SLIC_UPR_PING, 0, 0, 0, 0);
1708
1709 ASSERT(status == 0);
1710 } else {
1711 DBG_MSG("slicoss %s (%s) adapter[%p] NOT UP!!!!\n",
1712 __func__, adapter->netdev->name, adapter);
1713 }
1714 #endif
1715 adapter->pingtimer.expires =
1716 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1717 add_timer(&adapter->pingtimer);
1718 }
1719
slic_if_stop_queue(struct adapter * adapter)1720 static void slic_if_stop_queue(struct adapter *adapter)
1721 {
1722 netif_stop_queue(adapter->netdev);
1723 }
1724
slic_if_start_queue(struct adapter * adapter)1725 static void slic_if_start_queue(struct adapter *adapter)
1726 {
1727 netif_start_queue(adapter->netdev);
1728 }
1729
1730 /*
1731 * slic_if_init
1732 *
1733 * Perform initialization of our slic interface.
1734 *
1735 */
slic_if_init(struct adapter * adapter)1736 static int slic_if_init(struct adapter *adapter)
1737 {
1738 struct sliccard *card = adapter->card;
1739 struct net_device *dev = adapter->netdev;
1740 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
1741 struct slic_shmem *pshmem;
1742 int status = 0;
1743
1744 ASSERT(card);
1745 DBG_MSG("slicoss: %s (%s) ENTER states[%d:%d:%d:%d] flags[%x]\n",
1746 __func__, adapter->netdev->name,
1747 adapter->queues_initialized, adapter->state, adapter->linkstate,
1748 card->state, dev->flags);
1749
1750 /* adapter should be down at this point */
1751 if (adapter->state != ADAPT_DOWN) {
1752 DBG_ERROR("slic_if_init adapter->state != ADAPT_DOWN\n");
1753 return -EIO;
1754 }
1755 ASSERT(adapter->linkstate == LINK_DOWN);
1756
1757 adapter->devflags_prev = dev->flags;
1758 adapter->macopts = MAC_DIRECTED;
1759 if (dev->flags) {
1760 DBG_MSG("slicoss: %s (%s) Set MAC options: ", __func__,
1761 adapter->netdev->name);
1762 if (dev->flags & IFF_BROADCAST) {
1763 adapter->macopts |= MAC_BCAST;
1764 DBG_MSG("BCAST ");
1765 }
1766 if (dev->flags & IFF_PROMISC) {
1767 adapter->macopts |= MAC_PROMISC;
1768 DBG_MSG("PROMISC ");
1769 }
1770 if (dev->flags & IFF_ALLMULTI) {
1771 adapter->macopts |= MAC_ALLMCAST;
1772 DBG_MSG("ALL_MCAST ");
1773 }
1774 if (dev->flags & IFF_MULTICAST) {
1775 adapter->macopts |= MAC_MCAST;
1776 DBG_MSG("MCAST ");
1777 }
1778 DBG_MSG("\n");
1779 }
1780 status = slic_adapter_allocresources(adapter);
1781 if (status != STATUS_SUCCESS) {
1782 DBG_ERROR
1783 ("slic_if_init: slic_adapter_allocresources FAILED %x\n",
1784 status);
1785 slic_adapter_freeresources(adapter);
1786 return status;
1787 }
1788
1789 if (!adapter->queues_initialized) {
1790 DBG_MSG("slicoss: %s call slic_rspqueue_init\n", __func__);
1791 if (slic_rspqueue_init(adapter))
1792 return -ENOMEM;
1793 DBG_MSG
1794 ("slicoss: %s call slic_cmdq_init adapter[%p] port %d \n",
1795 __func__, adapter, adapter->port);
1796 if (slic_cmdq_init(adapter))
1797 return -ENOMEM;
1798 DBG_MSG
1799 ("slicoss: %s call slic_rcvqueue_init adapter[%p] \
1800 port %d \n", __func__, adapter, adapter->port);
1801 if (slic_rcvqueue_init(adapter))
1802 return -ENOMEM;
1803 adapter->queues_initialized = 1;
1804 }
1805 DBG_MSG("slicoss: %s disable interrupts(slic)\n", __func__);
1806
1807 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
1808 mdelay(1);
1809
1810 if (!adapter->isp_initialized) {
1811 pshmem = (struct slic_shmem *)adapter->phys_shmem;
1812
1813 spin_lock_irqsave(&adapter->bit64reglock.lock,
1814 adapter->bit64reglock.flags);
1815
1816 #if defined(CONFIG_X86_64)
1817 WRITE_REG(slic_regs->slic_addr_upper,
1818 SLIC_GET_ADDR_HIGH(&pshmem->isr), DONT_FLUSH);
1819 WRITE_REG(slic_regs->slic_isp,
1820 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
1821 #elif defined(CONFIG_X86)
1822 WRITE_REG(slic_regs->slic_addr_upper, (u32) 0, DONT_FLUSH);
1823 WRITE_REG(slic_regs->slic_isp, (u32) &pshmem->isr, FLUSH);
1824 #else
1825 Stop Compilations
1826 #endif
1827 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
1828 adapter->bit64reglock.flags);
1829 adapter->isp_initialized = 1;
1830 }
1831
1832 adapter->state = ADAPT_UP;
1833 if (!card->loadtimerset) {
1834 init_timer(&card->loadtimer);
1835 card->loadtimer.expires =
1836 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
1837 card->loadtimer.data = (ulong) card;
1838 card->loadtimer.function = &slic_timer_load_check;
1839 add_timer(&card->loadtimer);
1840
1841 card->loadtimerset = 1;
1842 }
1843 #if SLIC_GET_STATS_TIMER_ENABLED
1844 if (!adapter->statstimerset) {
1845 DBG_MSG("slicoss: %s start getstats_timer(slic)\n",
1846 __func__);
1847 init_timer(&adapter->statstimer);
1848 adapter->statstimer.expires =
1849 jiffies + SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
1850 adapter->statstimer.data = (ulong) adapter->netdev;
1851 adapter->statstimer.function = &slic_timer_get_stats;
1852 add_timer(&adapter->statstimer);
1853 adapter->statstimerset = 1;
1854 }
1855 #endif
1856 #if !SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED
1857 /*#if SLIC_DUMP_ENABLED && SLIC_PING_TIMER_ENABLED*/
1858 if (!adapter->pingtimerset) {
1859 DBG_MSG("slicoss: %s start card_ping_timer(slic)\n",
1860 __func__);
1861 init_timer(&adapter->pingtimer);
1862 adapter->pingtimer.expires =
1863 jiffies + SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
1864 adapter->pingtimer.data = (ulong) dev;
1865 adapter->pingtimer.function = &slic_timer_ping;
1866 add_timer(&adapter->pingtimer);
1867 adapter->pingtimerset = 1;
1868 adapter->card->pingstatus = ISR_PINGMASK;
1869 }
1870 #endif
1871
1872 /*
1873 * clear any pending events, then enable interrupts
1874 */
1875 DBG_MSG("slicoss: %s ENABLE interrupts(slic)\n", __func__);
1876 adapter->isrcopy = 0;
1877 adapter->pshmem->isr = 0;
1878 WRITE_REG(slic_regs->slic_isr, 0, FLUSH);
1879 WRITE_REG(slic_regs->slic_icr, ICR_INT_ON, FLUSH);
1880
1881 DBG_MSG("slicoss: %s call slic_link_config(slic)\n", __func__);
1882 slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD);
1883 slic_link_event_handler(adapter);
1884
1885 DBG_MSG("slicoss: %s EXIT\n", __func__);
1886 return STATUS_SUCCESS;
1887 }
1888
slic_unmap_mmio_space(struct adapter * adapter)1889 static void slic_unmap_mmio_space(struct adapter *adapter)
1890 {
1891 #if LINUX_FREES_ADAPTER_RESOURCES
1892 if (adapter->slic_regs)
1893 iounmap(adapter->slic_regs);
1894 adapter->slic_regs = NULL;
1895 #endif
1896 }
1897
slic_adapter_allocresources(struct adapter * adapter)1898 static int slic_adapter_allocresources(struct adapter *adapter)
1899 {
1900 if (!adapter->intrregistered) {
1901 int retval;
1902
1903 DBG_MSG
1904 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1905 phys_shmem[%p] dev->irq[%x] %x\n",
1906 __func__, adapter, adapter->pshmem,
1907 (void *)adapter->phys_shmem, adapter->netdev->irq,
1908 NR_IRQS);
1909
1910 spin_unlock_irqrestore(&slic_global.driver_lock.lock,
1911 slic_global.driver_lock.flags);
1912
1913 retval = request_irq(adapter->netdev->irq,
1914 &slic_interrupt,
1915 IRQF_SHARED,
1916 adapter->netdev->name, adapter->netdev);
1917
1918 spin_lock_irqsave(&slic_global.driver_lock.lock,
1919 slic_global.driver_lock.flags);
1920
1921 if (retval) {
1922 DBG_ERROR("slicoss: request_irq (%s) FAILED [%x]\n",
1923 adapter->netdev->name, retval);
1924 return retval;
1925 }
1926 adapter->intrregistered = 1;
1927 DBG_MSG
1928 ("slicoss: %s AllocAdaptRsrcs adapter[%p] shmem[%p] \
1929 pshmem[%p] dev->irq[%x]\n",
1930 __func__, adapter, adapter->pshmem,
1931 (void *)adapter->pshmem, adapter->netdev->irq);
1932 }
1933 return STATUS_SUCCESS;
1934 }
1935
slic_config_pci(struct pci_dev * pcidev)1936 static void slic_config_pci(struct pci_dev *pcidev)
1937 {
1938 u16 pci_command;
1939 u16 new_command;
1940
1941 pci_read_config_word(pcidev, PCI_COMMAND, &pci_command);
1942 DBG_MSG("slicoss: %s PCI command[%4.4x]\n", __func__, pci_command);
1943
1944 new_command = pci_command | PCI_COMMAND_MASTER
1945 | PCI_COMMAND_MEMORY
1946 | PCI_COMMAND_INVALIDATE
1947 | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK;
1948 if (pci_command != new_command) {
1949 DBG_MSG("%s -- Updating PCI COMMAND register %4.4x->%4.4x.\n",
1950 __func__, pci_command, new_command);
1951 pci_write_config_word(pcidev, PCI_COMMAND, new_command);
1952 }
1953 }
1954
slic_adapter_freeresources(struct adapter * adapter)1955 static void slic_adapter_freeresources(struct adapter *adapter)
1956 {
1957 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
1958 slic_init_cleanup(adapter);
1959 memset(&adapter->stats, 0, sizeof(struct net_device_stats));
1960 adapter->error_interrupts = 0;
1961 adapter->rcv_interrupts = 0;
1962 adapter->xmit_interrupts = 0;
1963 adapter->linkevent_interrupts = 0;
1964 adapter->upr_interrupts = 0;
1965 adapter->num_isrs = 0;
1966 adapter->xmit_completes = 0;
1967 adapter->rcv_broadcasts = 0;
1968 adapter->rcv_multicasts = 0;
1969 adapter->rcv_unicasts = 0;
1970 DBG_MSG("slicoss: %s EXIT\n", __func__);
1971 }
1972
1973 /*
1974 * slic_link_config
1975 *
1976 * Write phy control to configure link duplex/speed
1977 *
1978 */
slic_link_config(struct adapter * adapter,u32 linkspeed,u32 linkduplex)1979 static void slic_link_config(struct adapter *adapter,
1980 u32 linkspeed, u32 linkduplex)
1981 {
1982 u32 speed;
1983 u32 duplex;
1984 u32 phy_config;
1985 u32 phy_advreg;
1986 u32 phy_gctlreg;
1987
1988 if (adapter->state != ADAPT_UP) {
1989 DBG_MSG
1990 ("%s (%s) ADAPT Not up yet, Return! speed[%x] duplex[%x]\n",
1991 __func__, adapter->netdev->name, linkspeed,
1992 linkduplex);
1993 return;
1994 }
1995 DBG_MSG("slicoss: %s (%s) slic_link_config: speed[%x] duplex[%x]\n",
1996 __func__, adapter->netdev->name, linkspeed, linkduplex);
1997
1998 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1999 || (adapter->devid == SLIC_2GB_DEVICE_ID));
2000
2001 if (linkspeed > LINK_1000MB)
2002 linkspeed = LINK_AUTOSPEED;
2003 if (linkduplex > LINK_AUTOD)
2004 linkduplex = LINK_AUTOD;
2005
2006 if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
2007 if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
2008 /* We've got a fiber gigabit interface, and register
2009 * 4 is different in fiber mode than in copper mode
2010 */
2011
2012 /* advertise FD only @1000 Mb */
2013 phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
2014 /* enable PAUSE frames */
2015 phy_advreg |= PAR_ASYMPAUSE_FIBER;
2016 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2017 FLUSH);
2018
2019 if (linkspeed == LINK_AUTOSPEED) {
2020 /* reset phy, enable auto-neg */
2021 phy_config =
2022 (MIICR_REG_PCR |
2023 (PCR_RESET | PCR_AUTONEG |
2024 PCR_AUTONEG_RST));
2025 WRITE_REG(adapter->slic_regs->slic_wphy,
2026 phy_config, FLUSH);
2027 } else { /* forced 1000 Mb FD*/
2028 /* power down phy to break link
2029 this may not work) */
2030 phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
2031 WRITE_REG(adapter->slic_regs->slic_wphy,
2032 phy_config, FLUSH);
2033 /* wait, Marvell says 1 sec,
2034 try to get away with 10 ms */
2035 mdelay(10);
2036
2037 /* disable auto-neg, set speed/duplex,
2038 soft reset phy, powerup */
2039 phy_config =
2040 (MIICR_REG_PCR |
2041 (PCR_RESET | PCR_SPEED_1000 |
2042 PCR_DUPLEX_FULL));
2043 WRITE_REG(adapter->slic_regs->slic_wphy,
2044 phy_config, FLUSH);
2045 }
2046 } else { /* copper gigabit */
2047
2048 /* Auto-Negotiate or 1000 Mb must be auto negotiated
2049 * We've got a copper gigabit interface, and
2050 * register 4 is different in copper mode than
2051 * in fiber mode
2052 */
2053 if (linkspeed == LINK_AUTOSPEED) {
2054 /* advertise 10/100 Mb modes */
2055 phy_advreg =
2056 (MIICR_REG_4 |
2057 (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
2058 | PAR_ADV10HD));
2059 } else {
2060 /* linkspeed == LINK_1000MB -
2061 don't advertise 10/100 Mb modes */
2062 phy_advreg = MIICR_REG_4;
2063 }
2064 /* enable PAUSE frames */
2065 phy_advreg |= PAR_ASYMPAUSE;
2066 /* required by the Cicada PHY */
2067 phy_advreg |= PAR_802_3;
2068 WRITE_REG(adapter->slic_regs->slic_wphy, phy_advreg,
2069 FLUSH);
2070 /* advertise FD only @1000 Mb */
2071 phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
2072 WRITE_REG(adapter->slic_regs->slic_wphy, phy_gctlreg,
2073 FLUSH);
2074
2075 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2076 /* if a Marvell PHY
2077 enable auto crossover */
2078 phy_config =
2079 (MIICR_REG_16 | (MRV_REG16_XOVERON));
2080 WRITE_REG(adapter->slic_regs->slic_wphy,
2081 phy_config, FLUSH);
2082
2083 /* reset phy, enable auto-neg */
2084 phy_config =
2085 (MIICR_REG_PCR |
2086 (PCR_RESET | PCR_AUTONEG |
2087 PCR_AUTONEG_RST));
2088 WRITE_REG(adapter->slic_regs->slic_wphy,
2089 phy_config, FLUSH);
2090 } else { /* it's a Cicada PHY */
2091 /* enable and restart auto-neg (don't reset) */
2092 phy_config =
2093 (MIICR_REG_PCR |
2094 (PCR_AUTONEG | PCR_AUTONEG_RST));
2095 WRITE_REG(adapter->slic_regs->slic_wphy,
2096 phy_config, FLUSH);
2097 }
2098 }
2099 } else {
2100 /* Forced 10/100 */
2101 if (linkspeed == LINK_10MB)
2102 speed = 0;
2103 else
2104 speed = PCR_SPEED_100;
2105 if (linkduplex == LINK_HALFD)
2106 duplex = 0;
2107 else
2108 duplex = PCR_DUPLEX_FULL;
2109
2110 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2111 /* if a Marvell PHY
2112 disable auto crossover */
2113 phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
2114 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2115 FLUSH);
2116 }
2117
2118 /* power down phy to break link (this may not work) */
2119 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
2120 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config, FLUSH);
2121
2122 /* wait, Marvell says 1 sec, try to get away with 10 ms */
2123 mdelay(10);
2124
2125 if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
2126 /* if a Marvell PHY
2127 disable auto-neg, set speed,
2128 soft reset phy, powerup */
2129 phy_config =
2130 (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
2131 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2132 FLUSH);
2133 } else { /* it's a Cicada PHY */
2134 /* disable auto-neg, set speed, powerup */
2135 phy_config = (MIICR_REG_PCR | (speed | duplex));
2136 WRITE_REG(adapter->slic_regs->slic_wphy, phy_config,
2137 FLUSH);
2138 }
2139 }
2140
2141 DBG_MSG
2142 ("slicoss: %s (%s) EXIT slic_link_config : state[%d] \
2143 phy_config[%x]\n", __func__, adapter->netdev->name, adapter->state,
2144 phy_config);
2145 }
2146
slic_card_cleanup(struct sliccard * card)2147 static void slic_card_cleanup(struct sliccard *card)
2148 {
2149 DBG_MSG("slicoss: %s ENTER\n", __func__);
2150
2151 #if SLIC_DUMP_ENABLED
2152 if (card->dumpbuffer) {
2153 card->dumpbuffer_phys = 0;
2154 card->dumpbuffer_physl = 0;
2155 card->dumpbuffer_physh = 0;
2156 kfree(card->dumpbuffer);
2157 card->dumpbuffer = NULL;
2158 }
2159 if (card->cmdbuffer) {
2160 card->cmdbuffer_phys = 0;
2161 card->cmdbuffer_physl = 0;
2162 card->cmdbuffer_physh = 0;
2163 kfree(card->cmdbuffer);
2164 card->cmdbuffer = NULL;
2165 }
2166 #endif
2167
2168 if (card->loadtimerset) {
2169 card->loadtimerset = 0;
2170 del_timer(&card->loadtimer);
2171 }
2172
2173 slic_debug_card_destroy(card);
2174
2175 kfree(card);
2176 DBG_MSG("slicoss: %s EXIT\n", __func__);
2177 }
2178
slic_card_download_gbrcv(struct adapter * adapter)2179 static int slic_card_download_gbrcv(struct adapter *adapter)
2180 {
2181 const struct firmware *fw;
2182 const char *file = "";
2183 int ret;
2184 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2185 u32 codeaddr;
2186 unsigned char *instruction = NULL;
2187 u32 rcvucodelen = 0;
2188
2189 switch (adapter->devid) {
2190 case SLIC_2GB_DEVICE_ID:
2191 file = "oasis_rcv.bin";
2192 break;
2193 case SLIC_1GB_DEVICE_ID:
2194 file = "gb_rcv.bin";
2195 break;
2196 default:
2197 ASSERT(0);
2198 break;
2199 }
2200
2201 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
2202 if (ret) {
2203 printk(KERN_ERR "SLICOSS: Failed to load firmware %s\n", file);
2204 return ret;
2205 }
2206
2207 instruction = (unsigned char *)fw->data;
2208 rcvucodelen = fw->size;
2209 switch (adapter->devid) {
2210 case SLIC_2GB_DEVICE_ID:
2211 if (rcvucodelen != OasisRcvUCodeLen)
2212 return -EINVAL;
2213 break;
2214 case SLIC_1GB_DEVICE_ID:
2215 if (rcvucodelen != GBRcvUCodeLen)
2216 return -EINVAL;
2217 break;
2218 default:
2219 ASSERT(0);
2220 break;
2221 }
2222
2223 /* start download */
2224 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
2225
2226 /* download the rcv sequencer ucode */
2227 for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
2228 /* write out instruction address */
2229 WRITE_REG(slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
2230
2231 /* write out the instruction data low addr */
2232 WRITE_REG(slic_regs->slic_rcv_wcs,
2233 (u32) *(u32 *) instruction, FLUSH);
2234 instruction += 4;
2235
2236 /* write out the instruction data high addr */
2237 WRITE_REG(slic_regs->slic_rcv_wcs, (u32) *instruction,
2238 FLUSH);
2239 instruction += 1;
2240 }
2241
2242 /* download finished */
2243 release_firmware(fw);
2244 WRITE_REG(slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
2245 return 0;
2246 }
2247
slic_card_download(struct adapter * adapter)2248 static int slic_card_download(struct adapter *adapter)
2249 {
2250 const struct firmware *fw;
2251 const char *file = "";
2252 int ret;
2253 u32 section;
2254 int thissectionsize;
2255 int codeaddr;
2256 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2257 u32 *instruction = NULL;
2258 u32 *lastinstruct = NULL;
2259 u32 *startinstruct = NULL;
2260 unsigned char *nextinstruct;
2261 u32 baseaddress;
2262 u32 failure;
2263 u32 i;
2264 u32 numsects = 0;
2265 u32 sectsize[3];
2266 u32 sectstart[3];
2267
2268 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x] \
2269 jiffies[%lx] cpu %d\n", __func__, adapter->netdev->name, adapter,
2270 adapter->card, adapter->devid,jiffies, smp_processor_id()); */
2271
2272 switch (adapter->devid) {
2273 case SLIC_2GB_DEVICE_ID:
2274 /* DBG_MSG ("slicoss: %s devid==SLIC_2GB_DEVICE_ID sections[%x]\n",
2275 __func__, (uint) ONumSections); */
2276 file = "slic_oasis.bin";
2277 numsects = ONumSections;
2278 for (i = 0; i < numsects; i++) {
2279 sectsize[i] = OSectionSize[i];
2280 sectstart[i] = OSectionStart[i];
2281 }
2282 break;
2283 case SLIC_1GB_DEVICE_ID:
2284 /* DBG_MSG ("slicoss: %s devid==SLIC_1GB_DEVICE_ID sections[%x]\n",
2285 __func__, (uint) MNumSections); */
2286 file = "slic_mojave.bin";
2287 numsects = MNumSections;
2288 for (i = 0; i < numsects; i++) {
2289 sectsize[i] = MSectionSize[i];
2290 sectstart[i] = MSectionStart[i];
2291 }
2292 break;
2293 default:
2294 ASSERT(0);
2295 break;
2296 }
2297 ret = request_firmware(&fw, file, &adapter->pcidev->dev);
2298 if (ret) {
2299 printk(KERN_ERR "SLICOSS: Failed to load firmware %s\n", file);
2300 return ret;
2301 }
2302
2303 ASSERT(numsects <= 3);
2304
2305 for (section = 0; section < numsects; section++) {
2306 switch (adapter->devid) {
2307 case SLIC_2GB_DEVICE_ID:
2308 instruction = (u32 *)(fw->data + (SECTION_SIZE *
2309 section));
2310 baseaddress = sectstart[section];
2311 thissectionsize = sectsize[section] >> 3;
2312 lastinstruct =
2313 (u32 *)(fw->data + (SECTION_SIZE * section) +
2314 sectsize[section] - 8);
2315 break;
2316 case SLIC_1GB_DEVICE_ID:
2317 instruction = (u32 *)(fw->data + (SECTION_SIZE *
2318 section));
2319 baseaddress = sectstart[section];
2320 thissectionsize = sectsize[section] >> 3;
2321 lastinstruct =
2322 (u32 *)(fw->data + (SECTION_SIZE * section) +
2323 sectsize[section] - 8);
2324 break;
2325 default:
2326 ASSERT(0);
2327 break;
2328 }
2329
2330 baseaddress = sectstart[section];
2331 thissectionsize = sectsize[section] >> 3;
2332
2333 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2334 startinstruct = instruction;
2335 nextinstruct = ((unsigned char *)instruction) + 8;
2336 /* Write out instruction address */
2337 WRITE_REG(slic_regs->slic_wcs, baseaddress + codeaddr,
2338 FLUSH);
2339 /* Write out instruction to low addr */
2340 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2341 #ifdef CONFIG_X86_64
2342 instruction = (u32 *)((unsigned char *)instruction + 4);
2343 #else
2344 instruction++;
2345 #endif
2346 /* Write out instruction to high addr */
2347 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2348 #ifdef CONFIG_X86_64
2349 instruction = (u32 *)((unsigned char *)instruction + 4);
2350 #else
2351 instruction++;
2352 #endif
2353 }
2354 }
2355
2356 for (section = 0; section < numsects; section++) {
2357 switch (adapter->devid) {
2358 case SLIC_2GB_DEVICE_ID:
2359 instruction = (u32 *)fw->data + (SECTION_SIZE *
2360 section);
2361 break;
2362 case SLIC_1GB_DEVICE_ID:
2363 instruction = (u32 *)fw->data + (SECTION_SIZE *
2364 section);
2365 break;
2366 default:
2367 ASSERT(0);
2368 break;
2369 }
2370
2371 baseaddress = sectstart[section];
2372 if (baseaddress < 0x8000)
2373 continue;
2374 thissectionsize = sectsize[section] >> 3;
2375
2376 /* DBG_MSG ("slicoss: COMPARE secton[%x] baseaddr[%x] sectnsize[%x]\n",
2377 (uint)section,baseaddress,thissectionsize);*/
2378
2379 for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
2380 /* Write out instruction address */
2381 WRITE_REG(slic_regs->slic_wcs,
2382 SLIC_WCS_COMPARE | (baseaddress + codeaddr),
2383 FLUSH);
2384 /* Write out instruction to low addr */
2385 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2386 #ifdef CONFIG_X86_64
2387 instruction = (u32 *)((unsigned char *)instruction + 4);
2388 #else
2389 instruction++;
2390 #endif
2391 /* Write out instruction to high addr */
2392 WRITE_REG(slic_regs->slic_wcs, *instruction, FLUSH);
2393 #ifdef CONFIG_X86_64
2394 instruction = (u32 *)((unsigned char *)instruction + 4);
2395 #else
2396 instruction++;
2397 #endif
2398 /* Check SRAM location zero. If it is non-zero. Abort.*/
2399 failure = readl((u32 __iomem *)&slic_regs->slic_reset);
2400 if (failure) {
2401 DBG_MSG
2402 ("slicoss: %s FAILURE EXIT codeaddr[%x] \
2403 thissectionsize[%x] failure[%x]\n",
2404 __func__, codeaddr, thissectionsize,
2405 failure);
2406 release_firmware(fw);
2407 return -EIO;
2408 }
2409 }
2410 }
2411 /* DBG_MSG ("slicoss: Compare done\n");*/
2412 release_firmware(fw);
2413 /* Everything OK, kick off the card */
2414 mdelay(10);
2415 WRITE_REG(slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
2416
2417 /* stall for 20 ms, long enough for ucode to init card
2418 and reach mainloop */
2419 mdelay(20);
2420
2421 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p] card[%p]\n",
2422 __func__, adapter->netdev->name, adapter, adapter->card);
2423
2424 return STATUS_SUCCESS;
2425 }
2426
slic_adapter_set_hwaddr(struct adapter * adapter)2427 static void slic_adapter_set_hwaddr(struct adapter *adapter)
2428 {
2429 struct sliccard *card = adapter->card;
2430
2431 /* DBG_MSG ("%s ENTER card->config_set[%x] port[%d] physport[%d] funct#[%d]\n",
2432 __func__, card->config_set, adapter->port, adapter->physport,
2433 adapter->functionnumber);
2434
2435 slic_dbg_macaddrs(adapter); */
2436
2437 if ((adapter->card) && (card->config_set)) {
2438 memcpy(adapter->macaddr,
2439 card->config.MacInfo[adapter->functionnumber].macaddrA,
2440 sizeof(struct slic_config_mac));
2441 /* DBG_MSG ("%s AFTER copying from config.macinfo into currmacaddr\n",
2442 __func__);
2443 slic_dbg_macaddrs(adapter);*/
2444 if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
2445 adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
2446 adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
2447 memcpy(adapter->currmacaddr, adapter->macaddr, 6);
2448 }
2449 if (adapter->netdev) {
2450 memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
2451 6);
2452 }
2453 }
2454 /* DBG_MSG ("%s EXIT port %d\n", __func__, adapter->port);
2455 slic_dbg_macaddrs(adapter); */
2456 }
2457
slic_intagg_set(struct adapter * adapter,u32 value)2458 static void slic_intagg_set(struct adapter *adapter, u32 value)
2459 {
2460 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2461
2462 WRITE_REG(slic_regs->slic_intagg, value, FLUSH);
2463 adapter->card->loadlevel_current = value;
2464 }
2465
slic_card_init(struct sliccard * card,struct adapter * adapter)2466 static int slic_card_init(struct sliccard *card, struct adapter *adapter)
2467 {
2468 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2469 struct slic_eeprom *peeprom;
2470 struct oslic_eeprom *pOeeprom;
2471 dma_addr_t phys_config;
2472 u32 phys_configh;
2473 u32 phys_configl;
2474 u32 i = 0;
2475 struct slic_shmem *pshmem;
2476 int status;
2477 uint macaddrs = card->card_size;
2478 ushort eecodesize;
2479 ushort dramsize;
2480 ushort ee_chksum;
2481 ushort calc_chksum;
2482 struct slic_config_mac *pmac;
2483 unsigned char fruformat;
2484 unsigned char oemfruformat;
2485 struct atk_fru *patkfru;
2486 union oemfru *poemfru;
2487
2488 DBG_MSG
2489 ("slicoss: %s ENTER card[%p] adapter[%p] card->state[%x] \
2490 size[%d]\n", __func__, card, adapter, card->state, card->card_size);
2491
2492 /* Reset everything except PCI configuration space */
2493 slic_soft_reset(adapter);
2494
2495 /* Download the microcode */
2496 status = slic_card_download(adapter);
2497
2498 if (status != STATUS_SUCCESS) {
2499 DBG_ERROR("SLIC download failed bus %d slot %d\n",
2500 (uint) adapter->busnumber,
2501 (uint) adapter->slotnumber);
2502 return status;
2503 }
2504
2505 if (!card->config_set) {
2506 peeprom = pci_alloc_consistent(adapter->pcidev,
2507 sizeof(struct slic_eeprom),
2508 &phys_config);
2509
2510 phys_configl = SLIC_GET_ADDR_LOW(phys_config);
2511 phys_configh = SLIC_GET_ADDR_HIGH(phys_config);
2512
2513 DBG_MSG("slicoss: %s Eeprom info adapter [%p]\n "
2514 "size [%x]\n peeprom [%p]\n "
2515 "phys_config [%p]\n phys_configl[%x]\n "
2516 "phys_configh[%x]\n",
2517 __func__, adapter,
2518 (u32)sizeof(struct slic_eeprom),
2519 peeprom, (void *) phys_config, phys_configl,
2520 phys_configh);
2521 if (!peeprom) {
2522 DBG_ERROR
2523 ("SLIC eeprom read failed to get memory bus %d \
2524 slot %d\n",
2525 (uint) adapter->busnumber,
2526 (uint) adapter->slotnumber);
2527 return -ENOMEM;
2528 } else {
2529 memset(peeprom, 0, sizeof(struct slic_eeprom));
2530 }
2531 WRITE_REG(slic_regs->slic_icr, ICR_INT_OFF, FLUSH);
2532 mdelay(1);
2533 pshmem = (struct slic_shmem *)adapter->phys_shmem;
2534
2535 spin_lock_irqsave(&adapter->bit64reglock.lock,
2536 adapter->bit64reglock.flags);
2537 WRITE_REG(slic_regs->slic_addr_upper, 0, DONT_FLUSH);
2538 WRITE_REG(slic_regs->slic_isp,
2539 SLIC_GET_ADDR_LOW(&pshmem->isr), FLUSH);
2540 spin_unlock_irqrestore(&adapter->bit64reglock.lock,
2541 adapter->bit64reglock.flags);
2542
2543 slic_config_get(adapter, phys_configl, phys_configh);
2544
2545 for (;;) {
2546 if (adapter->pshmem->isr) {
2547 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2548 __func__, adapter->pshmem,
2549 adapter->pshmem->isr);
2550
2551 if (adapter->pshmem->isr & ISR_UPC) {
2552 adapter->pshmem->isr = 0;
2553 WRITE_REG64(adapter,
2554 slic_regs->slic_isp,
2555 0,
2556 slic_regs->slic_addr_upper,
2557 0, FLUSH);
2558 WRITE_REG(slic_regs->slic_isr, 0,
2559 FLUSH);
2560
2561 slic_upr_request_complete(adapter, 0);
2562 break;
2563 } else {
2564 adapter->pshmem->isr = 0;
2565 WRITE_REG(slic_regs->slic_isr, 0,
2566 FLUSH);
2567 }
2568 } else {
2569 mdelay(1);
2570 i++;
2571 if (i > 5000) {
2572 DBG_ERROR
2573 ("SLIC: %d config data fetch timed\
2574 out!\n", adapter->port);
2575 DBG_MSG("%s shmem[%p] shmem->isr[%x]\n",
2576 __func__, adapter->pshmem,
2577 adapter->pshmem->isr);
2578 WRITE_REG64(adapter,
2579 slic_regs->slic_isp, 0,
2580 slic_regs->slic_addr_upper,
2581 0, FLUSH);
2582 return -EINVAL;
2583 }
2584 }
2585 }
2586
2587 switch (adapter->devid) {
2588 /* Oasis card */
2589 case SLIC_2GB_DEVICE_ID:
2590 /* extract EEPROM data and pointers to EEPROM data */
2591 pOeeprom = (struct oslic_eeprom *) peeprom;
2592 eecodesize = pOeeprom->EecodeSize;
2593 dramsize = pOeeprom->DramSize;
2594 pmac = pOeeprom->MacInfo;
2595 fruformat = pOeeprom->FruFormat;
2596 patkfru = &pOeeprom->AtkFru;
2597 oemfruformat = pOeeprom->OemFruFormat;
2598 poemfru = &pOeeprom->OemFru;
2599 macaddrs = 2;
2600 /* Minor kludge for Oasis card
2601 get 2 MAC addresses from the
2602 EEPROM to ensure that function 1
2603 gets the Port 1 MAC address */
2604 break;
2605 default:
2606 /* extract EEPROM data and pointers to EEPROM data */
2607 eecodesize = peeprom->EecodeSize;
2608 dramsize = peeprom->DramSize;
2609 pmac = peeprom->u2.mac.MacInfo;
2610 fruformat = peeprom->FruFormat;
2611 patkfru = &peeprom->AtkFru;
2612 oemfruformat = peeprom->OemFruFormat;
2613 poemfru = &peeprom->OemFru;
2614 break;
2615 }
2616
2617 card->config.EepromValid = FALSE;
2618
2619 /* see if the EEPROM is valid by checking it's checksum */
2620 if ((eecodesize <= MAX_EECODE_SIZE) &&
2621 (eecodesize >= MIN_EECODE_SIZE)) {
2622
2623 ee_chksum =
2624 *(u16 *) ((char *) peeprom + (eecodesize - 2));
2625 /*
2626 calculate the EEPROM checksum
2627 */
2628 calc_chksum =
2629 ~slic_eeprom_cksum((char *) peeprom,
2630 (eecodesize - 2));
2631 /*
2632 if the ucdoe chksum flag bit worked,
2633 we wouldn't need this shit
2634 */
2635 if (ee_chksum == calc_chksum)
2636 card->config.EepromValid = TRUE;
2637 }
2638 /* copy in the DRAM size */
2639 card->config.DramSize = dramsize;
2640
2641 /* copy in the MAC address(es) */
2642 for (i = 0; i < macaddrs; i++) {
2643 memcpy(&card->config.MacInfo[i],
2644 &pmac[i], sizeof(struct slic_config_mac));
2645 }
2646 /* DBG_MSG ("%s EEPROM Checksum Good? %d MacAddress\n",__func__,
2647 card->config.EepromValid); */
2648
2649 /* copy the Alacritech FRU information */
2650 card->config.FruFormat = fruformat;
2651 memcpy(&card->config.AtkFru, patkfru,
2652 sizeof(struct atk_fru));
2653
2654 pci_free_consistent(adapter->pcidev,
2655 sizeof(struct slic_eeprom),
2656 peeprom, phys_config);
2657 DBG_MSG
2658 ("slicoss: %s adapter%d [%p] size[%x] FREE peeprom[%p] \
2659 phys_config[%p]\n",
2660 __func__, adapter->port, adapter,
2661 (u32) sizeof(struct slic_eeprom), peeprom,
2662 (void *) phys_config);
2663
2664 if ((!card->config.EepromValid) &&
2665 (adapter->reg_params.fail_on_bad_eeprom)) {
2666 WRITE_REG64(adapter,
2667 slic_regs->slic_isp,
2668 0, slic_regs->slic_addr_upper, 0, FLUSH);
2669 DBG_ERROR
2670 ("unsupported CONFIGURATION EEPROM invalid\n");
2671 return -EINVAL;
2672 }
2673
2674 card->config_set = 1;
2675 }
2676
2677 if (slic_card_download_gbrcv(adapter)) {
2678 DBG_ERROR("%s unable to download GB receive microcode\n",
2679 __func__);
2680 return -EINVAL;
2681 }
2682
2683 if (slic_global.dynamic_intagg) {
2684 DBG_MSG
2685 ("Dynamic Interrupt Aggregation[ENABLED]: slic%d \
2686 SET intagg to %d\n",
2687 card->cardnum, 0);
2688 slic_intagg_set(adapter, 0);
2689 } else {
2690 slic_intagg_set(adapter, intagg_delay);
2691 DBG_MSG
2692 ("Dynamic Interrupt Aggregation[DISABLED]: slic%d \
2693 SET intagg to %d\n",
2694 card->cardnum, intagg_delay);
2695 }
2696
2697 /*
2698 * Initialize ping status to "ok"
2699 */
2700 card->pingstatus = ISR_PINGMASK;
2701
2702 #if SLIC_DUMP_ENABLED
2703 if (!card->dumpbuffer) {
2704 card->dumpbuffer = kmalloc(DUMP_PAGE_SIZE, GFP_ATOMIC);
2705
2706 ASSERT(card->dumpbuffer);
2707 if (card->dumpbuffer == NULL)
2708 return -ENOMEM;
2709 }
2710 /*
2711 * Smear the shared memory structure and then obtain
2712 * the PHYSICAL address of this structure
2713 */
2714 memset(card->dumpbuffer, 0, DUMP_PAGE_SIZE);
2715 card->dumpbuffer_phys = virt_to_bus(card->dumpbuffer);
2716 card->dumpbuffer_physh = SLIC_GET_ADDR_HIGH(card->dumpbuffer_phys);
2717 card->dumpbuffer_physl = SLIC_GET_ADDR_LOW(card->dumpbuffer_phys);
2718
2719 /*
2720 * Allocate COMMAND BUFFER
2721 */
2722 if (!card->cmdbuffer) {
2723 card->cmdbuffer = kmalloc(sizeof(struct dump_cmd), GFP_ATOMIC);
2724
2725 ASSERT(card->cmdbuffer);
2726 if (card->cmdbuffer == NULL)
2727 return -ENOMEM;
2728 }
2729 /*
2730 * Smear the shared memory structure and then obtain
2731 * the PHYSICAL address of this structure
2732 */
2733 memset(card->cmdbuffer, 0, sizeof(struct dump_cmd));
2734 card->cmdbuffer_phys = virt_to_bus(card->cmdbuffer);
2735 card->cmdbuffer_physh = SLIC_GET_ADDR_HIGH(card->cmdbuffer_phys);
2736 card->cmdbuffer_physl = SLIC_GET_ADDR_LOW(card->cmdbuffer_phys);
2737 #endif
2738
2739 /*
2740 * Lastly, mark our card state as up and return success
2741 */
2742 card->state = CARD_UP;
2743 card->reset_in_progress = 0;
2744 DBG_MSG("slicoss: %s EXIT card[%p] adapter[%p] card->state[%x]\n",
2745 __func__, card, adapter, card->state);
2746
2747 return STATUS_SUCCESS;
2748 }
2749
slic_card_locate(struct adapter * adapter)2750 static u32 slic_card_locate(struct adapter *adapter)
2751 {
2752 struct sliccard *card = slic_global.slic_card;
2753 struct physcard *physcard = slic_global.phys_card;
2754 ushort card_hostid;
2755 u16 __iomem *hostid_reg;
2756 uint i;
2757 uint rdhostid_offset = 0;
2758
2759 DBG_MSG("slicoss: %s adapter[%p] slot[%x] bus[%x] port[%x]\n",
2760 __func__, adapter, adapter->slotnumber, adapter->busnumber,
2761 adapter->port);
2762
2763 switch (adapter->devid) {
2764 case SLIC_2GB_DEVICE_ID:
2765 rdhostid_offset = SLIC_RDHOSTID_2GB;
2766 break;
2767 case SLIC_1GB_DEVICE_ID:
2768 rdhostid_offset = SLIC_RDHOSTID_1GB;
2769 break;
2770 default:
2771 ASSERT(0);
2772 break;
2773 }
2774
2775 hostid_reg =
2776 (u16 __iomem *) (((u8 __iomem *) (adapter->slic_regs)) +
2777 rdhostid_offset);
2778 DBG_MSG("slicoss: %s *hostid_reg[%p] == ", __func__, hostid_reg);
2779
2780 /* read the 16 bit hostid from SRAM */
2781 card_hostid = (ushort) readw(hostid_reg);
2782 DBG_MSG(" card_hostid[%x]\n", card_hostid);
2783
2784 /* Initialize a new card structure if need be */
2785 if (card_hostid == SLIC_HOSTID_DEFAULT) {
2786 card = kzalloc(sizeof(struct sliccard), GFP_KERNEL);
2787 if (card == NULL)
2788 return -ENOMEM;
2789
2790 card->next = slic_global.slic_card;
2791 slic_global.slic_card = card;
2792 #if DBG
2793 if (adapter->devid == SLIC_2GB_DEVICE_ID) {
2794 DBG_MSG
2795 ("SLICOSS ==> Initialize 2 Port Gigabit Server \
2796 and Storage Accelerator\n");
2797 } else {
2798 DBG_MSG
2799 ("SLICOSS ==> Initialize 1 Port Gigabit Server \
2800 and Storage Accelerator\n");
2801 }
2802 #endif
2803 card->busnumber = adapter->busnumber;
2804 card->slotnumber = adapter->slotnumber;
2805
2806 /* Find an available cardnum */
2807 for (i = 0; i < SLIC_MAX_CARDS; i++) {
2808 if (slic_global.cardnuminuse[i] == 0) {
2809 slic_global.cardnuminuse[i] = 1;
2810 card->cardnum = i;
2811 break;
2812 }
2813 }
2814 slic_global.num_slic_cards++;
2815 DBG_MSG("\nCARDNUM == %d Total %d Card[%p]\n\n",
2816 card->cardnum, slic_global.num_slic_cards, card);
2817
2818 slic_debug_card_create(card);
2819 } else {
2820 DBG_MSG
2821 ("slicoss: %s CARD already allocated, find the \
2822 correct card\n", __func__);
2823 /* Card exists, find the card this adapter belongs to */
2824 while (card) {
2825 DBG_MSG
2826 ("slicoss: %s card[%p] slot[%x] bus[%x] \
2827 adaptport[%p] hostid[%x] cardnum[%x]\n",
2828 __func__, card, card->slotnumber,
2829 card->busnumber, card->adapter[adapter->port],
2830 card_hostid, card->cardnum);
2831
2832 if (card->cardnum == card_hostid)
2833 break;
2834 card = card->next;
2835 }
2836 }
2837
2838 ASSERT(card);
2839 if (!card)
2840 return STATUS_FAILURE;
2841 /* Put the adapter in the card's adapter list */
2842 ASSERT(card->adapter[adapter->port] == NULL);
2843 if (!card->adapter[adapter->port]) {
2844 card->adapter[adapter->port] = adapter;
2845 adapter->card = card;
2846 }
2847
2848 card->card_size = 1; /* one port per *logical* card */
2849
2850 while (physcard) {
2851 for (i = 0; i < SLIC_MAX_PORTS; i++) {
2852 if (!physcard->adapter[i])
2853 continue;
2854 else
2855 break;
2856 }
2857 ASSERT(i != SLIC_MAX_PORTS);
2858 if (physcard->adapter[i]->slotnumber == adapter->slotnumber)
2859 break;
2860 physcard = physcard->next;
2861 }
2862 if (!physcard) {
2863 /* no structure allocated for this physical card yet */
2864 physcard = kzalloc(sizeof(struct physcard), GFP_ATOMIC);
2865 ASSERT(physcard);
2866
2867 DBG_MSG
2868 ("\n%s Allocate a PHYSICALcard:\n PHYSICAL_Card[%p]\n\
2869 LogicalCard [%p]\n adapter [%p]\n",
2870 __func__, physcard, card, adapter);
2871
2872 physcard->next = slic_global.phys_card;
2873 slic_global.phys_card = physcard;
2874 physcard->adapters_allocd = 1;
2875 } else {
2876 physcard->adapters_allocd++;
2877 }
2878 /* Note - this is ZERO relative */
2879 adapter->physport = physcard->adapters_allocd - 1;
2880
2881 ASSERT(physcard->adapter[adapter->physport] == NULL);
2882 physcard->adapter[adapter->physport] = adapter;
2883 adapter->physcard = physcard;
2884 DBG_MSG(" PHYSICAL_Port %d Logical_Port %d\n", adapter->physport,
2885 adapter->port);
2886
2887 return 0;
2888 }
2889
slic_soft_reset(struct adapter * adapter)2890 static void slic_soft_reset(struct adapter *adapter)
2891 {
2892 if (adapter->card->state == CARD_UP) {
2893 DBG_MSG("slicoss: %s QUIESCE adapter[%p] card[%p] devid[%x]\n",
2894 __func__, adapter, adapter->card, adapter->devid);
2895 WRITE_REG(adapter->slic_regs->slic_quiesce, 0, FLUSH);
2896 mdelay(1);
2897 }
2898 /* DBG_MSG ("slicoss: %s (%s) adapter[%p] card[%p] devid[%x]\n",
2899 __func__, adapter->netdev->name, adapter, adapter->card,
2900 adapter->devid); */
2901
2902 WRITE_REG(adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC, FLUSH);
2903 mdelay(1);
2904 }
2905
slic_config_set(struct adapter * adapter,bool linkchange)2906 static void slic_config_set(struct adapter *adapter, bool linkchange)
2907 {
2908 u32 value;
2909 u32 RcrReset;
2910 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2911
2912 DBG_MSG("slicoss: %s (%s) slic_interface_enable[%p](%d)\n",
2913 __func__, adapter->netdev->name, adapter,
2914 adapter->cardindex);
2915
2916 if (linkchange) {
2917 /* Setup MAC */
2918 slic_mac_config(adapter);
2919 RcrReset = GRCR_RESET;
2920 } else {
2921 slic_mac_address_config(adapter);
2922 RcrReset = 0;
2923 }
2924
2925 if (adapter->linkduplex == LINK_FULLD) {
2926 /* setup xmtcfg */
2927 value = (GXCR_RESET | /* Always reset */
2928 GXCR_XMTEN | /* Enable transmit */
2929 GXCR_PAUSEEN); /* Enable pause */
2930
2931 DBG_MSG("slicoss: FDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2932 value);
2933 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2934
2935 /* Setup rcvcfg last */
2936 value = (RcrReset | /* Reset, if linkchange */
2937 GRCR_CTLEN | /* Enable CTL frames */
2938 GRCR_ADDRAEN | /* Address A enable */
2939 GRCR_RCVBAD | /* Rcv bad frames */
2940 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2941 } else {
2942 /* setup xmtcfg */
2943 value = (GXCR_RESET | /* Always reset */
2944 GXCR_XMTEN); /* Enable transmit */
2945
2946 DBG_MSG("slicoss: HDX adapt[%p] set xmtcfg to [%x]\n", adapter,
2947 value);
2948 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2949
2950 /* Setup rcvcfg last */
2951 value = (RcrReset | /* Reset, if linkchange */
2952 GRCR_ADDRAEN | /* Address A enable */
2953 GRCR_RCVBAD | /* Rcv bad frames */
2954 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2955 }
2956
2957 if (adapter->state != ADAPT_DOWN) {
2958 /* Only enable receive if we are restarting or running */
2959 value |= GRCR_RCVEN;
2960 }
2961
2962 if (adapter->macopts & MAC_PROMISC)
2963 value |= GRCR_RCVALL;
2964
2965 DBG_MSG("slicoss: adapt[%p] set rcvcfg to [%x]\n", adapter, value);
2966 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2967 }
2968
2969 /*
2970 * Turn off RCV and XMT, power down PHY
2971 */
slic_config_clear(struct adapter * adapter)2972 static void slic_config_clear(struct adapter *adapter)
2973 {
2974 u32 value;
2975 u32 phy_config;
2976 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
2977
2978 /* Setup xmtcfg */
2979 value = (GXCR_RESET | /* Always reset */
2980 GXCR_PAUSEEN); /* Enable pause */
2981
2982 WRITE_REG(slic_regs->slic_wxcfg, value, FLUSH);
2983
2984 value = (GRCR_RESET | /* Always reset */
2985 GRCR_CTLEN | /* Enable CTL frames */
2986 GRCR_ADDRAEN | /* Address A enable */
2987 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
2988
2989 WRITE_REG(slic_regs->slic_wrcfg, value, FLUSH);
2990
2991 /* power down phy */
2992 phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
2993 WRITE_REG(slic_regs->slic_wphy, phy_config, FLUSH);
2994 }
2995
slic_config_get(struct adapter * adapter,u32 config,u32 config_h)2996 static void slic_config_get(struct adapter *adapter, u32 config,
2997 u32 config_h)
2998 {
2999 int status;
3000
3001 status = slic_upr_request(adapter,
3002 SLIC_UPR_RCONFIG,
3003 (u32) config, (u32) config_h, 0, 0);
3004 ASSERT(status == 0);
3005 }
3006
slic_mac_address_config(struct adapter * adapter)3007 static void slic_mac_address_config(struct adapter *adapter)
3008 {
3009 u32 value;
3010 u32 value2;
3011 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3012
3013 value = *(u32 *) &adapter->currmacaddr[2];
3014 value = ntohl(value);
3015 WRITE_REG(slic_regs->slic_wraddral, value, FLUSH);
3016 WRITE_REG(slic_regs->slic_wraddrbl, value, FLUSH);
3017
3018 value2 = (u32) ((adapter->currmacaddr[0] << 8 |
3019 adapter->currmacaddr[1]) & 0xFFFF);
3020
3021 WRITE_REG(slic_regs->slic_wraddrah, value2, FLUSH);
3022 WRITE_REG(slic_regs->slic_wraddrbh, value2, FLUSH);
3023
3024 DBG_MSG("%s value1[%x] value2[%x] Call slic_mcast_set_mask\n",
3025 __func__, value, value2);
3026 slic_dbg_macaddrs(adapter);
3027
3028 /* Write our multicast mask out to the card. This is done */
3029 /* here in addition to the slic_mcast_addr_set routine */
3030 /* because ALL_MCAST may have been enabled or disabled */
3031 slic_mcast_set_mask(adapter);
3032 }
3033
slic_mac_config(struct adapter * adapter)3034 static void slic_mac_config(struct adapter *adapter)
3035 {
3036 u32 value;
3037 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3038
3039 /* Setup GMAC gaps */
3040 if (adapter->linkspeed == LINK_1000MB) {
3041 value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
3042 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
3043 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
3044 } else {
3045 value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
3046 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
3047 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
3048 }
3049
3050 /* enable GMII */
3051 if (adapter->linkspeed == LINK_1000MB)
3052 value |= GMCR_GBIT;
3053
3054 /* enable fullduplex */
3055 if ((adapter->linkduplex == LINK_FULLD)
3056 || (adapter->macopts & MAC_LOOPBACK)) {
3057 value |= GMCR_FULLD;
3058 }
3059
3060 /* write mac config */
3061 WRITE_REG(slic_regs->slic_wmcfg, value, FLUSH);
3062
3063 /* setup mac addresses */
3064 slic_mac_address_config(adapter);
3065 }
3066
slic_mac_filter(struct adapter * adapter,struct ether_header * ether_frame)3067 static bool slic_mac_filter(struct adapter *adapter,
3068 struct ether_header *ether_frame)
3069 {
3070 u32 opts = adapter->macopts;
3071 u32 *dhost4 = (u32 *)ðer_frame->ether_dhost[0];
3072 u16 *dhost2 = (u16 *)ðer_frame->ether_dhost[4];
3073 bool equaladdr;
3074
3075 if (opts & MAC_PROMISC) {
3076 DBG_MSG("slicoss: %s (%s) PROMISCUOUS. Accept frame\n",
3077 __func__, adapter->netdev->name);
3078 return TRUE;
3079 }
3080
3081 if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
3082 if (opts & MAC_BCAST) {
3083 adapter->rcv_broadcasts++;
3084 return TRUE;
3085 } else {
3086 return FALSE;
3087 }
3088 }
3089
3090 if (ether_frame->ether_dhost[0] & 0x01) {
3091 if (opts & MAC_ALLMCAST) {
3092 adapter->rcv_multicasts++;
3093 adapter->stats.multicast++;
3094 return TRUE;
3095 }
3096 if (opts & MAC_MCAST) {
3097 struct mcast_address *mcaddr = adapter->mcastaddrs;
3098
3099 while (mcaddr) {
3100 ETHER_EQ_ADDR(mcaddr->address,
3101 ether_frame->ether_dhost,
3102 equaladdr);
3103 if (equaladdr) {
3104 adapter->rcv_multicasts++;
3105 adapter->stats.multicast++;
3106 return TRUE;
3107 }
3108 mcaddr = mcaddr->next;
3109 }
3110 return FALSE;
3111 } else {
3112 return FALSE;
3113 }
3114 }
3115 if (opts & MAC_DIRECTED) {
3116 adapter->rcv_unicasts++;
3117 return TRUE;
3118 }
3119 return FALSE;
3120
3121 }
3122
slic_mac_set_address(struct net_device * dev,void * ptr)3123 static int slic_mac_set_address(struct net_device *dev, void *ptr)
3124 {
3125 struct adapter *adapter = (struct adapter *)netdev_priv(dev);
3126 struct sockaddr *addr = ptr;
3127
3128 DBG_MSG("%s ENTER (%s)\n", __func__, adapter->netdev->name);
3129
3130 if (netif_running(dev))
3131 return -EBUSY;
3132 if (!adapter)
3133 return -EBUSY;
3134 DBG_MSG("slicoss: %s (%s) curr %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3135 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3136 adapter->currmacaddr[1], adapter->currmacaddr[2],
3137 adapter->currmacaddr[3], adapter->currmacaddr[4],
3138 adapter->currmacaddr[5]);
3139 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
3140 memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
3141 DBG_MSG("slicoss: %s (%s) new %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
3142 __func__, adapter->netdev->name, adapter->currmacaddr[0],
3143 adapter->currmacaddr[1], adapter->currmacaddr[2],
3144 adapter->currmacaddr[3], adapter->currmacaddr[4],
3145 adapter->currmacaddr[5]);
3146
3147 slic_config_set(adapter, TRUE);
3148 return 0;
3149 }
3150
3151 /*
3152 * slic_timer_get_stats
3153 *
3154 * Timer function used to suck the statistics out of the card every
3155 * 50 seconds or whatever STATS_TIMER_INTERVAL is set to.
3156 *
3157 */
3158 #if SLIC_GET_STATS_TIMER_ENABLED
slic_timer_get_stats(ulong dev)3159 static void slic_timer_get_stats(ulong dev)
3160 {
3161 struct adapter *adapter;
3162 struct sliccard *card;
3163 struct slic_shmem *pshmem;
3164
3165 ASSERT(dev);
3166 adapter = netdev_priv((struct net_device *)dev);
3167 ASSERT(adapter);
3168 card = adapter->card;
3169 ASSERT(card);
3170
3171 if ((card->state == CARD_UP) &&
3172 (adapter->state == ADAPT_UP) && (adapter->linkstate == LINK_UP)) {
3173 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3174 #ifdef CONFIG_X86_64
3175 slic_upr_request(adapter,
3176 SLIC_UPR_STATS,
3177 SLIC_GET_ADDR_LOW(&pshmem->inicstats),
3178 SLIC_GET_ADDR_HIGH(&pshmem->inicstats), 0, 0);
3179 #elif defined(CONFIG_X86)
3180 slic_upr_request(adapter,
3181 SLIC_UPR_STATS,
3182 (u32) &pshmem->inicstats, 0, 0, 0);
3183 #else
3184 Stop compilation;
3185 #endif
3186 } else {
3187 /* DBG_MSG ("slicoss: %s adapter[%p] linkstate[%x] NOT UP!\n",
3188 __func__, adapter, adapter->linkstate); */
3189 }
3190 adapter->statstimer.expires = jiffies +
3191 SLIC_SECS_TO_JIFFS(STATS_TIMER_INTERVAL);
3192 add_timer(&adapter->statstimer);
3193 }
3194 #endif
slic_timer_load_check(ulong cardaddr)3195 static void slic_timer_load_check(ulong cardaddr)
3196 {
3197 struct sliccard *card = (struct sliccard *)cardaddr;
3198 struct adapter *adapter = card->master;
3199 u32 load = card->events;
3200 u32 level = 0;
3201
3202 if ((adapter) && (adapter->state == ADAPT_UP) &&
3203 (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
3204 if (adapter->devid == SLIC_1GB_DEVICE_ID) {
3205 if (adapter->linkspeed == LINK_1000MB)
3206 level = 100;
3207 else {
3208 if (load > SLIC_LOAD_5)
3209 level = SLIC_INTAGG_5;
3210 else if (load > SLIC_LOAD_4)
3211 level = SLIC_INTAGG_4;
3212 else if (load > SLIC_LOAD_3)
3213 level = SLIC_INTAGG_3;
3214 else if (load > SLIC_LOAD_2)
3215 level = SLIC_INTAGG_2;
3216 else if (load > SLIC_LOAD_1)
3217 level = SLIC_INTAGG_1;
3218 else
3219 level = SLIC_INTAGG_0;
3220 }
3221 if (card->loadlevel_current != level) {
3222 card->loadlevel_current = level;
3223 WRITE_REG(adapter->slic_regs->slic_intagg,
3224 level, FLUSH);
3225 }
3226 } else {
3227 if (load > SLIC_LOAD_5)
3228 level = SLIC_INTAGG_5;
3229 else if (load > SLIC_LOAD_4)
3230 level = SLIC_INTAGG_4;
3231 else if (load > SLIC_LOAD_3)
3232 level = SLIC_INTAGG_3;
3233 else if (load > SLIC_LOAD_2)
3234 level = SLIC_INTAGG_2;
3235 else if (load > SLIC_LOAD_1)
3236 level = SLIC_INTAGG_1;
3237 else
3238 level = SLIC_INTAGG_0;
3239 if (card->loadlevel_current != level) {
3240 card->loadlevel_current = level;
3241 WRITE_REG(adapter->slic_regs->slic_intagg,
3242 level, FLUSH);
3243 }
3244 }
3245 }
3246 card->events = 0;
3247 card->loadtimer.expires =
3248 jiffies + SLIC_SECS_TO_JIFFS(SLIC_LOADTIMER_PERIOD);
3249 add_timer(&card->loadtimer);
3250 }
3251
slic_assert_fail(void)3252 static void slic_assert_fail(void)
3253 {
3254 u32 cpuid;
3255 u32 curr_pid;
3256 cpuid = smp_processor_id();
3257 curr_pid = current->pid;
3258
3259 DBG_ERROR("%s CPU # %d ---- PID # %d\n", __func__, cpuid, curr_pid);
3260 }
3261
slic_upr_queue_request(struct adapter * adapter,u32 upr_request,u32 upr_data,u32 upr_data_h,u32 upr_buffer,u32 upr_buffer_h)3262 static int slic_upr_queue_request(struct adapter *adapter,
3263 u32 upr_request,
3264 u32 upr_data,
3265 u32 upr_data_h,
3266 u32 upr_buffer, u32 upr_buffer_h)
3267 {
3268 struct slic_upr *upr;
3269 struct slic_upr *uprqueue;
3270
3271 upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
3272 if (!upr) {
3273 DBG_MSG("%s COULD NOT ALLOCATE UPR MEM\n", __func__);
3274
3275 return -ENOMEM;
3276 }
3277 upr->adapter = adapter->port;
3278 upr->upr_request = upr_request;
3279 upr->upr_data = upr_data;
3280 upr->upr_buffer = upr_buffer;
3281 upr->upr_data_h = upr_data_h;
3282 upr->upr_buffer_h = upr_buffer_h;
3283 upr->next = NULL;
3284 if (adapter->upr_list) {
3285 uprqueue = adapter->upr_list;
3286
3287 while (uprqueue->next)
3288 uprqueue = uprqueue->next;
3289 uprqueue->next = upr;
3290 } else {
3291 adapter->upr_list = upr;
3292 }
3293 return STATUS_SUCCESS;
3294 }
3295
slic_upr_request(struct adapter * adapter,u32 upr_request,u32 upr_data,u32 upr_data_h,u32 upr_buffer,u32 upr_buffer_h)3296 static int slic_upr_request(struct adapter *adapter,
3297 u32 upr_request,
3298 u32 upr_data,
3299 u32 upr_data_h,
3300 u32 upr_buffer, u32 upr_buffer_h)
3301 {
3302 int status;
3303
3304 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3305 status = slic_upr_queue_request(adapter,
3306 upr_request,
3307 upr_data,
3308 upr_data_h, upr_buffer, upr_buffer_h);
3309 if (status != STATUS_SUCCESS) {
3310 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3311 adapter->upr_lock.flags);
3312 return status;
3313 }
3314 slic_upr_start(adapter);
3315 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3316 adapter->upr_lock.flags);
3317 return STATUS_PENDING;
3318 }
3319
slic_upr_request_complete(struct adapter * adapter,u32 isr)3320 static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
3321 {
3322 struct sliccard *card = adapter->card;
3323 struct slic_upr *upr;
3324
3325 /* if (card->dump_requested) {
3326 DBG_MSG("ENTER slic_upr_request_complete Dump in progress ISR[%x]\n",
3327 isr);
3328 } */
3329 spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
3330 upr = adapter->upr_list;
3331 if (!upr) {
3332 ASSERT(0);
3333 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3334 adapter->upr_lock.flags);
3335 return;
3336 }
3337 adapter->upr_list = upr->next;
3338 upr->next = NULL;
3339 adapter->upr_busy = 0;
3340 ASSERT(adapter->port == upr->adapter);
3341 switch (upr->upr_request) {
3342 case SLIC_UPR_STATS:
3343 {
3344 #if SLIC_GET_STATS_ENABLED
3345 struct slic_stats *slicstats =
3346 (struct slic_stats *) &adapter->pshmem->inicstats;
3347 struct slic_stats *newstats = slicstats;
3348 struct slic_stats *old = &adapter->inicstats_prev;
3349 struct slicnet_stats *stst = &adapter->slic_stats;
3350 #endif
3351 if (isr & ISR_UPCERR) {
3352 DBG_ERROR
3353 ("SLIC_UPR_STATS command failed isr[%x]\n",
3354 isr);
3355
3356 break;
3357 }
3358 #if SLIC_GET_STATS_ENABLED
3359 /* DBG_MSG ("slicoss: %s rcv %lx:%lx:%lx:%lx:%lx %lx %lx "
3360 "xmt %lx:%lx:%lx:%lx:%lx %lx %lx\n",
3361 __func__,
3362 slicstats->rcv_unicasts100,
3363 slicstats->rcv_bytes100,
3364 slicstats->rcv_bytes100,
3365 slicstats->rcv_tcp_bytes100,
3366 slicstats->rcv_tcp_segs100,
3367 slicstats->rcv_other_error100,
3368 slicstats->rcv_drops100,
3369 slicstats->xmit_unicasts100,
3370 slicstats->xmit_bytes100,
3371 slicstats->xmit_bytes100,
3372 slicstats->xmit_tcp_bytes100,
3373 slicstats->xmit_tcp_segs100,
3374 slicstats->xmit_other_error100,
3375 slicstats->xmit_collisions100);*/
3376 UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
3377 newstats->xmit_tcp_segs_gb,
3378 old->xmit_tcp_segs_gb);
3379
3380 UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
3381 newstats->xmit_tcp_bytes_gb,
3382 old->xmit_tcp_bytes_gb);
3383
3384 UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
3385 newstats->rcv_tcp_segs_gb,
3386 old->rcv_tcp_segs_gb);
3387
3388 UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
3389 newstats->rcv_tcp_bytes_gb,
3390 old->rcv_tcp_bytes_gb);
3391
3392 UPDATE_STATS_GB(stst->iface.xmt_bytes,
3393 newstats->xmit_bytes_gb,
3394 old->xmit_bytes_gb);
3395
3396 UPDATE_STATS_GB(stst->iface.xmt_ucast,
3397 newstats->xmit_unicasts_gb,
3398 old->xmit_unicasts_gb);
3399
3400 UPDATE_STATS_GB(stst->iface.rcv_bytes,
3401 newstats->rcv_bytes_gb,
3402 old->rcv_bytes_gb);
3403
3404 UPDATE_STATS_GB(stst->iface.rcv_ucast,
3405 newstats->rcv_unicasts_gb,
3406 old->rcv_unicasts_gb);
3407
3408 UPDATE_STATS_GB(stst->iface.xmt_errors,
3409 newstats->xmit_collisions_gb,
3410 old->xmit_collisions_gb);
3411
3412 UPDATE_STATS_GB(stst->iface.xmt_errors,
3413 newstats->xmit_excess_collisions_gb,
3414 old->xmit_excess_collisions_gb);
3415
3416 UPDATE_STATS_GB(stst->iface.xmt_errors,
3417 newstats->xmit_other_error_gb,
3418 old->xmit_other_error_gb);
3419
3420 UPDATE_STATS_GB(stst->iface.rcv_errors,
3421 newstats->rcv_other_error_gb,
3422 old->rcv_other_error_gb);
3423
3424 UPDATE_STATS_GB(stst->iface.rcv_discards,
3425 newstats->rcv_drops_gb,
3426 old->rcv_drops_gb);
3427
3428 if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
3429 adapter->rcv_drops +=
3430 (newstats->rcv_drops_gb -
3431 old->rcv_drops_gb);
3432 }
3433 memcpy(old, newstats, sizeof(struct slic_stats));
3434 #endif
3435 break;
3436 }
3437 case SLIC_UPR_RLSR:
3438 slic_link_upr_complete(adapter, isr);
3439 break;
3440 case SLIC_UPR_RCONFIG:
3441 break;
3442 case SLIC_UPR_RPHY:
3443 ASSERT(0);
3444 break;
3445 case SLIC_UPR_ENLB:
3446 ASSERT(0);
3447 break;
3448 case SLIC_UPR_ENCT:
3449 ASSERT(0);
3450 break;
3451 case SLIC_UPR_PDWN:
3452 ASSERT(0);
3453 break;
3454 case SLIC_UPR_PING:
3455 card->pingstatus |= (isr & ISR_PINGDSMASK);
3456 break;
3457 #if SLIC_DUMP_ENABLED
3458 case SLIC_UPR_DUMP:
3459 card->dumpstatus |= (isr & ISR_UPCMASK);
3460 break;
3461 #endif
3462 default:
3463 ASSERT(0);
3464 }
3465 kfree(upr);
3466 slic_upr_start(adapter);
3467 spin_unlock_irqrestore(&adapter->upr_lock.lock,
3468 adapter->upr_lock.flags);
3469 }
3470
slic_upr_start(struct adapter * adapter)3471 static void slic_upr_start(struct adapter *adapter)
3472 {
3473 struct slic_upr *upr;
3474 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3475 /*
3476 char * ptr1;
3477 char * ptr2;
3478 uint cmdoffset;
3479 */
3480 upr = adapter->upr_list;
3481 if (!upr)
3482 return;
3483 if (adapter->upr_busy)
3484 return;
3485 adapter->upr_busy = 1;
3486
3487 switch (upr->upr_request) {
3488 case SLIC_UPR_STATS:
3489 if (upr->upr_data_h == 0) {
3490 WRITE_REG(slic_regs->slic_stats, upr->upr_data, FLUSH);
3491 } else {
3492 WRITE_REG64(adapter,
3493 slic_regs->slic_stats64,
3494 upr->upr_data,
3495 slic_regs->slic_addr_upper,
3496 upr->upr_data_h, FLUSH);
3497 }
3498 break;
3499
3500 case SLIC_UPR_RLSR:
3501 WRITE_REG64(adapter,
3502 slic_regs->slic_rlsr,
3503 upr->upr_data,
3504 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3505 break;
3506
3507 case SLIC_UPR_RCONFIG:
3508 DBG_MSG("%s SLIC_UPR_RCONFIG!!!!\n", __func__);
3509 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3510 " a->slic_regs[%p] slic_regs[%p]\n"
3511 " &slic_rconfig[%p] &slic_addr_upper[%p]\n"
3512 " upr[%p]\n"
3513 " uprdata[%x] uprdatah[%x]\n",
3514 adapter, adapter->slic_regs, slic_regs,
3515 &slic_regs->slic_rconfig, &slic_regs->slic_addr_upper,
3516 upr, upr->upr_data, upr->upr_data_h);
3517 WRITE_REG64(adapter,
3518 slic_regs->slic_rconfig,
3519 upr->upr_data,
3520 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3521 break;
3522 #if SLIC_DUMP_ENABLED
3523 case SLIC_UPR_DUMP:
3524 #if 0
3525 DBG_MSG("%s SLIC_UPR_DUMP!!!!\n", __func__);
3526 DBG_MSG("WRITE_REG64 adapter[%p]\n"
3527 " upr_buffer[%x] upr_bufferh[%x]\n"
3528 " upr_data[%x] upr_datah[%x]\n"
3529 " cmdbuff[%p] cmdbuffP[%p]\n"
3530 " dumpbuff[%p] dumpbuffP[%p]\n",
3531 adapter, upr->upr_buffer, upr->upr_buffer_h,
3532 upr->upr_data, upr->upr_data_h,
3533 adapter->card->cmdbuffer,
3534 (void *)adapter->card->cmdbuffer_phys,
3535 adapter->card->dumpbuffer, (
3536 void *)adapter->card->dumpbuffer_phys);
3537
3538 ptr1 = (char *)slic_regs;
3539 ptr2 = (char *)(&slic_regs->slic_dump_cmd);
3540 cmdoffset = ptr2 - ptr1;
3541 DBG_MSG("slic_dump_cmd register offset [%x]\n", cmdoffset);
3542 #endif
3543 if (upr->upr_buffer || upr->upr_buffer_h) {
3544 WRITE_REG64(adapter,
3545 slic_regs->slic_dump_data,
3546 upr->upr_buffer,
3547 slic_regs->slic_addr_upper,
3548 upr->upr_buffer_h, FLUSH);
3549 }
3550 WRITE_REG64(adapter,
3551 slic_regs->slic_dump_cmd,
3552 upr->upr_data,
3553 slic_regs->slic_addr_upper, upr->upr_data_h, FLUSH);
3554 break;
3555 #endif
3556 case SLIC_UPR_PING:
3557 WRITE_REG(slic_regs->slic_ping, 1, FLUSH);
3558 break;
3559 default:
3560 ASSERT(0);
3561 }
3562 }
3563
slic_link_upr_complete(struct adapter * adapter,u32 isr)3564 static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
3565 {
3566 u32 linkstatus = adapter->pshmem->linkstatus;
3567 uint linkup;
3568 unsigned char linkspeed;
3569 unsigned char linkduplex;
3570
3571 DBG_MSG("%s: %s ISR[%x] linkstatus[%x]\n adapter[%p](%d)\n",
3572 __func__, adapter->netdev->name, isr, linkstatus, adapter,
3573 adapter->cardindex);
3574
3575 if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
3576 struct slic_shmem *pshmem;
3577
3578 pshmem = (struct slic_shmem *)adapter->phys_shmem;
3579 #if defined(CONFIG_X86_64)
3580 slic_upr_queue_request(adapter,
3581 SLIC_UPR_RLSR,
3582 SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
3583 SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
3584 0, 0);
3585 #elif defined(CONFIG_X86)
3586 slic_upr_queue_request(adapter,
3587 SLIC_UPR_RLSR,
3588 (u32) &pshmem->linkstatus,
3589 SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
3590 #else
3591 Stop Compilation;
3592 #endif
3593 return;
3594 }
3595 if (adapter->state != ADAPT_UP)
3596 return;
3597
3598 ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
3599 || (adapter->devid == SLIC_2GB_DEVICE_ID));
3600
3601 linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
3602 if (linkstatus & GIG_SPEED_1000) {
3603 linkspeed = LINK_1000MB;
3604 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==1000MB ",
3605 __func__, adapter->netdev->name);
3606 } else if (linkstatus & GIG_SPEED_100) {
3607 linkspeed = LINK_100MB;
3608 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==100MB ", __func__,
3609 adapter->netdev->name);
3610 } else {
3611 linkspeed = LINK_10MB;
3612 DBG_MSG("slicoss: %s (%s) GIGABIT Speed==10MB ", __func__,
3613 adapter->netdev->name);
3614 }
3615 if (linkstatus & GIG_FULLDUPLEX) {
3616 linkduplex = LINK_FULLD;
3617 DBG_MSG(" Duplex == FULL\n");
3618 } else {
3619 linkduplex = LINK_HALFD;
3620 DBG_MSG(" Duplex == HALF\n");
3621 }
3622
3623 if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) {
3624 DBG_MSG("slicoss: %s (%s) physport(%d) link still down\n",
3625 __func__, adapter->netdev->name, adapter->physport);
3626 return;
3627 }
3628
3629 /* link up event, but nothing has changed */
3630 if ((adapter->linkstate == LINK_UP) &&
3631 (linkup == LINK_UP) &&
3632 (adapter->linkspeed == linkspeed) &&
3633 (adapter->linkduplex == linkduplex)) {
3634 DBG_MSG("slicoss: %s (%s) port(%d) link still up\n",
3635 __func__, adapter->netdev->name, adapter->physport);
3636 return;
3637 }
3638
3639 /* link has changed at this point */
3640
3641 /* link has gone from up to down */
3642 if (linkup == LINK_DOWN) {
3643 adapter->linkstate = LINK_DOWN;
3644 DBG_MSG("slicoss: %s %d LinkDown!\n", __func__,
3645 adapter->physport);
3646 return;
3647 }
3648
3649 /* link has gone from down to up */
3650 adapter->linkspeed = linkspeed;
3651 adapter->linkduplex = linkduplex;
3652
3653 if (adapter->linkstate != LINK_UP) {
3654 /* setup the mac */
3655 DBG_MSG("%s call slic_config_set\n", __func__);
3656 slic_config_set(adapter, TRUE);
3657 adapter->linkstate = LINK_UP;
3658 DBG_MSG("\n(%s) Link UP: CALL slic_if_start_queue",
3659 adapter->netdev->name);
3660 slic_if_start_queue(adapter);
3661 }
3662 #if 1
3663 switch (linkspeed) {
3664 case LINK_1000MB:
3665 DBG_MSG
3666 ("\n(%s) LINK UP!: GIGABIT SPEED == 1000MB duplex[%x]\n",
3667 adapter->netdev->name, adapter->linkduplex);
3668 break;
3669 case LINK_100MB:
3670 DBG_MSG("\n(%s) LINK UP!: SPEED == 100MB duplex[%x]\n",
3671 adapter->netdev->name, adapter->linkduplex);
3672 break;
3673 default:
3674 DBG_MSG("\n(%s) LINK UP!: SPEED == 10MB duplex[%x]\n",
3675 adapter->netdev->name, adapter->linkduplex);
3676 break;
3677 }
3678 #endif
3679 }
3680
3681 /*
3682 * this is here to checksum the eeprom, there is some ucode bug
3683 * which prevens us from using the ucode result.
3684 * remove this once ucode is fixed.
3685 */
slic_eeprom_cksum(char * m,int len)3686 static ushort slic_eeprom_cksum(char *m, int len)
3687 {
3688 #define ADDCARRY(x) (x > 65535 ? x -= 65535 : x)
3689 #define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
3690 }
3691
3692 u16 *w;
3693 u32 sum = 0;
3694 u32 byte_swapped = 0;
3695 u32 w_int;
3696
3697 union {
3698 char c[2];
3699 ushort s;
3700 } s_util;
3701
3702 union {
3703 ushort s[2];
3704 int l;
3705 } l_util;
3706
3707 l_util.l = 0;
3708 s_util.s = 0;
3709
3710 w = (u16 *)m;
3711 #ifdef CONFIG_X86_64
3712 w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
3713 #else
3714 w_int = (u32) (w);
3715 #endif
3716 if ((1 & w_int) && (len > 0)) {
3717 REDUCE;
3718 sum <<= 8;
3719 s_util.c[0] = *(unsigned char *)w;
3720 w = (u16 *)((char *)w + 1);
3721 len--;
3722 byte_swapped = 1;
3723 }
3724
3725 /* Unroll the loop to make overhead from branches &c small. */
3726 while ((len -= 32) >= 0) {
3727 sum += w[0];
3728 sum += w[1];
3729 sum += w[2];
3730 sum += w[3];
3731 sum += w[4];
3732 sum += w[5];
3733 sum += w[6];
3734 sum += w[7];
3735 sum += w[8];
3736 sum += w[9];
3737 sum += w[10];
3738 sum += w[11];
3739 sum += w[12];
3740 sum += w[13];
3741 sum += w[14];
3742 sum += w[15];
3743 w = (u16 *)((ulong) w + 16); /* verify */
3744 }
3745 len += 32;
3746 while ((len -= 8) >= 0) {
3747 sum += w[0];
3748 sum += w[1];
3749 sum += w[2];
3750 sum += w[3];
3751 w = (u16 *)((ulong) w + 4); /* verify */
3752 }
3753 len += 8;
3754 if (len != 0 || byte_swapped != 0) {
3755 REDUCE;
3756 while ((len -= 2) >= 0)
3757 sum += *w++; /* verify */
3758 if (byte_swapped) {
3759 REDUCE;
3760 sum <<= 8;
3761 byte_swapped = 0;
3762 if (len == -1) {
3763 s_util.c[1] = *(char *) w;
3764 sum += s_util.s;
3765 len = 0;
3766 } else {
3767 len = -1;
3768 }
3769
3770 } else if (len == -1) {
3771 s_util.c[0] = *(char *) w;
3772 }
3773
3774 if (len == -1) {
3775 s_util.c[1] = 0;
3776 sum += s_util.s;
3777 }
3778 }
3779 REDUCE;
3780 return (ushort) sum;
3781 }
3782
slic_rspqueue_init(struct adapter * adapter)3783 static int slic_rspqueue_init(struct adapter *adapter)
3784 {
3785 int i;
3786 struct slic_rspqueue *rspq = &adapter->rspqueue;
3787 __iomem struct slic_regs *slic_regs = adapter->slic_regs;
3788 u32 paddrh = 0;
3789
3790 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3791 adapter->netdev->name, adapter);
3792 ASSERT(adapter->state == ADAPT_DOWN);
3793 memset(rspq, 0, sizeof(struct slic_rspqueue));
3794
3795 rspq->num_pages = SLIC_RSPQ_PAGES_GB;
3796
3797 for (i = 0; i < rspq->num_pages; i++) {
3798 rspq->vaddr[i] =
3799 pci_alloc_consistent(adapter->pcidev, PAGE_SIZE,
3800 &rspq->paddr[i]);
3801 if (!rspq->vaddr[i]) {
3802 DBG_ERROR
3803 ("rspqueue_init_failed pci_alloc_consistent\n");
3804 slic_rspqueue_free(adapter);
3805 return STATUS_FAILURE;
3806 }
3807 #ifndef CONFIG_X86_64
3808 ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
3809 (u32) rspq->vaddr[i]);
3810 ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
3811 (u32) rspq->paddr[i]);
3812 #endif
3813 memset(rspq->vaddr[i], 0, PAGE_SIZE);
3814 /* DBG_MSG("slicoss: %s UPLOAD RSPBUFF Page pageix[%x] paddr[%p] "
3815 "vaddr[%p]\n",
3816 __func__, i, (void *)rspq->paddr[i], rspq->vaddr[i]); */
3817
3818 if (paddrh == 0) {
3819 WRITE_REG(slic_regs->slic_rbar,
3820 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3821 DONT_FLUSH);
3822 } else {
3823 WRITE_REG64(adapter,
3824 slic_regs->slic_rbar64,
3825 (rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
3826 slic_regs->slic_addr_upper,
3827 paddrh, DONT_FLUSH);
3828 }
3829 }
3830 rspq->offset = 0;
3831 rspq->pageindex = 0;
3832 rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
3833 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3834 adapter->netdev->name, adapter);
3835 return STATUS_SUCCESS;
3836 }
3837
slic_rspqueue_reset(struct adapter * adapter)3838 static int slic_rspqueue_reset(struct adapter *adapter)
3839 {
3840 struct slic_rspqueue *rspq = &adapter->rspqueue;
3841
3842 DBG_MSG("slicoss: %s (%s) ENTER adapter[%p]\n", __func__,
3843 adapter->netdev->name, adapter);
3844 ASSERT(adapter->state == ADAPT_DOWN);
3845 ASSERT(rspq);
3846
3847 DBG_MSG("slicoss: Nothing to do. rspq[%p]\n"
3848 " offset[%x]\n"
3849 " pageix[%x]\n"
3850 " rspbuf[%p]\n",
3851 rspq, rspq->offset, rspq->pageindex, rspq->rspbuf);
3852
3853 DBG_MSG("slicoss: %s (%s) EXIT adapter[%p]\n", __func__,
3854 adapter->netdev->name, adapter);
3855 return STATUS_SUCCESS;
3856 }
3857
slic_rspqueue_free(struct adapter * adapter)3858 static void slic_rspqueue_free(struct adapter *adapter)
3859 {
3860 int i;
3861 struct slic_rspqueue *rspq = &adapter->rspqueue;
3862
3863 DBG_MSG("slicoss: %s adapter[%p] port %d rspq[%p] FreeRSPQ\n",
3864 __func__, adapter, adapter->physport, rspq);
3865 for (i = 0; i < rspq->num_pages; i++) {
3866 if (rspq->vaddr[i]) {
3867 DBG_MSG
3868 ("slicoss: pci_free_consistent rspq->vaddr[%p] \
3869 paddr[%p]\n",
3870 rspq->vaddr[i], (void *) rspq->paddr[i]);
3871 pci_free_consistent(adapter->pcidev, PAGE_SIZE,
3872 rspq->vaddr[i], rspq->paddr[i]);
3873 }
3874 rspq->vaddr[i] = NULL;
3875 rspq->paddr[i] = 0;
3876 }
3877 rspq->offset = 0;
3878 rspq->pageindex = 0;
3879 rspq->rspbuf = NULL;
3880 }
3881
slic_rspqueue_getnext(struct adapter * adapter)3882 static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
3883 {
3884 struct slic_rspqueue *rspq = &adapter->rspqueue;
3885 struct slic_rspbuf *buf;
3886
3887 if (!(rspq->rspbuf->status))
3888 return NULL;
3889
3890 buf = rspq->rspbuf;
3891 #ifndef CONFIG_X86_64
3892 ASSERT((buf->status & 0xFFFFFFE0) == 0);
3893 #endif
3894 ASSERT(buf->hosthandle);
3895 if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
3896 rspq->rspbuf++;
3897 #ifndef CONFIG_X86_64
3898 ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
3899 (u32) rspq->rspbuf);
3900 #endif
3901 } else {
3902 ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
3903 WRITE_REG64(adapter,
3904 adapter->slic_regs->slic_rbar64,
3905 (rspq->
3906 paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
3907 adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
3908 rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
3909 rspq->offset = 0;
3910 rspq->rspbuf = (struct slic_rspbuf *)
3911 rspq->vaddr[rspq->pageindex];
3912 #ifndef CONFIG_X86_64
3913 ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
3914 (u32) rspq->rspbuf);
3915 #endif
3916 }
3917 #ifndef CONFIG_X86_64
3918 ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
3919 #endif
3920 return buf;
3921 }
3922
slic_cmdqmem_init(struct adapter * adapter)3923 static void slic_cmdqmem_init(struct adapter *adapter)
3924 {
3925 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3926
3927 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3928 }
3929
slic_cmdqmem_free(struct adapter * adapter)3930 static void slic_cmdqmem_free(struct adapter *adapter)
3931 {
3932 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3933 int i;
3934
3935 DBG_MSG("slicoss: (%s) adapter[%p] port %d rspq[%p] Free CMDQ Memory\n",
3936 __func__, adapter, adapter->physport, cmdqmem);
3937 for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
3938 if (cmdqmem->pages[i]) {
3939 DBG_MSG("slicoss: %s Deallocate page CmdQPage[%p]\n",
3940 __func__, (void *) cmdqmem->pages[i]);
3941 pci_free_consistent(adapter->pcidev,
3942 PAGE_SIZE,
3943 (void *) cmdqmem->pages[i],
3944 cmdqmem->dma_pages[i]);
3945 }
3946 }
3947 memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
3948 }
3949
slic_cmdqmem_addpage(struct adapter * adapter)3950 static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
3951 {
3952 struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
3953 u32 *pageaddr;
3954
3955 if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
3956 return NULL;
3957 pageaddr = pci_alloc_consistent(adapter->pcidev,
3958 PAGE_SIZE,
3959 &cmdqmem->dma_pages[cmdqmem->pagecnt]);
3960 if (!pageaddr)
3961 return NULL;
3962 #ifndef CONFIG_X86_64
3963 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3964 #endif
3965 cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
3966 cmdqmem->pagecnt++;
3967 return pageaddr;
3968 }
3969
slic_cmdq_init(struct adapter * adapter)3970 static int slic_cmdq_init(struct adapter *adapter)
3971 {
3972 int i;
3973 u32 *pageaddr;
3974
3975 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
3976 ASSERT(adapter->state == ADAPT_DOWN);
3977 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
3978 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
3979 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
3980 spin_lock_init(&adapter->cmdq_all.lock.lock);
3981 spin_lock_init(&adapter->cmdq_free.lock.lock);
3982 spin_lock_init(&adapter->cmdq_done.lock.lock);
3983 slic_cmdqmem_init(adapter);
3984 adapter->slic_handle_ix = 1;
3985 for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
3986 pageaddr = slic_cmdqmem_addpage(adapter);
3987 #ifndef CONFIG_X86_64
3988 ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
3989 #endif
3990 if (!pageaddr) {
3991 slic_cmdq_free(adapter);
3992 return STATUS_FAILURE;
3993 }
3994 slic_cmdq_addcmdpage(adapter, pageaddr);
3995 }
3996 adapter->slic_handle_ix = 1;
3997 DBG_MSG("slicoss: %s reset slic_handle_ix to ONE\n", __func__);
3998
3999 return STATUS_SUCCESS;
4000 }
4001
slic_cmdq_free(struct adapter * adapter)4002 static void slic_cmdq_free(struct adapter *adapter)
4003 {
4004 struct slic_hostcmd *cmd;
4005
4006 DBG_MSG("slicoss: %s adapter[%p] port %d FreeCommandsFrom CMDQ\n",
4007 __func__, adapter, adapter->physport);
4008 cmd = adapter->cmdq_all.head;
4009 while (cmd) {
4010 if (cmd->busy) {
4011 struct sk_buff *tempskb;
4012
4013 tempskb = cmd->skb;
4014 if (tempskb) {
4015 cmd->skb = NULL;
4016 dev_kfree_skb_irq(tempskb);
4017 }
4018 }
4019 cmd = cmd->next_all;
4020 }
4021 memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
4022 memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
4023 memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
4024 slic_cmdqmem_free(adapter);
4025 }
4026
slic_cmdq_reset(struct adapter * adapter)4027 static void slic_cmdq_reset(struct adapter *adapter)
4028 {
4029 struct slic_hostcmd *hcmd;
4030 struct sk_buff *skb;
4031 u32 outstanding;
4032
4033 DBG_MSG("%s ENTER adapter[%p]\n", __func__, adapter);
4034 spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
4035 adapter->cmdq_free.lock.flags);
4036 spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
4037 adapter->cmdq_done.lock.flags);
4038 outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
4039 outstanding -= adapter->cmdq_free.count;
4040 hcmd = adapter->cmdq_all.head;
4041 while (hcmd) {
4042 if (hcmd->busy) {
4043 skb = hcmd->skb;
4044 ASSERT(skb);
4045 DBG_MSG("slicoss: %s hcmd[%p] skb[%p] ", __func__,
4046 hcmd, skb);
4047 hcmd->busy = 0;
4048 hcmd->skb = NULL;
4049 DBG_MSG(" Free SKB\n");
4050 dev_kfree_skb_irq(skb);
4051 }
4052 hcmd = hcmd->next_all;
4053 }
4054 adapter->cmdq_free.count = 0;
4055 adapter->cmdq_free.head = NULL;
4056 adapter->cmdq_free.tail = NULL;
4057 adapter->cmdq_done.count = 0;
4058 adapter->cmdq_done.head = NULL;
4059 adapter->cmdq_done.tail = NULL;
4060 adapter->cmdq_free.head = adapter->cmdq_all.head;
4061 hcmd = adapter->cmdq_all.head;
4062 while (hcmd) {
4063 adapter->cmdq_free.count++;
4064 hcmd->next = hcmd->next_all;
4065 hcmd = hcmd->next_all;
4066 }
4067 if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
4068 DBG_ERROR("%s free_count %d != all count %d\n", __func__,
4069 adapter->cmdq_free.count, adapter->cmdq_all.count);
4070 }
4071 spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
4072 adapter->cmdq_done.lock.flags);
4073 spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
4074 adapter->cmdq_free.lock.flags);
4075 DBG_MSG("%s EXIT adapter[%p]\n", __func__, adapter);
4076 }
4077
slic_cmdq_addcmdpage(struct adapter * adapter,u32 * page)4078 static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
4079 {
4080 struct slic_hostcmd *cmd;
4081 struct slic_hostcmd *prev;
4082 struct slic_hostcmd *tail;
4083 struct slic_cmdqueue *cmdq;
4084 int cmdcnt;
4085 void *cmdaddr;
4086 ulong phys_addr;
4087 u32 phys_addrl;
4088 u32 phys_addrh;
4089 struct slic_handle *pslic_handle;
4090
4091 cmdaddr = page;
4092 cmd = (struct slic_hostcmd *)cmdaddr;
4093 /* DBG_MSG("CMDQ Page addr[%p] ix[%d] pfree[%p]\n", cmdaddr, slic_handle_ix,
4094 adapter->pfree_slic_handles); */
4095 cmdcnt = 0;
4096
4097 phys_addr = virt_to_bus((void *)page);
4098 phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
4099 phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
4100
4101 prev = NULL;
4102 tail = cmd;
4103 while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
4104 (adapter->slic_handle_ix < 256)) {
4105 /* Allocate and initialize a SLIC_HANDLE for this command */
4106 SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
4107 if (pslic_handle == NULL)
4108 ASSERT(0);
4109 ASSERT(pslic_handle ==
4110 &adapter->slic_handles[pslic_handle->token.
4111 handle_index]);
4112 pslic_handle->type = SLIC_HANDLE_CMD;
4113 pslic_handle->address = (void *) cmd;
4114 pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
4115 pslic_handle->other_handle = NULL;
4116 pslic_handle->next = NULL;
4117
4118 cmd->pslic_handle = pslic_handle;
4119 cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
4120 cmd->busy = FALSE;
4121 cmd->paddrl = phys_addrl;
4122 cmd->paddrh = phys_addrh;
4123 cmd->next_all = prev;
4124 cmd->next = prev;
4125 prev = cmd;
4126 phys_addrl += SLIC_HOSTCMD_SIZE;
4127 cmdaddr += SLIC_HOSTCMD_SIZE;
4128
4129 cmd = (struct slic_hostcmd *)cmdaddr;
4130 cmdcnt++;
4131 }
4132
4133 cmdq = &adapter->cmdq_all;
4134 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4135 tail->next_all = cmdq->head;
4136 ASSERT(VALID_ADDRESS(prev));
4137 cmdq->head = prev;
4138 cmdq = &adapter->cmdq_free;
4139 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4140 cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */
4141 tail->next = cmdq->head;
4142 ASSERT(VALID_ADDRESS(prev));
4143 cmdq->head = prev;
4144 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4145 }
4146
slic_cmdq_getfree(struct adapter * adapter)4147 static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
4148 {
4149 struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
4150 struct slic_hostcmd *cmd = NULL;
4151
4152 lock_and_retry:
4153 spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
4154 retry:
4155 cmd = cmdq->head;
4156 if (cmd) {
4157 cmdq->head = cmd->next;
4158 cmdq->count--;
4159 spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
4160 } else {
4161 slic_cmdq_getdone(adapter);
4162 cmd = cmdq->head;
4163 if (cmd) {
4164 goto retry;
4165 } else {
4166 u32 *pageaddr;
4167
4168 spin_unlock_irqrestore(&cmdq->lock.lock,
4169 cmdq->lock.flags);
4170 pageaddr = slic_cmdqmem_addpage(adapter);
4171 if (pageaddr) {
4172 slic_cmdq_addcmdpage(adapter, pageaddr);
4173 goto lock_and_retry;
4174 }
4175 }
4176 }
4177 return cmd;
4178 }
4179
slic_cmdq_getdone(struct adapter * adapter)4180 static void slic_cmdq_getdone(struct adapter *adapter)
4181 {
4182 struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
4183 struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
4184
4185 ASSERT(free_cmdq->head == NULL);
4186 spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4187 ASSERT(VALID_ADDRESS(done_cmdq->head));
4188
4189 free_cmdq->head = done_cmdq->head;
4190 free_cmdq->count = done_cmdq->count;
4191 done_cmdq->head = NULL;
4192 done_cmdq->tail = NULL;
4193 done_cmdq->count = 0;
4194 spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
4195 }
4196
slic_cmdq_putdone_irq(struct adapter * adapter,struct slic_hostcmd * cmd)4197 static void slic_cmdq_putdone_irq(struct adapter *adapter,
4198 struct slic_hostcmd *cmd)
4199 {
4200 struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
4201
4202 spin_lock(&cmdq->lock.lock);
4203 cmd->busy = 0;
4204 ASSERT(VALID_ADDRESS(cmdq->head));
4205 cmd->next = cmdq->head;
4206 ASSERT(VALID_ADDRESS(cmd));
4207 cmdq->head = cmd;
4208 cmdq->count++;
4209 if ((adapter->xmitq_full) && (cmdq->count > 10))
4210 netif_wake_queue(adapter->netdev);
4211 spin_unlock(&cmdq->lock.lock);
4212 }
4213
slic_rcvqueue_init(struct adapter * adapter)4214 static int slic_rcvqueue_init(struct adapter *adapter)
4215 {
4216 int i, count;
4217 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4218
4219 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4220 ASSERT(adapter->state == ADAPT_DOWN);
4221 rcvq->tail = NULL;
4222 rcvq->head = NULL;
4223 rcvq->size = SLIC_RCVQ_ENTRIES;
4224 rcvq->errors = 0;
4225 rcvq->count = 0;
4226 i = (SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES);
4227 count = 0;
4228 while (i) {
4229 count += slic_rcvqueue_fill(adapter);
4230 i--;
4231 }
4232 if (rcvq->count < SLIC_RCVQ_MINENTRIES) {
4233 slic_rcvqueue_free(adapter);
4234 return STATUS_FAILURE;
4235 }
4236 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4237 return STATUS_SUCCESS;
4238 }
4239
slic_rcvqueue_reset(struct adapter * adapter)4240 static int slic_rcvqueue_reset(struct adapter *adapter)
4241 {
4242 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4243
4244 DBG_MSG("slicoss: %s ENTER adapter[%p]\n", __func__, adapter);
4245 ASSERT(adapter->state == ADAPT_DOWN);
4246 ASSERT(rcvq);
4247
4248 DBG_MSG("slicoss: Nothing to do. rcvq[%p]\n"
4249 " count[%x]\n"
4250 " head[%p]\n"
4251 " tail[%p]\n",
4252 rcvq, rcvq->count, rcvq->head, rcvq->tail);
4253
4254 DBG_MSG("slicoss: %s EXIT adapter[%p]\n", __func__, adapter);
4255 return STATUS_SUCCESS;
4256 }
4257
slic_rcvqueue_free(struct adapter * adapter)4258 static void slic_rcvqueue_free(struct adapter *adapter)
4259 {
4260 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4261 struct sk_buff *skb;
4262
4263 while (rcvq->head) {
4264 skb = rcvq->head;
4265 rcvq->head = rcvq->head->next;
4266 dev_kfree_skb(skb);
4267 }
4268 rcvq->tail = NULL;
4269 rcvq->head = NULL;
4270 rcvq->count = 0;
4271 }
4272
slic_rcvqueue_getnext(struct adapter * adapter)4273 static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter)
4274 {
4275 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4276 struct sk_buff *skb;
4277 struct slic_rcvbuf *rcvbuf;
4278 int count;
4279
4280 if (rcvq->count) {
4281 skb = rcvq->head;
4282 rcvbuf = (struct slic_rcvbuf *)skb->head;
4283 ASSERT(rcvbuf);
4284
4285 if (rcvbuf->status & IRHDDR_SVALID) {
4286 rcvq->head = rcvq->head->next;
4287 skb->next = NULL;
4288 rcvq->count--;
4289 } else {
4290 skb = NULL;
4291 }
4292 } else {
4293 DBG_ERROR("RcvQ Empty!! adapter[%p] rcvq[%p] count[%x]\n",
4294 adapter, rcvq, rcvq->count);
4295 skb = NULL;
4296 }
4297 while (rcvq->count < SLIC_RCVQ_FILLTHRESH) {
4298 count = slic_rcvqueue_fill(adapter);
4299 if (!count)
4300 break;
4301 }
4302 if (skb)
4303 rcvq->errors = 0;
4304 return skb;
4305 }
4306
slic_rcvqueue_fill(struct adapter * adapter)4307 static int slic_rcvqueue_fill(struct adapter *adapter)
4308 {
4309 void *paddr;
4310 u32 paddrl;
4311 u32 paddrh;
4312 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4313 int i = 0;
4314
4315 while (i < SLIC_RCVQ_FILLENTRIES) {
4316 struct slic_rcvbuf *rcvbuf;
4317 struct sk_buff *skb;
4318 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4319 retry_rcvqfill:
4320 #endif
4321 skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
4322 if (skb) {
4323 paddr = (void *)pci_map_single(adapter->pcidev,
4324 skb->data,
4325 SLIC_RCVQ_RCVBUFSIZE,
4326 PCI_DMA_FROMDEVICE);
4327 paddrl = SLIC_GET_ADDR_LOW(paddr);
4328 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4329
4330 skb->len = SLIC_RCVBUF_HEADSIZE;
4331 rcvbuf = (struct slic_rcvbuf *)skb->head;
4332 rcvbuf->status = 0;
4333 skb->next = NULL;
4334 #ifdef KLUDGE_FOR_4GB_BOUNDARY
4335 if (paddrl == 0) {
4336 DBG_ERROR
4337 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4338 "skb[%p] PROBLEM\n"
4339 " skbdata[%p]\n"
4340 " skblen[%x]\n"
4341 " paddr[%p]\n"
4342 " paddrl[%x]\n"
4343 " paddrh[%x]\n", __func__, skb,
4344 skb->data, skb->len, paddr, paddrl,
4345 paddrh);
4346 DBG_ERROR(" rcvq->head[%p]\n"
4347 " rcvq->tail[%p]\n"
4348 " rcvq->count[%x]\n",
4349 rcvq->head, rcvq->tail, rcvq->count);
4350 DBG_ERROR("SKIP THIS SKB!!!!!!!!\n");
4351 goto retry_rcvqfill;
4352 }
4353 #else
4354 if (paddrl == 0) {
4355 DBG_ERROR
4356 ("\n\n%s: LOW 32bits PHYSICAL ADDRESS == 0 "
4357 "skb[%p] GIVE TO CARD ANYWAY\n"
4358 " skbdata[%p]\n"
4359 " paddr[%p]\n"
4360 " paddrl[%x]\n"
4361 " paddrh[%x]\n", __func__, skb,
4362 skb->data, paddr, paddrl, paddrh);
4363 }
4364 #endif
4365 if (paddrh == 0) {
4366 WRITE_REG(adapter->slic_regs->slic_hbar,
4367 (u32) paddrl, DONT_FLUSH);
4368 } else {
4369 WRITE_REG64(adapter,
4370 adapter->slic_regs->slic_hbar64,
4371 (u32) paddrl,
4372 adapter->slic_regs->slic_addr_upper,
4373 (u32) paddrh, DONT_FLUSH);
4374 }
4375 if (rcvq->head)
4376 rcvq->tail->next = skb;
4377 else
4378 rcvq->head = skb;
4379 rcvq->tail = skb;
4380 rcvq->count++;
4381 i++;
4382 } else {
4383 DBG_ERROR
4384 ("%s slic_rcvqueue_fill could only get [%d] "
4385 "skbuffs\n",
4386 adapter->netdev->name, i);
4387 break;
4388 }
4389 }
4390 return i;
4391 }
4392
slic_rcvqueue_reinsert(struct adapter * adapter,struct sk_buff * skb)4393 static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb)
4394 {
4395 struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
4396 void *paddr;
4397 u32 paddrl;
4398 u32 paddrh;
4399 struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head;
4400
4401 ASSERT(skb->len == SLIC_RCVBUF_HEADSIZE);
4402
4403 paddr = (void *)pci_map_single(adapter->pcidev, skb->head,
4404 SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE);
4405 rcvbuf->status = 0;
4406 skb->next = NULL;
4407
4408 paddrl = SLIC_GET_ADDR_LOW(paddr);
4409 paddrh = SLIC_GET_ADDR_HIGH(paddr);
4410
4411 if (paddrl == 0) {
4412 DBG_ERROR
4413 ("%s: LOW 32bits PHYSICAL ADDRESS == 0 skb[%p] PROBLEM\n"
4414 " skbdata[%p]\n" " skblen[%x]\n"
4415 " paddr[%p]\n" " paddrl[%x]\n"
4416 " paddrh[%x]\n", __func__, skb, skb->data,
4417 skb->len, paddr, paddrl, paddrh);
4418 DBG_ERROR(" rcvq->head[%p]\n"
4419 " rcvq->tail[%p]\n"
4420 " rcvq->count[%x]\n", rcvq->head, rcvq->tail,
4421 rcvq->count);
4422 }
4423 if (paddrh == 0) {
4424 WRITE_REG(adapter->slic_regs->slic_hbar, (u32) paddrl,
4425 DONT_FLUSH);
4426 } else {
4427 WRITE_REG64(adapter,
4428 adapter->slic_regs->slic_hbar64,
4429 paddrl,
4430 adapter->slic_regs->slic_addr_upper,
4431 paddrh, DONT_FLUSH);
4432 }
4433 if (rcvq->head)
4434 rcvq->tail->next = skb;
4435 else
4436 rcvq->head = skb;
4437 rcvq->tail = skb;
4438 rcvq->count++;
4439 return rcvq->count;
4440 }
4441
slic_debug_card_show(struct seq_file * seq,void * v)4442 static int slic_debug_card_show(struct seq_file *seq, void *v)
4443 {
4444 #ifdef MOOKTODO
4445 int i;
4446 struct sliccard *card = seq->private;
4447 struct slic_config *config = &card->config;
4448 unsigned char *fru = (unsigned char *)(&card->config.atk_fru);
4449 unsigned char *oemfru = (unsigned char *)(&card->config.OemFru);
4450 #endif
4451
4452 seq_printf(seq, "driver_version : %s", slic_proc_version);
4453 seq_printf(seq, "Microcode versions: \n");
4454 seq_printf(seq, " Gigabit (gb) : %s %s\n",
4455 MOJAVE_UCODE_VERS_STRING, MOJAVE_UCODE_VERS_DATE);
4456 seq_printf(seq, " Gigabit Receiver : %s %s\n",
4457 GB_RCVUCODE_VERS_STRING, GB_RCVUCODE_VERS_DATE);
4458 seq_printf(seq, "Vendor : %s\n", slic_vendor);
4459 seq_printf(seq, "Product Name : %s\n", slic_product_name);
4460 #ifdef MOOKTODO
4461 seq_printf(seq, "VendorId : %4.4X\n",
4462 config->VendorId);
4463 seq_printf(seq, "DeviceId : %4.4X\n",
4464 config->DeviceId);
4465 seq_printf(seq, "RevisionId : %2.2x\n",
4466 config->RevisionId);
4467 seq_printf(seq, "Bus # : %d\n", card->busnumber);
4468 seq_printf(seq, "Device # : %d\n", card->slotnumber);
4469 seq_printf(seq, "Interfaces : %d\n", card->card_size);
4470 seq_printf(seq, " Initialized : %d\n",
4471 card->adapters_activated);
4472 seq_printf(seq, " Allocated : %d\n",
4473 card->adapters_allocated);
4474 ASSERT(card->card_size <= SLIC_NBR_MACS);
4475 for (i = 0; i < card->card_size; i++) {
4476 seq_printf(seq,
4477 " MAC%d : %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
4478 i, config->macinfo[i].macaddrA[0],
4479 config->macinfo[i].macaddrA[1],
4480 config->macinfo[i].macaddrA[2],
4481 config->macinfo[i].macaddrA[3],
4482 config->macinfo[i].macaddrA[4],
4483 config->macinfo[i].macaddrA[5]);
4484 }
4485 seq_printf(seq, " IF Init State Duplex/Speed irq\n");
4486 seq_printf(seq, " -------------------------------\n");
4487 for (i = 0; i < card->adapters_allocated; i++) {
4488 struct adapter *adapter;
4489
4490 adapter = card->adapter[i];
4491 if (adapter) {
4492 seq_printf(seq,
4493 " %d %d %s %s %s 0x%X\n",
4494 adapter->physport, adapter->state,
4495 SLIC_LINKSTATE(adapter->linkstate),
4496 SLIC_DUPLEX(adapter->linkduplex),
4497 SLIC_SPEED(adapter->linkspeed),
4498 (uint) adapter->irq);
4499 }
4500 }
4501 seq_printf(seq, "Generation # : %4.4X\n", card->gennumber);
4502 seq_printf(seq, "RcvQ max entries : %4.4X\n",
4503 SLIC_RCVQ_ENTRIES);
4504 seq_printf(seq, "Ping Status : %8.8X\n",
4505 card->pingstatus);
4506 seq_printf(seq, "Minimum grant : %2.2x\n",
4507 config->MinGrant);
4508 seq_printf(seq, "Maximum Latency : %2.2x\n", config->MaxLat);
4509 seq_printf(seq, "PciStatus : %4.4x\n",
4510 config->Pcistatus);
4511 seq_printf(seq, "Debug Device Id : %4.4x\n",
4512 config->DbgDevId);
4513 seq_printf(seq, "DRAM ROM Function : %4.4x\n",
4514 config->DramRomFn);
4515 seq_printf(seq, "Network interface Pin 1 : %2.2x\n",
4516 config->NetIntPin1);
4517 seq_printf(seq, "Network interface Pin 2 : %2.2x\n",
4518 config->NetIntPin1);
4519 seq_printf(seq, "Network interface Pin 3 : %2.2x\n",
4520 config->NetIntPin1);
4521 seq_printf(seq, "PM capabilities : %4.4X\n",
4522 config->PMECapab);
4523 seq_printf(seq, "Network Clock Controls : %4.4X\n",
4524 config->NwClkCtrls);
4525
4526 switch (config->FruFormat) {
4527 case ATK_FRU_FORMAT:
4528 {
4529 seq_printf(seq,
4530 "Vendor : Alacritech, Inc.\n");
4531 seq_printf(seq,
4532 "Assembly # : %c%c%c%c%c%c\n",
4533 fru[0], fru[1], fru[2], fru[3], fru[4],
4534 fru[5]);
4535 seq_printf(seq,
4536 "Revision # : %c%c\n",
4537 fru[6], fru[7]);
4538
4539 if (config->OEMFruFormat == VENDOR4_FRU_FORMAT) {
4540 seq_printf(seq,
4541 "Serial # : "
4542 "%c%c%c%c%c%c%c%c%c%c%c%c\n",
4543 fru[8], fru[9], fru[10],
4544 fru[11], fru[12], fru[13],
4545 fru[16], fru[17], fru[18],
4546 fru[19], fru[20], fru[21]);
4547 } else {
4548 seq_printf(seq,
4549 "Serial # : "
4550 "%c%c%c%c%c%c%c%c%c%c%c%c%c%c\n",
4551 fru[8], fru[9], fru[10],
4552 fru[11], fru[12], fru[13],
4553 fru[14], fru[15], fru[16],
4554 fru[17], fru[18], fru[19],
4555 fru[20], fru[21]);
4556 }
4557 break;
4558 }
4559
4560 default:
4561 {
4562 seq_printf(seq,
4563 "Vendor : Alacritech, Inc.\n");
4564 seq_printf(seq,
4565 "Serial # : Empty FRU\n");
4566 break;
4567 }
4568 }
4569
4570 switch (config->OEMFruFormat) {
4571 case VENDOR1_FRU_FORMAT:
4572 {
4573 seq_printf(seq, "FRU Information:\n");
4574 seq_printf(seq, " Commodity # : %c\n",
4575 oemfru[0]);
4576 seq_printf(seq,
4577 " Assembly # : %c%c%c%c\n",
4578 oemfru[1], oemfru[2], oemfru[3], oemfru[4]);
4579 seq_printf(seq,
4580 " Revision # : %c%c\n",
4581 oemfru[5], oemfru[6]);
4582 seq_printf(seq,
4583 " Supplier # : %c%c\n",
4584 oemfru[7], oemfru[8]);
4585 seq_printf(seq,
4586 " Date : %c%c\n",
4587 oemfru[9], oemfru[10]);
4588 seq_sprintf(seq,
4589 " Sequence # : %c%c%c\n",
4590 oemfru[11], oemfru[12], oemfru[13]);
4591 break;
4592 }
4593
4594 case VENDOR2_FRU_FORMAT:
4595 {
4596 seq_printf(seq, "FRU Information:\n");
4597 seq_printf(seq,
4598 " Part # : "
4599 "%c%c%c%c%c%c%c%c\n",
4600 oemfru[0], oemfru[1], oemfru[2],
4601 oemfru[3], oemfru[4], oemfru[5],
4602 oemfru[6], oemfru[7]);
4603 seq_printf(seq,
4604 " Supplier # : %c%c%c%c%c\n",
4605 oemfru[8], oemfru[9], oemfru[10],
4606 oemfru[11], oemfru[12]);
4607 seq_printf(seq,
4608 " Date : %c%c%c\n",
4609 oemfru[13], oemfru[14], oemfru[15]);
4610 seq_sprintf(seq,
4611 " Sequence # : %c%c%c%c\n",
4612 oemfru[16], oemfru[17], oemfru[18],
4613 oemfru[19]);
4614 break;
4615 }
4616
4617 case VENDOR3_FRU_FORMAT:
4618 {
4619 seq_printf(seq, "FRU Information:\n");
4620 }
4621
4622 case VENDOR4_FRU_FORMAT:
4623 {
4624 seq_printf(seq, "FRU Information:\n");
4625 seq_printf(seq,
4626 " FRU Number : "
4627 "%c%c%c%c%c%c%c%c\n",
4628 oemfru[0], oemfru[1], oemfru[2],
4629 oemfru[3], oemfru[4], oemfru[5],
4630 oemfru[6], oemfru[7]);
4631 seq_sprintf(seq,
4632 " Part Number : "
4633 "%c%c%c%c%c%c%c%c\n",
4634 oemfru[8], oemfru[9], oemfru[10],
4635 oemfru[11], oemfru[12], oemfru[13],
4636 oemfru[14], oemfru[15]);
4637 seq_printf(seq,
4638 " EC Level : "
4639 "%c%c%c%c%c%c%c%c\n",
4640 oemfru[16], oemfru[17], oemfru[18],
4641 oemfru[19], oemfru[20], oemfru[21],
4642 oemfru[22], oemfru[23]);
4643 break;
4644 }
4645
4646 default:
4647 break;
4648 }
4649 #endif
4650
4651 return 0;
4652 }
4653
slic_debug_adapter_show(struct seq_file * seq,void * v)4654 static int slic_debug_adapter_show(struct seq_file *seq, void *v)
4655 {
4656 struct adapter *adapter = seq->private;
4657
4658 if ((adapter->netdev) && (adapter->netdev->name)) {
4659 seq_printf(seq, "info: interface : %s\n",
4660 adapter->netdev->name);
4661 }
4662 seq_printf(seq, "info: status : %s\n",
4663 SLIC_LINKSTATE(adapter->linkstate));
4664 seq_printf(seq, "info: port : %d\n",
4665 adapter->physport);
4666 seq_printf(seq, "info: speed : %s\n",
4667 SLIC_SPEED(adapter->linkspeed));
4668 seq_printf(seq, "info: duplex : %s\n",
4669 SLIC_DUPLEX(adapter->linkduplex));
4670 seq_printf(seq, "info: irq : 0x%X\n",
4671 (uint) adapter->irq);
4672 seq_printf(seq, "info: Interrupt Agg Delay: %d usec\n",
4673 adapter->card->loadlevel_current);
4674 seq_printf(seq, "info: RcvQ max entries : %4.4X\n",
4675 SLIC_RCVQ_ENTRIES);
4676 seq_printf(seq, "info: RcvQ current : %4.4X\n",
4677 adapter->rcvqueue.count);
4678 seq_printf(seq, "rx stats: packets : %8.8lX\n",
4679 adapter->stats.rx_packets);
4680 seq_printf(seq, "rx stats: bytes : %8.8lX\n",
4681 adapter->stats.rx_bytes);
4682 seq_printf(seq, "rx stats: broadcasts : %8.8X\n",
4683 adapter->rcv_broadcasts);
4684 seq_printf(seq, "rx stats: multicasts : %8.8X\n",
4685 adapter->rcv_multicasts);
4686 seq_printf(seq, "rx stats: unicasts : %8.8X\n",
4687 adapter->rcv_unicasts);
4688 seq_printf(seq, "rx stats: errors : %8.8X\n",
4689 (u32) adapter->slic_stats.iface.rcv_errors);
4690 seq_printf(seq, "rx stats: Missed errors : %8.8X\n",
4691 (u32) adapter->slic_stats.iface.rcv_discards);
4692 seq_printf(seq, "rx stats: drops : %8.8X\n",
4693 (u32) adapter->rcv_drops);
4694 seq_printf(seq, "tx stats: packets : %8.8lX\n",
4695 adapter->stats.tx_packets);
4696 seq_printf(seq, "tx stats: bytes : %8.8lX\n",
4697 adapter->stats.tx_bytes);
4698 seq_printf(seq, "tx stats: errors : %8.8X\n",
4699 (u32) adapter->slic_stats.iface.xmt_errors);
4700 seq_printf(seq, "rx stats: multicasts : %8.8lX\n",
4701 adapter->stats.multicast);
4702 seq_printf(seq, "tx stats: collision errors : %8.8X\n",
4703 (u32) adapter->slic_stats.iface.xmit_collisions);
4704 seq_printf(seq, "perf: Max rcv frames/isr : %8.8X\n",
4705 adapter->max_isr_rcvs);
4706 seq_printf(seq, "perf: Rcv interrupt yields : %8.8X\n",
4707 adapter->rcv_interrupt_yields);
4708 seq_printf(seq, "perf: Max xmit complete/isr : %8.8X\n",
4709 adapter->max_isr_xmits);
4710 seq_printf(seq, "perf: error interrupts : %8.8X\n",
4711 adapter->error_interrupts);
4712 seq_printf(seq, "perf: error rmiss interrupts : %8.8X\n",
4713 adapter->error_rmiss_interrupts);
4714 seq_printf(seq, "perf: rcv interrupts : %8.8X\n",
4715 adapter->rcv_interrupts);
4716 seq_printf(seq, "perf: xmit interrupts : %8.8X\n",
4717 adapter->xmit_interrupts);
4718 seq_printf(seq, "perf: link event interrupts : %8.8X\n",
4719 adapter->linkevent_interrupts);
4720 seq_printf(seq, "perf: UPR interrupts : %8.8X\n",
4721 adapter->upr_interrupts);
4722 seq_printf(seq, "perf: interrupt count : %8.8X\n",
4723 adapter->num_isrs);
4724 seq_printf(seq, "perf: false interrupts : %8.8X\n",
4725 adapter->false_interrupts);
4726 seq_printf(seq, "perf: All register writes : %8.8X\n",
4727 adapter->all_reg_writes);
4728 seq_printf(seq, "perf: ICR register writes : %8.8X\n",
4729 adapter->icr_reg_writes);
4730 seq_printf(seq, "perf: ISR register writes : %8.8X\n",
4731 adapter->isr_reg_writes);
4732 seq_printf(seq, "ifevents: overflow 802 errors : %8.8X\n",
4733 adapter->if_events.oflow802);
4734 seq_printf(seq, "ifevents: transport overflow errors: %8.8X\n",
4735 adapter->if_events.Tprtoflow);
4736 seq_printf(seq, "ifevents: underflow errors : %8.8X\n",
4737 adapter->if_events.uflow802);
4738 seq_printf(seq, "ifevents: receive early : %8.8X\n",
4739 adapter->if_events.rcvearly);
4740 seq_printf(seq, "ifevents: buffer overflows : %8.8X\n",
4741 adapter->if_events.Bufov);
4742 seq_printf(seq, "ifevents: carrier errors : %8.8X\n",
4743 adapter->if_events.Carre);
4744 seq_printf(seq, "ifevents: Long : %8.8X\n",
4745 adapter->if_events.Longe);
4746 seq_printf(seq, "ifevents: invalid preambles : %8.8X\n",
4747 adapter->if_events.Invp);
4748 seq_printf(seq, "ifevents: CRC errors : %8.8X\n",
4749 adapter->if_events.Crc);
4750 seq_printf(seq, "ifevents: dribble nibbles : %8.8X\n",
4751 adapter->if_events.Drbl);
4752 seq_printf(seq, "ifevents: Code violations : %8.8X\n",
4753 adapter->if_events.Code);
4754 seq_printf(seq, "ifevents: TCP checksum errors : %8.8X\n",
4755 adapter->if_events.TpCsum);
4756 seq_printf(seq, "ifevents: TCP header short errors : %8.8X\n",
4757 adapter->if_events.TpHlen);
4758 seq_printf(seq, "ifevents: IP checksum errors : %8.8X\n",
4759 adapter->if_events.IpCsum);
4760 seq_printf(seq, "ifevents: IP frame incompletes : %8.8X\n",
4761 adapter->if_events.IpLen);
4762 seq_printf(seq, "ifevents: IP headers shorts : %8.8X\n",
4763 adapter->if_events.IpHlen);
4764
4765 return 0;
4766 }
slic_debug_adapter_open(struct inode * inode,struct file * file)4767 static int slic_debug_adapter_open(struct inode *inode, struct file *file)
4768 {
4769 return single_open(file, slic_debug_adapter_show, inode->i_private);
4770 }
4771
slic_debug_card_open(struct inode * inode,struct file * file)4772 static int slic_debug_card_open(struct inode *inode, struct file *file)
4773 {
4774 return single_open(file, slic_debug_card_show, inode->i_private);
4775 }
4776
4777 static const struct file_operations slic_debug_adapter_fops = {
4778 .owner = THIS_MODULE,
4779 .open = slic_debug_adapter_open,
4780 .read = seq_read,
4781 .llseek = seq_lseek,
4782 .release = single_release,
4783 };
4784
4785 static const struct file_operations slic_debug_card_fops = {
4786 .owner = THIS_MODULE,
4787 .open = slic_debug_card_open,
4788 .read = seq_read,
4789 .llseek = seq_lseek,
4790 .release = single_release,
4791 };
4792
slic_debug_adapter_create(struct adapter * adapter)4793 static void slic_debug_adapter_create(struct adapter *adapter)
4794 {
4795 struct dentry *d;
4796 char name[7];
4797 struct sliccard *card = adapter->card;
4798
4799 if (!card->debugfs_dir)
4800 return;
4801
4802 sprintf(name, "port%d", adapter->port);
4803 d = debugfs_create_file(name, S_IRUGO,
4804 card->debugfs_dir, adapter,
4805 &slic_debug_adapter_fops);
4806 if (!d || IS_ERR(d))
4807 pr_info(PFX "%s: debugfs create failed\n", name);
4808 else
4809 adapter->debugfs_entry = d;
4810 }
4811
slic_debug_adapter_destroy(struct adapter * adapter)4812 static void slic_debug_adapter_destroy(struct adapter *adapter)
4813 {
4814 if (adapter->debugfs_entry) {
4815 debugfs_remove(adapter->debugfs_entry);
4816 adapter->debugfs_entry = NULL;
4817 }
4818 }
4819
slic_debug_card_create(struct sliccard * card)4820 static void slic_debug_card_create(struct sliccard *card)
4821 {
4822 struct dentry *d;
4823 char name[IFNAMSIZ];
4824
4825 snprintf(name, sizeof(name), "slic%d", card->cardnum);
4826 d = debugfs_create_dir(name, slic_debugfs);
4827 if (!d || IS_ERR(d))
4828 pr_info(PFX "%s: debugfs create dir failed\n",
4829 name);
4830 else {
4831 card->debugfs_dir = d;
4832 d = debugfs_create_file("cardinfo", S_IRUGO,
4833 slic_debugfs, card,
4834 &slic_debug_card_fops);
4835 if (!d || IS_ERR(d))
4836 pr_info(PFX "%s: debugfs create failed\n",
4837 name);
4838 else
4839 card->debugfs_cardinfo = d;
4840 }
4841 }
4842
slic_debug_card_destroy(struct sliccard * card)4843 static void slic_debug_card_destroy(struct sliccard *card)
4844 {
4845 int i;
4846
4847 for (i = 0; i < card->card_size; i++) {
4848 struct adapter *adapter;
4849
4850 adapter = card->adapter[i];
4851 if (adapter)
4852 slic_debug_adapter_destroy(adapter);
4853 }
4854 if (card->debugfs_cardinfo) {
4855 debugfs_remove(card->debugfs_cardinfo);
4856 card->debugfs_cardinfo = NULL;
4857 }
4858 if (card->debugfs_dir) {
4859 debugfs_remove(card->debugfs_dir);
4860 card->debugfs_dir = NULL;
4861 }
4862 }
4863
slic_debug_init(void)4864 static void slic_debug_init(void)
4865 {
4866 struct dentry *ent;
4867
4868 ent = debugfs_create_dir("slic", NULL);
4869 if (!ent || IS_ERR(ent)) {
4870 pr_info(PFX "debugfs create directory failed\n");
4871 return;
4872 }
4873
4874 slic_debugfs = ent;
4875 }
4876
slic_debug_cleanup(void)4877 static void slic_debug_cleanup(void)
4878 {
4879 if (slic_debugfs) {
4880 debugfs_remove(slic_debugfs);
4881 slic_debugfs = NULL;
4882 }
4883 }
4884
4885 /*=============================================================================
4886 =============================================================================
4887 === ===
4888 === SLIC DUMP MANAGEMENT SECTION ===
4889 === ===
4890 === ===
4891 === Dump routines ===
4892 === ===
4893 === ===
4894 =============================================================================
4895 ============================================================================*/
4896
4897 #if SLIC_DUMP_ENABLED
4898
4899 #include <stdarg.h>
4900
4901 void *slic_dump_handle; /* thread handle */
4902
4903 /*
4904 * These are the only things you should do on a core-file: use only these
4905 * functions to write out all the necessary info.
4906 */
slic_dump_seek(struct file * SLIChandle,u32 file_offset)4907 static int slic_dump_seek(struct file *SLIChandle, u32 file_offset)
4908 {
4909 if (SLIChandle->f_pos != file_offset) {
4910 /*DBG_MSG("slic_dump_seek now needed [%x : %x]\n",
4911 (u32)SLIChandle->f_pos, (u32)file_offset); */
4912 if (SLIChandle->f_op->llseek) {
4913 if (SLIChandle->f_op->
4914 llseek(SLIChandle, file_offset, 0) != file_offset)
4915 return 0;
4916 } else {
4917 SLIChandle->f_pos = file_offset;
4918 }
4919 }
4920 return 1;
4921 }
4922
slic_dump_write(struct sliccard * card,const void * addr,int size,u32 file_offset)4923 static int slic_dump_write(struct sliccard *card,
4924 const void *addr, int size, u32 file_offset)
4925 {
4926 int r = 1;
4927 u32 result = 0;
4928 struct file *SLIChandle = card->dumphandle;
4929
4930 #ifdef HISTORICAL /* legacy */
4931 down(&SLIChandle->f_dentry->d_inode->i_sem);
4932 #endif
4933 if (size) {
4934 slic_dump_seek(SLIChandle, file_offset);
4935
4936 result =
4937 SLIChandle->f_op->write(SLIChandle, addr, size,
4938 &SLIChandle->f_pos);
4939
4940 r = result == size;
4941 }
4942
4943 card->dumptime_complete = jiffies;
4944 card->dumptime_delta = card->dumptime_complete - card->dumptime_start;
4945 card->dumptime_start = jiffies;
4946
4947 #ifdef HISTORICAL
4948 up(&SLIChandle->f_dentry->d_inode->i_sem);
4949 #endif
4950 if (!r) {
4951 DBG_ERROR("%s: addr[%p] size[%x] result[%x] file_offset[%x]\n",
4952 __func__, addr, size, result, file_offset);
4953 }
4954 return r;
4955 }
4956
slic_init_dump_thread(struct sliccard * card)4957 static uint slic_init_dump_thread(struct sliccard *card)
4958 {
4959 card->dump_task_id = kthread_run(slic_dump_thread, (void *)card, 0);
4960
4961 /* DBG_MSG("create slic_dump_thread dump_pid[%x]\n", card->dump_pid); */
4962 if (IS_ERR(card->dump_task_id)) {
4963 DBG_MSG("create slic_dump_thread FAILED \n");
4964 return STATUS_FAILURE;
4965 }
4966
4967 return STATUS_SUCCESS;
4968 }
4969
slic_dump_thread(void * context)4970 static int slic_dump_thread(void *context)
4971 {
4972 struct sliccard *card = (struct sliccard *)context;
4973 struct adapter *adapter;
4974 struct adapter *dump_adapter = NULL;
4975 u32 dump_complete = 0;
4976 u32 delay = SLIC_SECS_TO_JIFFS(PING_TIMER_INTERVAL);
4977 struct slic_regs *pregs;
4978 u32 i;
4979 struct slic_upr *upr, *uprnext;
4980 u32 dump_card;
4981
4982 ASSERT(card);
4983
4984 card->dumpthread_running = 1;
4985
4986 #ifdef HISTORICAL
4987 lock_kernel();
4988 /*
4989 * This thread doesn't need any user-level access,
4990 * so get rid of all our resources
4991 */
4992 exit_files(current); /* daemonize doesn't do exit_files */
4993 current->files = init_task.files;
4994 atomic_inc(¤t->files->count);
4995 #endif
4996
4997 daemonize("%s", "slicmon");
4998
4999 /* Setup a nice name */
5000 strcpy(current->comm, "slicmon");
5001 DBG_ERROR
5002 ("slic_dump_thread[slicmon] daemon is alive card[%p] pid[%x]\n",
5003 card, card->dump_task_id->pid);
5004
5005 /*
5006 * Send me a signal to get me to die (for debugging)
5007 */
5008 do {
5009 /*
5010 * If card state is not set to up, skip
5011 */
5012 if (card->state != CARD_UP) {
5013 if (card->adapters_activated)
5014 goto wait;
5015 else
5016 goto end_thread;
5017 }
5018 /*
5019 * Check the results of our last ping.
5020 */
5021 dump_card = 0;
5022 #ifdef SLIC_FAILURE_DUMP
5023 if (card->pingstatus != ISR_PINGMASK) {
5024 DBG_MSG
5025 ("\n[slicmon] CARD #%d TIMED OUT - status "
5026 "%x: DUMP THE CARD!\n",
5027 card->cardnum, card->pingstatus);
5028 dump_card = 1;
5029 }
5030 #else
5031 /*
5032 * Cause a card RESET instead?
5033 */
5034 if (card->pingstatus != ISR_PINGMASK) {
5035 /* todo. do we want to reset the card in production */
5036 /* DBG_MSG("\n[slicmon] CARD #%d TIMED OUT - "
5037 status %x: RESET THE CARD!\n", card->cardnum,
5038 card->pingstatus); */
5039 DBG_ERROR
5040 ("\n[slicmon] CARD #%d TIMED OUT - status %x: "
5041 "DUMP THE CARD!\n",
5042 card->cardnum, card->pingstatus);
5043 dump_card = 1;
5044 }
5045 #endif
5046 if ((dump_card)
5047 || (card->dump_requested == SLIC_DUMP_REQUESTED)) {
5048 if (card->dump_requested == SLIC_DUMP_REQUESTED) {
5049 DBG_ERROR
5050 ("[slicmon]: Dump card Requested: Card %x\n",
5051 card->cardnum);
5052 }
5053 if (card->pingstatus != ISR_PINGMASK) {
5054 ushort cpuid = 0;
5055 ushort crashpc = 0;
5056
5057 if (card->adapter[0]) {
5058 if ((card->adapter[0])->memorylength >=
5059 CRASH_INFO_OFFSET +
5060 sizeof(slic_crash_info)) {
5061 char *crashptr;
5062 p_slic_crash_info crashinfo;
5063
5064 crashptr =
5065 ((char *)card->adapter[0]->
5066 slic_regs) +
5067 CRASH_INFO_OFFSET;
5068 crashinfo =
5069 (p_slic_crash_info)
5070 crashptr;
5071 cpuid = crashinfo->cpu_id;
5072 crashpc = crashinfo->crash_pc;
5073 }
5074 }
5075 DBG_ERROR
5076 ("[slicmon]: Dump card: Card %x crashed "
5077 "and failed to answer PING. "
5078 "CPUID[%x] PC[%x]\n ",
5079 card->cardnum, cpuid, crashpc);
5080 }
5081
5082 card->dump_requested = SLIC_DUMP_IN_PROGRESS;
5083
5084 /*
5085 * Set the card state to DOWN and the adapter states
5086 * to RESET.They will check this in SimbaCheckForHang
5087 * and initiate interface reset (which in turn will
5088 * reinitialize the card).
5089 */
5090 card->state = CARD_DOWN;
5091
5092 for (i = 0; i < card->card_size; i++) {
5093 adapter = card->adapter[i];
5094 if (adapter) {
5095 slic_if_stop_queue(adapter);
5096
5097 if (adapter->state == ADAPT_UP) {
5098 adapter->state = ADAPT_RESET;
5099 adapter->linkstate = LINK_DOWN;
5100 DBG_ERROR
5101 ("[slicmon]: SLIC Card[%d] "
5102 "Port[%d] adapter[%p] "
5103 "down\n",
5104 (uint) card->cardnum,
5105 (uint) i, adapter);
5106 }
5107 #if SLIC_GET_STATS_TIMER_ENABLED
5108 /* free stats timer */
5109 if (adapter->statstimerset) {
5110 adapter->statstimerset = 0;
5111 del_timer(&adapter->statstimer);
5112 }
5113 #endif
5114 }
5115 }
5116
5117 for (i = 0; i < card->card_size; i++) {
5118 adapter = card->adapter[i];
5119 if ((adapter) && (adapter->activated)) {
5120 pregs = adapter->slic_regs;
5121 dump_adapter = adapter;
5122
5123 /*
5124 * If the dump status is zero, then
5125 * the utility processor has crashed.
5126 * If this is the case, any pending
5127 * utilityprocessor requests will not
5128 * complete and our dump commands will
5129 * not be issued.
5130 *
5131 * To avoid this we will clear any
5132 * pending utility processor requests
5133 * now.
5134 */
5135 if (!card->pingstatus) {
5136 spin_lock_irqsave(
5137 &adapter->upr_lock.lock,
5138 adapter->upr_lock.flags);
5139 upr = adapter->upr_list;
5140 while (upr) {
5141 uprnext = upr->next;
5142 kfree(upr);
5143 upr = uprnext;
5144 }
5145 adapter->upr_list = 0;
5146 adapter->upr_busy = 0;
5147 spin_unlock_irqrestore(
5148 &adapter->upr_lock.lock,
5149 adapter->upr_lock.flags);
5150 }
5151
5152 slic_dump_card(card, FALSE);
5153 dump_complete = 1;
5154 }
5155
5156 if (dump_complete) {
5157 DBG_ERROR("SLIC Dump Complete\n");
5158 /* Only dump the card one time */
5159 break;
5160 }
5161 }
5162
5163 if (dump_adapter) {
5164 DBG_ERROR
5165 ("slic dump completed. "
5166 "Reenable interfaces\n");
5167 slic_card_init(card, dump_adapter);
5168
5169 /*
5170 * Reenable the adapters that were reset
5171 */
5172 for (i = 0; i < card->card_size; i++) {
5173 adapter = card->adapter[i];
5174 if (adapter) {
5175 if (adapter->state ==
5176 ADAPT_RESET) {
5177 DBG_ERROR
5178 ("slicdump: SLIC "
5179 "Card[%d] Port[%d] adapter[%p] "
5180 "bring UP\n",
5181 (uint) card->
5182 cardnum, (uint) i,
5183 adapter);
5184 adapter->state =
5185 ADAPT_DOWN;
5186 adapter->linkstate =
5187 LINK_DOWN;
5188 slic_entry_open
5189 (adapter->netdev);
5190 }
5191 }
5192 }
5193
5194 card->dump_requested = SLIC_DUMP_DONE;
5195 }
5196 } else {
5197 /* if pingstatus != ISR_PINGMASK) || dump_requested...ELSE
5198 * We received a valid ping response.
5199 * Clear the Pingstatus field, find a valid adapter
5200 * structure and send another ping.
5201 */
5202 for (i = 0; i < card->card_size; i++) {
5203 adapter = card->adapter[i];
5204 if (adapter && (adapter->state == ADAPT_UP)) {
5205 card->pingstatus = 0;
5206 slic_upr_request(adapter, SLIC_UPR_PING,
5207 0, 0, 0, 0);
5208 break; /* Only issue one per card */
5209 }
5210 }
5211 }
5212 wait:
5213 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq, delay);
5214 } while (!signal_pending(current));
5215
5216 end_thread:
5217 /* DBG_MSG("[slicmon] slic_dump_thread card[%p] pid[%x] ENDING\n",
5218 card, card->dump_pid); */
5219 card->dumpthread_running = 0;
5220
5221 return 0;
5222 }
5223
5224 /*
5225 * Read a single byte from our dump index file. This
5226 * value is used as our suffix for our dump path. The
5227 * value is incremented and written back to the file
5228 */
slic_get_dump_index(char * path)5229 static unsigned char slic_get_dump_index(char *path)
5230 {
5231 unsigned char index = 0;
5232 #ifdef SLIC_DUMP_INDEX_SUPPORT
5233 u32 status;
5234 void *FileHandle;
5235 u32 offset;
5236
5237 offset = 0;
5238
5239 /*
5240 * Open the index file. If one doesn't exist, create it
5241 */
5242 status = create_file(&FileHandle);
5243
5244 if (status != STATUS_SUCCESS)
5245 return (unsigned char) 0;
5246
5247 status = read_file(FileHandle, &index, 1, &offset);
5248
5249 index++;
5250
5251 status = write_file(FileHandle, &index, 1, &offset);
5252
5253 close_file(FileHandle);
5254 #else
5255 index = 0;
5256 #endif
5257 return index;
5258 }
5259
slic_dump_open_file(struct sliccard * card)5260 static struct file *slic_dump_open_file(struct sliccard *card)
5261 {
5262 struct file *SLIChandle = NULL;
5263 struct dentry *dentry = NULL;
5264 struct inode *inode = NULL;
5265 char SLICfile[50];
5266
5267 card->dumpfile_fs = get_fs();
5268
5269 set_fs(KERNEL_DS);
5270
5271 memset(SLICfile, 0, sizeof(SLICfile));
5272 sprintf(SLICfile, "/var/tmp/slic%d-dump-%d", card->cardnum,
5273 (uint) card->dump_count);
5274 card->dump_count++;
5275
5276 SLIChandle =
5277 filp_open(SLICfile, O_CREAT | O_RDWR | O_SYNC | O_LARGEFILE, 0666);
5278
5279 DBG_MSG("[slicmon]: Dump Card #%d to file: %s \n", card->cardnum,
5280 SLICfile);
5281
5282 /* DBG_MSG("[slicmon] filp_open %s SLIChandle[%p]\n", SLICfile, SLIChandle);*/
5283
5284 if (IS_ERR(SLIChandle))
5285 goto end_slicdump;
5286
5287 dentry = SLIChandle->f_dentry;
5288 inode = dentry->d_inode;
5289
5290 /* DBG_MSG("[slicmon] inode[%p] i_nlink[%x] i_mode[%x] i_op[%p] i_fop[%p]\n"
5291 "f_op->write[%p]\n",
5292 inode, inode->i_nlink, inode->i_mode, inode->i_op,
5293 inode->i_fop, SLIChandle->f_op->write); */
5294 if (inode->i_nlink > 1)
5295 goto close_slicdump; /* multiple links - don't dump */
5296 #ifdef HISTORICAL
5297 if (!S_ISREG(inode->i_mode))
5298 goto close_slicdump;
5299 #endif
5300 if (!inode->i_op || !inode->i_fop)
5301 goto close_slicdump;
5302
5303 if (!SLIChandle->f_op->write)
5304 goto close_slicdump;
5305
5306 /*
5307 * If we got here we have SUCCESSFULLY OPENED the dump file
5308 */
5309 /* DBG_MSG("opened %s SLIChandle[%p]\n", SLICfile, SLIChandle); */
5310 return SLIChandle;
5311
5312 close_slicdump:
5313 DBG_MSG("[slicmon] slic_dump_open_file failed close SLIChandle[%p]\n",
5314 SLIChandle);
5315 filp_close(SLIChandle, NULL);
5316
5317 end_slicdump:
5318 set_fs(card->dumpfile_fs);
5319
5320 return NULL;
5321 }
5322
slic_dump_close_file(struct sliccard * card)5323 static void slic_dump_close_file(struct sliccard *card)
5324 {
5325
5326 /* DBG_MSG("[slicmon] slic_dump_CLOSE_file close SLIChandle[%p]\n",
5327 card->dumphandle); */
5328
5329 filp_close(card->dumphandle, NULL);
5330
5331 set_fs(card->dumpfile_fs);
5332 }
5333
slic_dump_card(struct sliccard * card,bool resume)5334 static u32 slic_dump_card(struct sliccard *card, bool resume)
5335 {
5336 struct adapter *adapter = card->master;
5337 u32 status;
5338 u32 queue;
5339 u32 len, offset;
5340 u32 sram_size, dram_size, regs;
5341 struct sliccore_hdr corehdr;
5342 u32 file_offset;
5343 char *namestr;
5344 u32 i;
5345 u32 max_queues = 0;
5346 u32 result;
5347
5348 card->dumphandle = slic_dump_open_file(card);
5349
5350 if (card->dumphandle == NULL) {
5351 DBG_MSG("[slicmon] Cant create Dump file - dump failed\n");
5352 return -ENOMEM;
5353 }
5354 if (!card->dumpbuffer) {
5355 DBG_MSG("[slicmon] Insufficient memory for dump\n");
5356 return -ENOMEM;
5357 }
5358 if (!card->cmdbuffer) {
5359 DBG_MSG("[slicmon] Insufficient cmd memory for dump\n");
5360 return -ENOMEM;
5361 }
5362
5363 /*
5364 * Write the file version to the core header.
5365 */
5366 namestr = slic_proc_version;
5367 for (i = 0; i < (DRIVER_NAME_SIZE - 1); i++, namestr++) {
5368 if (!namestr)
5369 break;
5370 corehdr.driver_version[i] = *namestr;
5371 }
5372 corehdr.driver_version[i] = 0;
5373
5374 file_offset = sizeof(struct sliccore_hdr);
5375
5376 /*
5377 * Issue the following debug commands to the SLIC:
5378 * - Halt both receive and transmit
5379 * - Dump receive registers
5380 * - Dump transmit registers
5381 * - Dump sram
5382 * - Dump dram
5383 * - Dump queues
5384 */
5385 DBG_MSG("slicDump HALT Receive Processor\n");
5386 card->dumptime_start = jiffies;
5387
5388 status = slic_dump_halt(card, PROC_RECEIVE);
5389 if (status != STATUS_SUCCESS) {
5390 DBG_ERROR
5391 ("Cant halt receive sequencer - dump failed status[%x]\n",
5392 status);
5393 goto done;
5394 }
5395
5396 DBG_MSG("slicDump HALT Transmit Processor\n");
5397 status = slic_dump_halt(card, PROC_TRANSMIT);
5398 if (status != STATUS_SUCCESS) {
5399 DBG_ERROR("Cant halt transmit sequencer - dump failed\n");
5400 goto done;
5401 }
5402
5403 /* Dump receive regs */
5404 status = slic_dump_reg(card, PROC_RECEIVE);
5405 if (status != STATUS_SUCCESS) {
5406 DBG_ERROR("Cant dump receive registers - dump failed\n");
5407 goto done;
5408 }
5409
5410 DBG_MSG("slicDump Write Receive REGS len[%x] offset[%x]\n",
5411 (SLIC_NUM_REG * 4), file_offset);
5412
5413 result =
5414 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5415 file_offset);
5416 if (!result) {
5417 DBG_ERROR
5418 ("Cant write rcv registers to dump file - dump failed\n");
5419 goto done;
5420 }
5421
5422 corehdr.RcvRegOff = file_offset;
5423 corehdr.RcvRegsize = SLIC_NUM_REG * 4;
5424 file_offset += SLIC_NUM_REG * 4;
5425
5426 /* Dump transmit regs */
5427 status = slic_dump_reg(card, PROC_TRANSMIT);
5428 if (status != STATUS_SUCCESS) {
5429 DBG_ERROR("Cant dump transmit registers - dump failed\n");
5430 goto done;
5431 }
5432
5433 DBG_MSG("slicDump Write XMIT REGS len[%x] offset[%x]\n",
5434 (SLIC_NUM_REG * 4), file_offset);
5435
5436 result =
5437 slic_dump_write(card, card->dumpbuffer, SLIC_NUM_REG * 4,
5438 file_offset);
5439 if (!result) {
5440 DBG_ERROR
5441 ("Cant write xmt registers to dump file - dump failed\n");
5442 goto done;
5443 }
5444
5445 corehdr.XmtRegOff = file_offset;
5446 corehdr.XmtRegsize = SLIC_NUM_REG * 4;
5447 file_offset += SLIC_NUM_REG * 4;
5448
5449 regs = SLIC_GBMAX_REG;
5450
5451 corehdr.FileRegOff = file_offset;
5452 corehdr.FileRegsize = regs * 4;
5453
5454 for (offset = 0; regs;) {
5455 len = MIN(regs, 16); /* Can only xfr 16 regs at a time */
5456
5457 status = slic_dump_data(card, offset, (ushort) len, DESC_RFILE);
5458
5459 if (status != STATUS_SUCCESS) {
5460 DBG_ERROR("Cant dump register file - dump failed\n");
5461 goto done;
5462 }
5463
5464 DBG_MSG("slicDump Write RegisterFile len[%x] offset[%x]\n",
5465 (len * 4), file_offset);
5466
5467 result =
5468 slic_dump_write(card, card->dumpbuffer, len * 4,
5469 file_offset);
5470 if (!result) {
5471 DBG_ERROR
5472 ("Cant write register file to dump file - "
5473 "dump failed\n");
5474 goto done;
5475 }
5476
5477 file_offset += len * 4;
5478 offset += len;
5479 regs -= len;
5480 }
5481
5482 dram_size = card->config.DramSize * 0x10000;
5483
5484 switch (adapter->devid) {
5485 case SLIC_2GB_DEVICE_ID:
5486 sram_size = SLIC_SRAM_SIZE2GB;
5487 break;
5488 case SLIC_1GB_DEVICE_ID:
5489 sram_size = SLIC_SRAM_SIZE1GB;
5490 break;
5491 default:
5492 sram_size = 0;
5493 ASSERT(0);
5494 break;
5495 }
5496
5497 corehdr.SramOff = file_offset;
5498 corehdr.Sramsize = sram_size;
5499
5500 for (offset = 0; sram_size;) {
5501 len = MIN(sram_size, DUMP_BUF_SIZE);
5502 status = slic_dump_data(card, offset, (ushort) len, DESC_SRAM);
5503 if (status != STATUS_SUCCESS) {
5504 DBG_ERROR
5505 ("[slicmon] Cant dump SRAM at offset %x - "
5506 "dump failed\n", (uint) offset);
5507 goto done;
5508 }
5509
5510 DBG_MSG("[slicmon] slicDump Write SRAM len[%x] offset[%x]\n",
5511 len, file_offset);
5512
5513 result =
5514 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5515 if (!result) {
5516 DBG_ERROR
5517 ("[slicmon] Cant write SRAM to dump file - "
5518 "dump failed\n");
5519 goto done;
5520 }
5521
5522 file_offset += len;
5523 offset += len;
5524 sram_size -= len;
5525 }
5526
5527 corehdr.DramOff = file_offset;
5528 corehdr.Dramsize = dram_size;
5529
5530 for (offset = 0; dram_size;) {
5531 len = MIN(dram_size, DUMP_BUF_SIZE);
5532
5533 status = slic_dump_data(card, offset, (ushort) len, DESC_DRAM);
5534 if (status != STATUS_SUCCESS) {
5535 DBG_ERROR
5536 ("[slicmon] Cant dump dram at offset %x - "
5537 "dump failed\n", (uint) offset);
5538 goto done;
5539 }
5540
5541 DBG_MSG("slicDump Write DRAM len[%x] offset[%x]\n", len,
5542 file_offset);
5543
5544 result =
5545 slic_dump_write(card, card->dumpbuffer, len, file_offset);
5546 if (!result) {
5547 DBG_ERROR
5548 ("[slicmon] Cant write DRAM to dump file - "
5549 "dump failed\n");
5550 goto done;
5551 }
5552
5553 file_offset += len;
5554 offset += len;
5555 dram_size -= len;
5556 }
5557
5558 max_queues = SLIC_MAX_QUEUE;
5559
5560 for (queue = 0; queue < max_queues; queue++) {
5561 u32 *qarray = (u32 *) card->dumpbuffer;
5562 u32 qarray_physl = card->dumpbuffer_physl;
5563 u32 qarray_physh = card->dumpbuffer_physh;
5564 u32 qstart;
5565 u32 qdelta;
5566 u32 qtotal = 0;
5567
5568 DBG_MSG("[slicmon] Start Dump of QUEUE #0x%x\n", (uint) queue);
5569
5570 for (offset = 0; offset < (DUMP_BUF_SIZE >> 2); offset++) {
5571 qstart = jiffies;
5572 qdelta = 0;
5573
5574 status = slic_dump_queue(card,
5575 qarray_physl,
5576 qarray_physh, queue);
5577 qarray_physl += 4;
5578
5579 if (status != STATUS_SUCCESS)
5580 break;
5581
5582 if (jiffies > qstart) {
5583 qdelta = jiffies - qstart;
5584 qtotal += qdelta;
5585 }
5586 }
5587
5588 if (offset)
5589 qdelta = qtotal / offset;
5590 else
5591 qdelta = 0;
5592
5593 /* DBG_MSG(" slicDump Write QUEUE #0x%x len[%x] offset[%x] "
5594 "avgjiffs[%x]\n", queue, (offset*4), file_offset, qdelta); */
5595
5596 result =
5597 slic_dump_write(card, card->dumpbuffer, offset * 4,
5598 file_offset);
5599
5600 if (!result) {
5601 DBG_ERROR
5602 ("[slicmon] Cant write QUEUES to dump file - "
5603 "dump failed\n");
5604 goto done;
5605 }
5606
5607 corehdr.queues[queue].queueOff = file_offset;
5608 corehdr.queues[queue].queuesize = offset * 4;
5609 file_offset += offset * 4;
5610
5611 /* DBG_MSG(" Reload QUEUE #0x%x elements[%x]\n", (uint)queue, offset);*/
5612 /*
5613 * Fill the queue back up
5614 */
5615 for (i = 0; i < offset; i++) {
5616 qstart = jiffies;
5617 qdelta = 0;
5618
5619 status = slic_dump_load_queue(card, qarray[i], queue);
5620 if (status != STATUS_SUCCESS)
5621 break;
5622
5623 if (jiffies > qstart) {
5624 qdelta = jiffies - qstart;
5625 qtotal += qdelta;
5626 }
5627 }
5628
5629 if (offset)
5630 qdelta = qtotal / offset;
5631 else
5632 qdelta = 0;
5633
5634 /* DBG_MSG(" Reload DONE avgjiffs[%x]\n", qdelta); */
5635
5636 resume = 1;
5637 }
5638
5639 len = SLIC_GB_CAMAB_SZE * 4;
5640 status = slic_dump_cam(card, 0, len, DUMP_CAM_A);
5641 if (status != STATUS_SUCCESS) {
5642 DBG_ERROR("[slicmon] Can't dump CAM_A - dump failed\n");
5643 goto done;
5644 }
5645
5646 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5647 if (result) {
5648 DBG_ERROR
5649 ("[slicmon] Can't write CAM_A data to dump file - "
5650 "dump failed\n");
5651 goto done;
5652 }
5653 corehdr.CamAMOff = file_offset;
5654 corehdr.CamASize = len;
5655 file_offset += len;
5656
5657 len = SLIC_GB_CAMCD_SZE * 4;
5658 status = slic_dump_cam(card, 0, len, DUMP_CAM_C);
5659 if (status) {
5660 DBG_ERROR("[slicmon] Can't dump CAM_C - dump failed\n");
5661 goto done;
5662 }
5663
5664 result = slic_dump_write(card, card->dumpbuffer, len, file_offset);
5665 if (result) {
5666 DBG_ERROR
5667 ("[slicmon] Can't write CAM_C data to dump file - "
5668 "dump failed\n");
5669 goto done;
5670 }
5671 corehdr.CamCMOff = file_offset;
5672 corehdr.CamCSize = len;
5673 file_offset += len;
5674
5675 done:
5676 /*
5677 * Write out the core header
5678 */
5679 file_offset = 0;
5680 DBG_MSG("[slicmon] Write CoreHeader len[%x] offset[%x]\n",
5681 (uint) sizeof(struct sliccore_hdr), file_offset);
5682
5683 result =
5684 slic_dump_write(card, &corehdr, sizeof(struct sliccore_hdr),
5685 file_offset);
5686 DBG_MSG("[slicmon] corehdr xoff[%x] xsz[%x]\n"
5687 " roff[%x] rsz[%x] fileoff[%x] filesz[%x]\n"
5688 " sramoff[%x] sramsz[%x], dramoff[%x] dramsz[%x]\n"
5689 " corehdr_offset[%x]\n", corehdr.XmtRegOff,
5690 corehdr.XmtRegsize, corehdr.RcvRegOff, corehdr.RcvRegsize,
5691 corehdr.FileRegOff, corehdr.FileRegsize, corehdr.SramOff,
5692 corehdr.Sramsize, corehdr.DramOff, corehdr.Dramsize,
5693 (uint) sizeof(struct sliccore_hdr));
5694 for (i = 0; i < max_queues; i++) {
5695 DBG_MSG("[slicmon] QUEUE 0x%x offset[%x] size[%x]\n",
5696 (uint) i, corehdr.queues[i].queueOff,
5697 corehdr.queues[i].queuesize);
5698
5699 }
5700
5701 slic_dump_close_file(card);
5702
5703 if (resume) {
5704 DBG_MSG("slicDump RESTART RECEIVE and XMIT PROCESSORS\n\n");
5705 slic_dump_resume(card, PROC_RECEIVE);
5706 slic_dump_resume(card, PROC_TRANSMIT);
5707 }
5708
5709 return status;
5710 }
5711
slic_dump_halt(struct sliccard * card,unsigned char proc)5712 static u32 slic_dump_halt(struct sliccard *card, unsigned char proc)
5713 {
5714 unsigned char *cmd = card->cmdbuffer;
5715
5716 *cmd = COMMAND_BYTE(CMD_HALT, 0, proc);
5717
5718 return slic_dump_send_cmd(card,
5719 card->cmdbuffer_physl,
5720 card->cmdbuffer_physh, 0, 0);
5721 }
5722
slic_dump_resume(struct sliccard * card,unsigned char proc)5723 static u32 slic_dump_resume(struct sliccard *card, unsigned char proc)
5724 {
5725 unsigned char *cmd = card->cmdbuffer;
5726
5727 *cmd = COMMAND_BYTE(CMD_RUN, 0, proc);
5728
5729 return slic_dump_send_cmd(card,
5730 card->cmdbuffer_physl,
5731 card->cmdbuffer_physh, 0, 0);
5732 }
5733
slic_dump_reg(struct sliccard * card,unsigned char proc)5734 static u32 slic_dump_reg(struct sliccard *card, unsigned char proc)
5735 {
5736 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5737
5738 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, proc);
5739 dump->desc = DESC_REG;
5740 dump->count = 0;
5741 dump->addr = 0;
5742
5743 return slic_dump_send_cmd(card,
5744 card->cmdbuffer_physl,
5745 card->cmdbuffer_physh,
5746 card->dumpbuffer_physl,
5747 card->dumpbuffer_physh);
5748 }
5749
slic_dump_data(struct sliccard * card,u32 addr,ushort count,unsigned char desc)5750 static u32 slic_dump_data(struct sliccard *card,
5751 u32 addr, ushort count, unsigned char desc)
5752 {
5753 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5754
5755 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5756 dump->desc = desc;
5757 dump->count = count;
5758 dump->addr = addr;
5759
5760 return slic_dump_send_cmd(card,
5761 card->cmdbuffer_physl,
5762 card->cmdbuffer_physh,
5763 card->dumpbuffer_physl,
5764 card->dumpbuffer_physh);
5765 }
5766
slic_dump_queue(struct sliccard * card,u32 addr,u32 buf_physh,u32 queue)5767 static u32 slic_dump_queue(struct sliccard *card,
5768 u32 addr, u32 buf_physh, u32 queue)
5769 {
5770 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5771
5772 dump->cmd = COMMAND_BYTE(CMD_DUMP, 0, PROC_RECEIVE);
5773 dump->desc = DESC_QUEUE;
5774 dump->count = 1;
5775 dump->addr = queue;
5776
5777 return slic_dump_send_cmd(card,
5778 card->cmdbuffer_physl,
5779 card->cmdbuffer_physh,
5780 addr, card->dumpbuffer_physh);
5781 }
5782
slic_dump_load_queue(struct sliccard * card,u32 data,u32 queue)5783 static u32 slic_dump_load_queue(struct sliccard *card, u32 data,
5784 u32 queue)
5785 {
5786 struct dump_cmd *load = (struct dump_cmd *) card->cmdbuffer;
5787
5788 load->cmd = COMMAND_BYTE(CMD_LOAD, 0, PROC_RECEIVE);
5789 load->desc = DESC_QUEUE;
5790 load->count = (ushort) queue;
5791 load->addr = data;
5792
5793 return slic_dump_send_cmd(card,
5794 card->cmdbuffer_physl,
5795 card->cmdbuffer_physh, 0, 0);
5796 }
5797
slic_dump_cam(struct sliccard * card,u32 addr,u32 count,unsigned char desc)5798 static u32 slic_dump_cam(struct sliccard *card,
5799 u32 addr, u32 count, unsigned char desc)
5800 {
5801 struct dump_cmd *dump = (struct dump_cmd *)card->cmdbuffer;
5802
5803 dump->cmd = COMMAND_BYTE(CMD_CAM_OPS, 0, PROC_NONE);
5804 dump->desc = desc;
5805 dump->count = count;
5806 dump->addr = 0;
5807
5808 return slic_dump_send_cmd(card,
5809 card->cmdbuffer_physl,
5810 card->cmdbuffer_physh,
5811 addr, card->dumpbuffer_physh);
5812 }
5813
slic_dump_send_cmd(struct sliccard * card,u32 cmd_physl,u32 cmd_physh,u32 buf_physl,u32 buf_physh)5814 static u32 slic_dump_send_cmd(struct sliccard *card,
5815 u32 cmd_physl,
5816 u32 cmd_physh,
5817 u32 buf_physl, u32 buf_physh)
5818 {
5819 ulong timeout = SLIC_MS_TO_JIFFIES(500); /* 500 msec */
5820 u32 attempts = 5;
5821 u32 delay = SLIC_MS_TO_JIFFIES(10); /* 10 msec */
5822 struct adapter *adapter = card->master;
5823
5824 ASSERT(adapter);
5825 do {
5826 /*
5827 * Zero the Dumpstatus field of the adapter structure
5828 */
5829 card->dumpstatus = 0;
5830 /*
5831 * Issue the dump command via a utility processor request.
5832 *
5833 * Kludge: We use the Informationbuffer parameter to hold
5834 * the buffer address
5835 */
5836 slic_upr_request(adapter, SLIC_UPR_DUMP, cmd_physl, cmd_physh,
5837 buf_physl, buf_physh);
5838
5839 timeout += jiffies;
5840 /*
5841 * Spin until completion or timeout.
5842 */
5843 while (!card->dumpstatus) {
5844 int num_sleeps = 0;
5845
5846 if (jiffies > timeout) {
5847 /*
5848 * Complete the timed-out DUMP UPR request.
5849 */
5850 slic_upr_request_complete(adapter, 0);
5851 DBG_ERROR
5852 ("%s: TIMED OUT num_sleeps[%x] "
5853 "status[%x]\n",
5854 __func__, num_sleeps, STATUS_FAILURE);
5855
5856 return STATUS_FAILURE;
5857 }
5858 num_sleeps++;
5859 SLIC_INTERRUPTIBLE_SLEEP_ON_TIMEOUT(card->dump_wq,
5860 delay);
5861 }
5862
5863 if (card->dumpstatus & ISR_UPCERR) {
5864 /*
5865 * Error (or queue empty)
5866 */
5867 /* DBG_ERROR("[slicmon] %s: DUMP_STATUS & ISR_UPCERR status[%x]\n",
5868 __func__, STATUS_FAILURE); */
5869
5870 return STATUS_FAILURE;
5871 } else if (card->dumpstatus & ISR_UPCBSY) {
5872 /*
5873 * Retry
5874 */
5875 DBG_ERROR("%s: ISR_UPCBUSY attempt[%x]\n", __func__,
5876 attempts);
5877
5878 attempts--;
5879 } else {
5880 /*
5881 * success
5882 */
5883 return STATUS_SUCCESS;
5884 }
5885
5886 } while (attempts);
5887
5888 DBG_ERROR("%s: GAVE UP AFTER SEVERAL ATTEMPTS status[%x]\n",
5889 __func__, STATUS_FAILURE);
5890
5891 /*
5892 * Gave up after several attempts
5893 */
5894 return STATUS_FAILURE;
5895 }
5896
5897 #endif
5898 /*=============================================================================
5899 =============================================================================
5900 === ===
5901 === *** END **** END **** END **** END *** ===
5902 === SLIC DUMP MANAGEMENT SECTION ===
5903 === ===
5904 === ===
5905 === ===
5906 =============================================================================
5907 ============================================================================*/
5908
5909 /******************************************************************************/
5910 /**************** MODULE INITIATION / TERMINATION FUNCTIONS ***************/
5911 /******************************************************************************/
5912
5913 static struct pci_driver slic_driver = {
5914 .name = DRV_NAME,
5915 .id_table = slic_pci_tbl,
5916 .probe = slic_entry_probe,
5917 .remove = slic_entry_remove,
5918 #if SLIC_POWER_MANAGEMENT_ENABLED
5919 .suspend = slicpm_suspend,
5920 .resume = slicpm_resume,
5921 #endif
5922 /* .shutdown = slic_shutdown, MOOK_INVESTIGATE */
5923 };
5924
slic_module_init(void)5925 static int __init slic_module_init(void)
5926 {
5927 struct pci_device_id *pcidev;
5928 int ret;
5929
5930 /* DBG_MSG("slicoss: %s ENTER cpu %d\n", __func__, smp_processor_id()); */
5931
5932 slic_init_driver();
5933
5934 if (debug >= 0 && slic_debug != debug)
5935 printk(SLICLEVEL "slicoss: debug level is %d.\n", debug);
5936 if (debug >= 0)
5937 slic_debug = debug;
5938
5939 pcidev = (struct pci_device_id *)slic_driver.id_table;
5940 /* DBG_MSG("slicoss: %s call pci_module_init jiffies[%lx] cpu #%d\n",
5941 __func__, jiffies, smp_processor_id()); */
5942
5943 ret = pci_register_driver(&slic_driver);
5944
5945 /* DBG_MSG("slicoss: %s EXIT after call pci_module_init jiffies[%lx] "
5946 "cpu #%d status[%x]\n",__func__, jiffies,
5947 smp_processor_id(), ret); */
5948
5949 return ret;
5950 }
5951
slic_module_cleanup(void)5952 static void __exit slic_module_cleanup(void)
5953 {
5954 /* DBG_MSG("slicoss: %s ENTER\n", __func__); */
5955 pci_unregister_driver(&slic_driver);
5956 slic_debug_cleanup();
5957 /* DBG_MSG("slicoss: %s EXIT\n", __func__); */
5958 }
5959
5960 module_init(slic_module_init);
5961 module_exit(slic_module_cleanup);
5962