1 /* cg6.c: CGSIX (GX, GXplus, TGX) frame buffer driver
2 *
3 * Copyright (C) 2003, 2006 David S. Miller (davem@davemloft.net)
4 * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5 * Copyright (C) 1996 Miguel de Icaza (miguel@nuclecu.unam.mx)
6 * Copyright (C) 1996 Eddie C. Dost (ecd@skynet.be)
7 *
8 * Driver layout based loosely on tgafb.c, see that file for credits.
9 */
10
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/errno.h>
14 #include <linux/string.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/init.h>
18 #include <linux/fb.h>
19 #include <linux/mm.h>
20 #include <linux/of_device.h>
21
22 #include <asm/io.h>
23 #include <asm/fbio.h>
24
25 #include "sbuslib.h"
26
27 /*
28 * Local functions.
29 */
30
31 static int cg6_setcolreg(unsigned, unsigned, unsigned, unsigned,
32 unsigned, struct fb_info *);
33 static int cg6_blank(int, struct fb_info *);
34
35 static void cg6_imageblit(struct fb_info *, const struct fb_image *);
36 static void cg6_fillrect(struct fb_info *, const struct fb_fillrect *);
37 static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area);
38 static int cg6_sync(struct fb_info *);
39 static int cg6_mmap(struct fb_info *, struct vm_area_struct *);
40 static int cg6_ioctl(struct fb_info *, unsigned int, unsigned long);
41 static int cg6_pan_display(struct fb_var_screeninfo *, struct fb_info *);
42
43 /*
44 * Frame buffer operations
45 */
46
47 static struct fb_ops cg6_ops = {
48 .owner = THIS_MODULE,
49 .fb_setcolreg = cg6_setcolreg,
50 .fb_blank = cg6_blank,
51 .fb_pan_display = cg6_pan_display,
52 .fb_fillrect = cg6_fillrect,
53 .fb_copyarea = cg6_copyarea,
54 .fb_imageblit = cg6_imageblit,
55 .fb_sync = cg6_sync,
56 .fb_mmap = cg6_mmap,
57 .fb_ioctl = cg6_ioctl,
58 #ifdef CONFIG_COMPAT
59 .fb_compat_ioctl = sbusfb_compat_ioctl,
60 #endif
61 };
62
63 /* Offset of interesting structures in the OBIO space */
64 /*
65 * Brooktree is the video dac and is funny to program on the cg6.
66 * (it's even funnier on the cg3)
67 * The FBC could be the frame buffer control
68 * The FHC could is the frame buffer hardware control.
69 */
70 #define CG6_ROM_OFFSET 0x0UL
71 #define CG6_BROOKTREE_OFFSET 0x200000UL
72 #define CG6_DHC_OFFSET 0x240000UL
73 #define CG6_ALT_OFFSET 0x280000UL
74 #define CG6_FHC_OFFSET 0x300000UL
75 #define CG6_THC_OFFSET 0x301000UL
76 #define CG6_FBC_OFFSET 0x700000UL
77 #define CG6_TEC_OFFSET 0x701000UL
78 #define CG6_RAM_OFFSET 0x800000UL
79
80 /* FHC definitions */
81 #define CG6_FHC_FBID_SHIFT 24
82 #define CG6_FHC_FBID_MASK 255
83 #define CG6_FHC_REV_SHIFT 20
84 #define CG6_FHC_REV_MASK 15
85 #define CG6_FHC_FROP_DISABLE (1 << 19)
86 #define CG6_FHC_ROW_DISABLE (1 << 18)
87 #define CG6_FHC_SRC_DISABLE (1 << 17)
88 #define CG6_FHC_DST_DISABLE (1 << 16)
89 #define CG6_FHC_RESET (1 << 15)
90 #define CG6_FHC_LITTLE_ENDIAN (1 << 13)
91 #define CG6_FHC_RES_MASK (3 << 11)
92 #define CG6_FHC_1024 (0 << 11)
93 #define CG6_FHC_1152 (1 << 11)
94 #define CG6_FHC_1280 (2 << 11)
95 #define CG6_FHC_1600 (3 << 11)
96 #define CG6_FHC_CPU_MASK (3 << 9)
97 #define CG6_FHC_CPU_SPARC (0 << 9)
98 #define CG6_FHC_CPU_68020 (1 << 9)
99 #define CG6_FHC_CPU_386 (2 << 9)
100 #define CG6_FHC_TEST (1 << 8)
101 #define CG6_FHC_TEST_X_SHIFT 4
102 #define CG6_FHC_TEST_X_MASK 15
103 #define CG6_FHC_TEST_Y_SHIFT 0
104 #define CG6_FHC_TEST_Y_MASK 15
105
106 /* FBC mode definitions */
107 #define CG6_FBC_BLIT_IGNORE 0x00000000
108 #define CG6_FBC_BLIT_NOSRC 0x00100000
109 #define CG6_FBC_BLIT_SRC 0x00200000
110 #define CG6_FBC_BLIT_ILLEGAL 0x00300000
111 #define CG6_FBC_BLIT_MASK 0x00300000
112
113 #define CG6_FBC_VBLANK 0x00080000
114
115 #define CG6_FBC_MODE_IGNORE 0x00000000
116 #define CG6_FBC_MODE_COLOR8 0x00020000
117 #define CG6_FBC_MODE_COLOR1 0x00040000
118 #define CG6_FBC_MODE_HRMONO 0x00060000
119 #define CG6_FBC_MODE_MASK 0x00060000
120
121 #define CG6_FBC_DRAW_IGNORE 0x00000000
122 #define CG6_FBC_DRAW_RENDER 0x00008000
123 #define CG6_FBC_DRAW_PICK 0x00010000
124 #define CG6_FBC_DRAW_ILLEGAL 0x00018000
125 #define CG6_FBC_DRAW_MASK 0x00018000
126
127 #define CG6_FBC_BWRITE0_IGNORE 0x00000000
128 #define CG6_FBC_BWRITE0_ENABLE 0x00002000
129 #define CG6_FBC_BWRITE0_DISABLE 0x00004000
130 #define CG6_FBC_BWRITE0_ILLEGAL 0x00006000
131 #define CG6_FBC_BWRITE0_MASK 0x00006000
132
133 #define CG6_FBC_BWRITE1_IGNORE 0x00000000
134 #define CG6_FBC_BWRITE1_ENABLE 0x00000800
135 #define CG6_FBC_BWRITE1_DISABLE 0x00001000
136 #define CG6_FBC_BWRITE1_ILLEGAL 0x00001800
137 #define CG6_FBC_BWRITE1_MASK 0x00001800
138
139 #define CG6_FBC_BREAD_IGNORE 0x00000000
140 #define CG6_FBC_BREAD_0 0x00000200
141 #define CG6_FBC_BREAD_1 0x00000400
142 #define CG6_FBC_BREAD_ILLEGAL 0x00000600
143 #define CG6_FBC_BREAD_MASK 0x00000600
144
145 #define CG6_FBC_BDISP_IGNORE 0x00000000
146 #define CG6_FBC_BDISP_0 0x00000080
147 #define CG6_FBC_BDISP_1 0x00000100
148 #define CG6_FBC_BDISP_ILLEGAL 0x00000180
149 #define CG6_FBC_BDISP_MASK 0x00000180
150
151 #define CG6_FBC_INDEX_MOD 0x00000040
152 #define CG6_FBC_INDEX_MASK 0x00000030
153
154 /* THC definitions */
155 #define CG6_THC_MISC_REV_SHIFT 16
156 #define CG6_THC_MISC_REV_MASK 15
157 #define CG6_THC_MISC_RESET (1 << 12)
158 #define CG6_THC_MISC_VIDEO (1 << 10)
159 #define CG6_THC_MISC_SYNC (1 << 9)
160 #define CG6_THC_MISC_VSYNC (1 << 8)
161 #define CG6_THC_MISC_SYNC_ENAB (1 << 7)
162 #define CG6_THC_MISC_CURS_RES (1 << 6)
163 #define CG6_THC_MISC_INT_ENAB (1 << 5)
164 #define CG6_THC_MISC_INT (1 << 4)
165 #define CG6_THC_MISC_INIT 0x9f
166 #define CG6_THC_CURSOFF ((65536-32) | ((65536-32) << 16))
167
168 /* The contents are unknown */
169 struct cg6_tec {
170 int tec_matrix;
171 int tec_clip;
172 int tec_vdc;
173 };
174
175 struct cg6_thc {
176 u32 thc_pad0[512];
177 u32 thc_hs; /* hsync timing */
178 u32 thc_hsdvs;
179 u32 thc_hd;
180 u32 thc_vs; /* vsync timing */
181 u32 thc_vd;
182 u32 thc_refresh;
183 u32 thc_misc;
184 u32 thc_pad1[56];
185 u32 thc_cursxy; /* cursor x,y position (16 bits each) */
186 u32 thc_cursmask[32]; /* cursor mask bits */
187 u32 thc_cursbits[32]; /* what to show where mask enabled */
188 };
189
190 struct cg6_fbc {
191 u32 xxx0[1];
192 u32 mode;
193 u32 clip;
194 u32 xxx1[1];
195 u32 s;
196 u32 draw;
197 u32 blit;
198 u32 font;
199 u32 xxx2[24];
200 u32 x0, y0, z0, color0;
201 u32 x1, y1, z1, color1;
202 u32 x2, y2, z2, color2;
203 u32 x3, y3, z3, color3;
204 u32 offx, offy;
205 u32 xxx3[2];
206 u32 incx, incy;
207 u32 xxx4[2];
208 u32 clipminx, clipminy;
209 u32 xxx5[2];
210 u32 clipmaxx, clipmaxy;
211 u32 xxx6[2];
212 u32 fg;
213 u32 bg;
214 u32 alu;
215 u32 pm;
216 u32 pixelm;
217 u32 xxx7[2];
218 u32 patalign;
219 u32 pattern[8];
220 u32 xxx8[432];
221 u32 apointx, apointy, apointz;
222 u32 xxx9[1];
223 u32 rpointx, rpointy, rpointz;
224 u32 xxx10[5];
225 u32 pointr, pointg, pointb, pointa;
226 u32 alinex, aliney, alinez;
227 u32 xxx11[1];
228 u32 rlinex, rliney, rlinez;
229 u32 xxx12[5];
230 u32 liner, lineg, lineb, linea;
231 u32 atrix, atriy, atriz;
232 u32 xxx13[1];
233 u32 rtrix, rtriy, rtriz;
234 u32 xxx14[5];
235 u32 trir, trig, trib, tria;
236 u32 aquadx, aquady, aquadz;
237 u32 xxx15[1];
238 u32 rquadx, rquady, rquadz;
239 u32 xxx16[5];
240 u32 quadr, quadg, quadb, quada;
241 u32 arectx, arecty, arectz;
242 u32 xxx17[1];
243 u32 rrectx, rrecty, rrectz;
244 u32 xxx18[5];
245 u32 rectr, rectg, rectb, recta;
246 };
247
248 struct bt_regs {
249 u32 addr;
250 u32 color_map;
251 u32 control;
252 u32 cursor;
253 };
254
255 struct cg6_par {
256 spinlock_t lock;
257 struct bt_regs __iomem *bt;
258 struct cg6_fbc __iomem *fbc;
259 struct cg6_thc __iomem *thc;
260 struct cg6_tec __iomem *tec;
261 u32 __iomem *fhc;
262
263 u32 flags;
264 #define CG6_FLAG_BLANKED 0x00000001
265
266 unsigned long physbase;
267 unsigned long which_io;
268 unsigned long fbsize;
269 };
270
cg6_sync(struct fb_info * info)271 static int cg6_sync(struct fb_info *info)
272 {
273 struct cg6_par *par = (struct cg6_par *)info->par;
274 struct cg6_fbc __iomem *fbc = par->fbc;
275 int limit = 10000;
276
277 do {
278 if (!(sbus_readl(&fbc->s) & 0x10000000))
279 break;
280 udelay(10);
281 } while (--limit > 0);
282
283 return 0;
284 }
285
cg6_switch_from_graph(struct cg6_par * par)286 static void cg6_switch_from_graph(struct cg6_par *par)
287 {
288 struct cg6_thc __iomem *thc = par->thc;
289 unsigned long flags;
290
291 spin_lock_irqsave(&par->lock, flags);
292
293 /* Hide the cursor. */
294 sbus_writel(CG6_THC_CURSOFF, &thc->thc_cursxy);
295
296 spin_unlock_irqrestore(&par->lock, flags);
297 }
298
cg6_pan_display(struct fb_var_screeninfo * var,struct fb_info * info)299 static int cg6_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
300 {
301 struct cg6_par *par = (struct cg6_par *)info->par;
302
303 /* We just use this to catch switches out of
304 * graphics mode.
305 */
306 cg6_switch_from_graph(par);
307
308 if (var->xoffset || var->yoffset || var->vmode)
309 return -EINVAL;
310 return 0;
311 }
312
313 /**
314 * cg6_fillrect - Draws a rectangle on the screen.
315 *
316 * @info: frame buffer structure that represents a single frame buffer
317 * @rect: structure defining the rectagle and operation.
318 */
cg6_fillrect(struct fb_info * info,const struct fb_fillrect * rect)319 static void cg6_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
320 {
321 struct cg6_par *par = (struct cg6_par *)info->par;
322 struct cg6_fbc __iomem *fbc = par->fbc;
323 unsigned long flags;
324 s32 val;
325
326 /* CG6 doesn't handle ROP_XOR */
327
328 spin_lock_irqsave(&par->lock, flags);
329
330 cg6_sync(info);
331
332 sbus_writel(rect->color, &fbc->fg);
333 sbus_writel(~(u32)0, &fbc->pixelm);
334 sbus_writel(0xea80ff00, &fbc->alu);
335 sbus_writel(0, &fbc->s);
336 sbus_writel(0, &fbc->clip);
337 sbus_writel(~(u32)0, &fbc->pm);
338 sbus_writel(rect->dy, &fbc->arecty);
339 sbus_writel(rect->dx, &fbc->arectx);
340 sbus_writel(rect->dy + rect->height, &fbc->arecty);
341 sbus_writel(rect->dx + rect->width, &fbc->arectx);
342 do {
343 val = sbus_readl(&fbc->draw);
344 } while (val < 0 && (val & 0x20000000));
345 spin_unlock_irqrestore(&par->lock, flags);
346 }
347
348 /**
349 * cg6_copyarea - Copies one area of the screen to another area.
350 *
351 * @info: frame buffer structure that represents a single frame buffer
352 * @area: Structure providing the data to copy the framebuffer contents
353 * from one region to another.
354 *
355 * This drawing operation copies a rectangular area from one area of the
356 * screen to another area.
357 */
cg6_copyarea(struct fb_info * info,const struct fb_copyarea * area)358 static void cg6_copyarea(struct fb_info *info, const struct fb_copyarea *area)
359 {
360 struct cg6_par *par = (struct cg6_par *)info->par;
361 struct cg6_fbc __iomem *fbc = par->fbc;
362 unsigned long flags;
363 int i;
364
365 spin_lock_irqsave(&par->lock, flags);
366
367 cg6_sync(info);
368
369 sbus_writel(0xff, &fbc->fg);
370 sbus_writel(0x00, &fbc->bg);
371 sbus_writel(~0, &fbc->pixelm);
372 sbus_writel(0xe880cccc, &fbc->alu);
373 sbus_writel(0, &fbc->s);
374 sbus_writel(0, &fbc->clip);
375
376 sbus_writel(area->sy, &fbc->y0);
377 sbus_writel(area->sx, &fbc->x0);
378 sbus_writel(area->sy + area->height - 1, &fbc->y1);
379 sbus_writel(area->sx + area->width - 1, &fbc->x1);
380 sbus_writel(area->dy, &fbc->y2);
381 sbus_writel(area->dx, &fbc->x2);
382 sbus_writel(area->dy + area->height - 1, &fbc->y3);
383 sbus_writel(area->dx + area->width - 1, &fbc->x3);
384 do {
385 i = sbus_readl(&fbc->blit);
386 } while (i < 0 && (i & 0x20000000));
387 spin_unlock_irqrestore(&par->lock, flags);
388 }
389
390 /**
391 * cg6_imageblit - Copies a image from system memory to the screen.
392 *
393 * @info: frame buffer structure that represents a single frame buffer
394 * @image: structure defining the image.
395 */
cg6_imageblit(struct fb_info * info,const struct fb_image * image)396 static void cg6_imageblit(struct fb_info *info, const struct fb_image *image)
397 {
398 struct cg6_par *par = (struct cg6_par *)info->par;
399 struct cg6_fbc __iomem *fbc = par->fbc;
400 const u8 *data = image->data;
401 unsigned long flags;
402 u32 x, y;
403 int i, width;
404
405 if (image->depth > 1) {
406 cfb_imageblit(info, image);
407 return;
408 }
409
410 spin_lock_irqsave(&par->lock, flags);
411
412 cg6_sync(info);
413
414 sbus_writel(image->fg_color, &fbc->fg);
415 sbus_writel(image->bg_color, &fbc->bg);
416 sbus_writel(0x140000, &fbc->mode);
417 sbus_writel(0xe880fc30, &fbc->alu);
418 sbus_writel(~(u32)0, &fbc->pixelm);
419 sbus_writel(0, &fbc->s);
420 sbus_writel(0, &fbc->clip);
421 sbus_writel(0xff, &fbc->pm);
422 sbus_writel(32, &fbc->incx);
423 sbus_writel(0, &fbc->incy);
424
425 x = image->dx;
426 y = image->dy;
427 for (i = 0; i < image->height; i++) {
428 width = image->width;
429
430 while (width >= 32) {
431 u32 val;
432
433 sbus_writel(y, &fbc->y0);
434 sbus_writel(x, &fbc->x0);
435 sbus_writel(x + 32 - 1, &fbc->x1);
436
437 val = ((u32)data[0] << 24) |
438 ((u32)data[1] << 16) |
439 ((u32)data[2] << 8) |
440 ((u32)data[3] << 0);
441 sbus_writel(val, &fbc->font);
442
443 data += 4;
444 x += 32;
445 width -= 32;
446 }
447 if (width) {
448 u32 val;
449
450 sbus_writel(y, &fbc->y0);
451 sbus_writel(x, &fbc->x0);
452 sbus_writel(x + width - 1, &fbc->x1);
453 if (width <= 8) {
454 val = (u32) data[0] << 24;
455 data += 1;
456 } else if (width <= 16) {
457 val = ((u32) data[0] << 24) |
458 ((u32) data[1] << 16);
459 data += 2;
460 } else {
461 val = ((u32) data[0] << 24) |
462 ((u32) data[1] << 16) |
463 ((u32) data[2] << 8);
464 data += 3;
465 }
466 sbus_writel(val, &fbc->font);
467 }
468
469 y += 1;
470 x = image->dx;
471 }
472
473 spin_unlock_irqrestore(&par->lock, flags);
474 }
475
476 /**
477 * cg6_setcolreg - Sets a color register.
478 *
479 * @regno: boolean, 0 copy local, 1 get_user() function
480 * @red: frame buffer colormap structure
481 * @green: The green value which can be up to 16 bits wide
482 * @blue: The blue value which can be up to 16 bits wide.
483 * @transp: If supported the alpha value which can be up to 16 bits wide.
484 * @info: frame buffer info structure
485 */
cg6_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)486 static int cg6_setcolreg(unsigned regno,
487 unsigned red, unsigned green, unsigned blue,
488 unsigned transp, struct fb_info *info)
489 {
490 struct cg6_par *par = (struct cg6_par *)info->par;
491 struct bt_regs __iomem *bt = par->bt;
492 unsigned long flags;
493
494 if (regno >= 256)
495 return 1;
496
497 red >>= 8;
498 green >>= 8;
499 blue >>= 8;
500
501 spin_lock_irqsave(&par->lock, flags);
502
503 sbus_writel((u32)regno << 24, &bt->addr);
504 sbus_writel((u32)red << 24, &bt->color_map);
505 sbus_writel((u32)green << 24, &bt->color_map);
506 sbus_writel((u32)blue << 24, &bt->color_map);
507
508 spin_unlock_irqrestore(&par->lock, flags);
509
510 return 0;
511 }
512
513 /**
514 * cg6_blank - Blanks the display.
515 *
516 * @blank_mode: the blank mode we want.
517 * @info: frame buffer structure that represents a single frame buffer
518 */
cg6_blank(int blank,struct fb_info * info)519 static int cg6_blank(int blank, struct fb_info *info)
520 {
521 struct cg6_par *par = (struct cg6_par *)info->par;
522 struct cg6_thc __iomem *thc = par->thc;
523 unsigned long flags;
524 u32 val;
525
526 spin_lock_irqsave(&par->lock, flags);
527 val = sbus_readl(&thc->thc_misc);
528
529 switch (blank) {
530 case FB_BLANK_UNBLANK: /* Unblanking */
531 val |= CG6_THC_MISC_VIDEO;
532 par->flags &= ~CG6_FLAG_BLANKED;
533 break;
534
535 case FB_BLANK_NORMAL: /* Normal blanking */
536 case FB_BLANK_VSYNC_SUSPEND: /* VESA blank (vsync off) */
537 case FB_BLANK_HSYNC_SUSPEND: /* VESA blank (hsync off) */
538 case FB_BLANK_POWERDOWN: /* Poweroff */
539 val &= ~CG6_THC_MISC_VIDEO;
540 par->flags |= CG6_FLAG_BLANKED;
541 break;
542 }
543
544 sbus_writel(val, &thc->thc_misc);
545 spin_unlock_irqrestore(&par->lock, flags);
546
547 return 0;
548 }
549
550 static struct sbus_mmap_map cg6_mmap_map[] = {
551 {
552 .voff = CG6_FBC,
553 .poff = CG6_FBC_OFFSET,
554 .size = PAGE_SIZE
555 },
556 {
557 .voff = CG6_TEC,
558 .poff = CG6_TEC_OFFSET,
559 .size = PAGE_SIZE
560 },
561 {
562 .voff = CG6_BTREGS,
563 .poff = CG6_BROOKTREE_OFFSET,
564 .size = PAGE_SIZE
565 },
566 {
567 .voff = CG6_FHC,
568 .poff = CG6_FHC_OFFSET,
569 .size = PAGE_SIZE
570 },
571 {
572 .voff = CG6_THC,
573 .poff = CG6_THC_OFFSET,
574 .size = PAGE_SIZE
575 },
576 {
577 .voff = CG6_ROM,
578 .poff = CG6_ROM_OFFSET,
579 .size = 0x10000
580 },
581 {
582 .voff = CG6_RAM,
583 .poff = CG6_RAM_OFFSET,
584 .size = SBUS_MMAP_FBSIZE(1)
585 },
586 {
587 .voff = CG6_DHC,
588 .poff = CG6_DHC_OFFSET,
589 .size = 0x40000
590 },
591 { .size = 0 }
592 };
593
cg6_mmap(struct fb_info * info,struct vm_area_struct * vma)594 static int cg6_mmap(struct fb_info *info, struct vm_area_struct *vma)
595 {
596 struct cg6_par *par = (struct cg6_par *)info->par;
597
598 return sbusfb_mmap_helper(cg6_mmap_map,
599 par->physbase, par->fbsize,
600 par->which_io, vma);
601 }
602
cg6_ioctl(struct fb_info * info,unsigned int cmd,unsigned long arg)603 static int cg6_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg)
604 {
605 struct cg6_par *par = (struct cg6_par *)info->par;
606
607 return sbusfb_ioctl_helper(cmd, arg, info,
608 FBTYPE_SUNFAST_COLOR, 8, par->fbsize);
609 }
610
611 /*
612 * Initialisation
613 */
614
cg6_init_fix(struct fb_info * info,int linebytes)615 static void __devinit cg6_init_fix(struct fb_info *info, int linebytes)
616 {
617 struct cg6_par *par = (struct cg6_par *)info->par;
618 const char *cg6_cpu_name, *cg6_card_name;
619 u32 conf;
620
621 conf = sbus_readl(par->fhc);
622 switch (conf & CG6_FHC_CPU_MASK) {
623 case CG6_FHC_CPU_SPARC:
624 cg6_cpu_name = "sparc";
625 break;
626 case CG6_FHC_CPU_68020:
627 cg6_cpu_name = "68020";
628 break;
629 default:
630 cg6_cpu_name = "i386";
631 break;
632 };
633 if (((conf >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK) >= 11) {
634 if (par->fbsize <= 0x100000)
635 cg6_card_name = "TGX";
636 else
637 cg6_card_name = "TGX+";
638 } else {
639 if (par->fbsize <= 0x100000)
640 cg6_card_name = "GX";
641 else
642 cg6_card_name = "GX+";
643 }
644
645 sprintf(info->fix.id, "%s %s", cg6_card_name, cg6_cpu_name);
646 info->fix.id[sizeof(info->fix.id) - 1] = 0;
647
648 info->fix.type = FB_TYPE_PACKED_PIXELS;
649 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
650
651 info->fix.line_length = linebytes;
652
653 info->fix.accel = FB_ACCEL_SUN_CGSIX;
654 }
655
656 /* Initialize Brooktree DAC */
cg6_bt_init(struct cg6_par * par)657 static void __devinit cg6_bt_init(struct cg6_par *par)
658 {
659 struct bt_regs __iomem *bt = par->bt;
660
661 sbus_writel(0x04 << 24, &bt->addr); /* color planes */
662 sbus_writel(0xff << 24, &bt->control);
663 sbus_writel(0x05 << 24, &bt->addr);
664 sbus_writel(0x00 << 24, &bt->control);
665 sbus_writel(0x06 << 24, &bt->addr); /* overlay plane */
666 sbus_writel(0x73 << 24, &bt->control);
667 sbus_writel(0x07 << 24, &bt->addr);
668 sbus_writel(0x00 << 24, &bt->control);
669 }
670
cg6_chip_init(struct fb_info * info)671 static void __devinit cg6_chip_init(struct fb_info *info)
672 {
673 struct cg6_par *par = (struct cg6_par *)info->par;
674 struct cg6_tec __iomem *tec = par->tec;
675 struct cg6_fbc __iomem *fbc = par->fbc;
676 struct cg6_thc __iomem *thc = par->thc;
677 u32 rev, conf, mode;
678 int i;
679
680 /* Hide the cursor. */
681 sbus_writel(CG6_THC_CURSOFF, &thc->thc_cursxy);
682
683 /* Turn off stuff in the Transform Engine. */
684 sbus_writel(0, &tec->tec_matrix);
685 sbus_writel(0, &tec->tec_clip);
686 sbus_writel(0, &tec->tec_vdc);
687
688 /* Take care of bugs in old revisions. */
689 rev = (sbus_readl(par->fhc) >> CG6_FHC_REV_SHIFT) & CG6_FHC_REV_MASK;
690 if (rev < 5) {
691 conf = (sbus_readl(par->fhc) & CG6_FHC_RES_MASK) |
692 CG6_FHC_CPU_68020 | CG6_FHC_TEST |
693 (11 << CG6_FHC_TEST_X_SHIFT) |
694 (11 << CG6_FHC_TEST_Y_SHIFT);
695 if (rev < 2)
696 conf |= CG6_FHC_DST_DISABLE;
697 sbus_writel(conf, par->fhc);
698 }
699
700 /* Set things in the FBC. Bad things appear to happen if we do
701 * back to back store/loads on the mode register, so copy it
702 * out instead. */
703 mode = sbus_readl(&fbc->mode);
704 do {
705 i = sbus_readl(&fbc->s);
706 } while (i & 0x10000000);
707 mode &= ~(CG6_FBC_BLIT_MASK | CG6_FBC_MODE_MASK |
708 CG6_FBC_DRAW_MASK | CG6_FBC_BWRITE0_MASK |
709 CG6_FBC_BWRITE1_MASK | CG6_FBC_BREAD_MASK |
710 CG6_FBC_BDISP_MASK);
711 mode |= (CG6_FBC_BLIT_SRC | CG6_FBC_MODE_COLOR8 |
712 CG6_FBC_DRAW_RENDER | CG6_FBC_BWRITE0_ENABLE |
713 CG6_FBC_BWRITE1_DISABLE | CG6_FBC_BREAD_0 |
714 CG6_FBC_BDISP_0);
715 sbus_writel(mode, &fbc->mode);
716
717 sbus_writel(0, &fbc->clip);
718 sbus_writel(0, &fbc->offx);
719 sbus_writel(0, &fbc->offy);
720 sbus_writel(0, &fbc->clipminx);
721 sbus_writel(0, &fbc->clipminy);
722 sbus_writel(info->var.xres - 1, &fbc->clipmaxx);
723 sbus_writel(info->var.yres - 1, &fbc->clipmaxy);
724 }
725
cg6_unmap_regs(struct of_device * op,struct fb_info * info,struct cg6_par * par)726 static void cg6_unmap_regs(struct of_device *op, struct fb_info *info,
727 struct cg6_par *par)
728 {
729 if (par->fbc)
730 of_iounmap(&op->resource[0], par->fbc, 4096);
731 if (par->tec)
732 of_iounmap(&op->resource[0], par->tec, sizeof(struct cg6_tec));
733 if (par->thc)
734 of_iounmap(&op->resource[0], par->thc, sizeof(struct cg6_thc));
735 if (par->bt)
736 of_iounmap(&op->resource[0], par->bt, sizeof(struct bt_regs));
737 if (par->fhc)
738 of_iounmap(&op->resource[0], par->fhc, sizeof(u32));
739
740 if (info->screen_base)
741 of_iounmap(&op->resource[0], info->screen_base, par->fbsize);
742 }
743
cg6_probe(struct of_device * op,const struct of_device_id * match)744 static int __devinit cg6_probe(struct of_device *op,
745 const struct of_device_id *match)
746 {
747 struct device_node *dp = op->node;
748 struct fb_info *info;
749 struct cg6_par *par;
750 int linebytes, err;
751 int dblbuf;
752
753 info = framebuffer_alloc(sizeof(struct cg6_par), &op->dev);
754
755 err = -ENOMEM;
756 if (!info)
757 goto out_err;
758 par = info->par;
759
760 spin_lock_init(&par->lock);
761
762 par->physbase = op->resource[0].start;
763 par->which_io = op->resource[0].flags & IORESOURCE_BITS;
764
765 sbusfb_fill_var(&info->var, dp, 8);
766 info->var.red.length = 8;
767 info->var.green.length = 8;
768 info->var.blue.length = 8;
769
770 linebytes = of_getintprop_default(dp, "linebytes",
771 info->var.xres);
772 par->fbsize = PAGE_ALIGN(linebytes * info->var.yres);
773
774 dblbuf = of_getintprop_default(dp, "dblbuf", 0);
775 if (dblbuf)
776 par->fbsize *= 4;
777
778 par->fbc = of_ioremap(&op->resource[0], CG6_FBC_OFFSET,
779 4096, "cgsix fbc");
780 par->tec = of_ioremap(&op->resource[0], CG6_TEC_OFFSET,
781 sizeof(struct cg6_tec), "cgsix tec");
782 par->thc = of_ioremap(&op->resource[0], CG6_THC_OFFSET,
783 sizeof(struct cg6_thc), "cgsix thc");
784 par->bt = of_ioremap(&op->resource[0], CG6_BROOKTREE_OFFSET,
785 sizeof(struct bt_regs), "cgsix dac");
786 par->fhc = of_ioremap(&op->resource[0], CG6_FHC_OFFSET,
787 sizeof(u32), "cgsix fhc");
788
789 info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_IMAGEBLIT |
790 FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
791 FBINFO_READS_FAST;
792 info->fbops = &cg6_ops;
793
794 info->screen_base = of_ioremap(&op->resource[0], CG6_RAM_OFFSET,
795 par->fbsize, "cgsix ram");
796 if (!par->fbc || !par->tec || !par->thc ||
797 !par->bt || !par->fhc || !info->screen_base)
798 goto out_unmap_regs;
799
800 info->var.accel_flags = FB_ACCELF_TEXT;
801
802 cg6_bt_init(par);
803 cg6_chip_init(info);
804 cg6_blank(FB_BLANK_UNBLANK, info);
805
806 if (fb_alloc_cmap(&info->cmap, 256, 0))
807 goto out_unmap_regs;
808
809 fb_set_cmap(&info->cmap, info);
810 cg6_init_fix(info, linebytes);
811
812 err = register_framebuffer(info);
813 if (err < 0)
814 goto out_dealloc_cmap;
815
816 dev_set_drvdata(&op->dev, info);
817
818 printk(KERN_INFO "%s: CGsix [%s] at %lx:%lx\n",
819 dp->full_name, info->fix.id,
820 par->which_io, par->physbase);
821
822 return 0;
823
824 out_dealloc_cmap:
825 fb_dealloc_cmap(&info->cmap);
826
827 out_unmap_regs:
828 cg6_unmap_regs(op, info, par);
829
830 out_err:
831 return err;
832 }
833
cg6_remove(struct of_device * op)834 static int __devexit cg6_remove(struct of_device *op)
835 {
836 struct fb_info *info = dev_get_drvdata(&op->dev);
837 struct cg6_par *par = info->par;
838
839 unregister_framebuffer(info);
840 fb_dealloc_cmap(&info->cmap);
841
842 cg6_unmap_regs(op, info, par);
843
844 framebuffer_release(info);
845
846 dev_set_drvdata(&op->dev, NULL);
847
848 return 0;
849 }
850
851 static const struct of_device_id cg6_match[] = {
852 {
853 .name = "cgsix",
854 },
855 {
856 .name = "cgthree+",
857 },
858 {},
859 };
860 MODULE_DEVICE_TABLE(of, cg6_match);
861
862 static struct of_platform_driver cg6_driver = {
863 .name = "cg6",
864 .match_table = cg6_match,
865 .probe = cg6_probe,
866 .remove = __devexit_p(cg6_remove),
867 };
868
cg6_init(void)869 static int __init cg6_init(void)
870 {
871 if (fb_get_options("cg6fb", NULL))
872 return -ENODEV;
873
874 return of_register_driver(&cg6_driver, &of_bus_type);
875 }
876
cg6_exit(void)877 static void __exit cg6_exit(void)
878 {
879 of_unregister_driver(&cg6_driver);
880 }
881
882 module_init(cg6_init);
883 module_exit(cg6_exit);
884
885 MODULE_DESCRIPTION("framebuffer driver for CGsix chipsets");
886 MODULE_AUTHOR("David S. Miller <davem@davemloft.net>");
887 MODULE_VERSION("2.0");
888 MODULE_LICENSE("GPL");
889