1 /*
2 * Geode GX framebuffer driver.
3 *
4 * Copyright (C) 2006 Arcom Control Systems Ltd.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 *
12 * This driver assumes that the BIOS has created a virtual PCI device header
13 * for the video device. The PCI header is assumed to contain the following
14 * BARs:
15 *
16 * BAR0 - framebuffer memory
17 * BAR1 - graphics processor registers
18 * BAR2 - display controller registers
19 * BAR3 - video processor and flat panel control registers.
20 *
21 * 16 MiB of framebuffer memory is assumed to be available.
22 */
23 #include <linux/module.h>
24 #include <linux/kernel.h>
25 #include <linux/errno.h>
26 #include <linux/string.h>
27 #include <linux/mm.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fb.h>
31 #include <linux/console.h>
32 #include <linux/suspend.h>
33 #include <linux/init.h>
34 #include <linux/pci.h>
35 #include <asm/geode.h>
36
37 #include "gxfb.h"
38
39 static char *mode_option;
40 static int vram;
41 static int vt_switch;
42
43 /* Modes relevant to the GX (taken from modedb.c) */
44 static struct fb_videomode gx_modedb[] __initdata = {
45 /* 640x480-60 VESA */
46 { NULL, 60, 640, 480, 39682, 48, 16, 33, 10, 96, 2,
47 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
48 /* 640x480-75 VESA */
49 { NULL, 75, 640, 480, 31746, 120, 16, 16, 01, 64, 3,
50 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
51 /* 640x480-85 VESA */
52 { NULL, 85, 640, 480, 27777, 80, 56, 25, 01, 56, 3,
53 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
54 /* 800x600-60 VESA */
55 { NULL, 60, 800, 600, 25000, 88, 40, 23, 01, 128, 4,
56 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
57 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
58 /* 800x600-75 VESA */
59 { NULL, 75, 800, 600, 20202, 160, 16, 21, 01, 80, 3,
60 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
61 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
62 /* 800x600-85 VESA */
63 { NULL, 85, 800, 600, 17761, 152, 32, 27, 01, 64, 3,
64 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
65 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
66 /* 1024x768-60 VESA */
67 { NULL, 60, 1024, 768, 15384, 160, 24, 29, 3, 136, 6,
68 0, FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
69 /* 1024x768-75 VESA */
70 { NULL, 75, 1024, 768, 12690, 176, 16, 28, 1, 96, 3,
71 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
72 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
73 /* 1024x768-85 VESA */
74 { NULL, 85, 1024, 768, 10582, 208, 48, 36, 1, 96, 3,
75 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
76 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
77 /* 1280x960-60 VESA */
78 { NULL, 60, 1280, 960, 9259, 312, 96, 36, 1, 112, 3,
79 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
80 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
81 /* 1280x960-85 VESA */
82 { NULL, 85, 1280, 960, 6734, 224, 64, 47, 1, 160, 3,
83 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
84 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
85 /* 1280x1024-60 VESA */
86 { NULL, 60, 1280, 1024, 9259, 248, 48, 38, 1, 112, 3,
87 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
88 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
89 /* 1280x1024-75 VESA */
90 { NULL, 75, 1280, 1024, 7407, 248, 16, 38, 1, 144, 3,
91 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
92 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
93 /* 1280x1024-85 VESA */
94 { NULL, 85, 1280, 1024, 6349, 224, 64, 44, 1, 160, 3,
95 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
96 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
97 /* 1600x1200-60 VESA */
98 { NULL, 60, 1600, 1200, 6172, 304, 64, 46, 1, 192, 3,
99 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
100 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
101 /* 1600x1200-75 VESA */
102 { NULL, 75, 1600, 1200, 4938, 304, 64, 46, 1, 192, 3,
103 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
104 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
105 /* 1600x1200-85 VESA */
106 { NULL, 85, 1600, 1200, 4357, 304, 64, 46, 1, 192, 3,
107 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
108 FB_VMODE_NONINTERLACED, FB_MODE_IS_VESA },
109 };
110
111 #ifdef CONFIG_OLPC
112 #include <asm/olpc.h>
113
114 static struct fb_videomode gx_dcon_modedb[] __initdata = {
115 /* The only mode the DCON has is 1200x900 */
116 { NULL, 50, 1200, 900, 17460, 24, 8, 4, 5, 8, 3,
117 FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
118 FB_VMODE_NONINTERLACED, 0 }
119 };
120
get_modedb(struct fb_videomode ** modedb,unsigned int * size)121 static void __init get_modedb(struct fb_videomode **modedb, unsigned int *size)
122 {
123 if (olpc_has_dcon()) {
124 *modedb = (struct fb_videomode *) gx_dcon_modedb;
125 *size = ARRAY_SIZE(gx_dcon_modedb);
126 } else {
127 *modedb = (struct fb_videomode *) gx_modedb;
128 *size = ARRAY_SIZE(gx_modedb);
129 }
130 }
131
132 #else
get_modedb(struct fb_videomode ** modedb,unsigned int * size)133 static void __init get_modedb(struct fb_videomode **modedb, unsigned int *size)
134 {
135 *modedb = (struct fb_videomode *) gx_modedb;
136 *size = ARRAY_SIZE(gx_modedb);
137 }
138 #endif
139
gxfb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)140 static int gxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
141 {
142 if (var->xres > 1600 || var->yres > 1200)
143 return -EINVAL;
144 if ((var->xres > 1280 || var->yres > 1024) && var->bits_per_pixel > 16)
145 return -EINVAL;
146
147 if (var->bits_per_pixel == 32) {
148 var->red.offset = 16; var->red.length = 8;
149 var->green.offset = 8; var->green.length = 8;
150 var->blue.offset = 0; var->blue.length = 8;
151 } else if (var->bits_per_pixel == 16) {
152 var->red.offset = 11; var->red.length = 5;
153 var->green.offset = 5; var->green.length = 6;
154 var->blue.offset = 0; var->blue.length = 5;
155 } else if (var->bits_per_pixel == 8) {
156 var->red.offset = 0; var->red.length = 8;
157 var->green.offset = 0; var->green.length = 8;
158 var->blue.offset = 0; var->blue.length = 8;
159 } else
160 return -EINVAL;
161 var->transp.offset = 0; var->transp.length = 0;
162
163 /* Enough video memory? */
164 if (gx_line_delta(var->xres, var->bits_per_pixel) * var->yres > info->fix.smem_len)
165 return -EINVAL;
166
167 /* FIXME: Check timing parameters here? */
168
169 return 0;
170 }
171
gxfb_set_par(struct fb_info * info)172 static int gxfb_set_par(struct fb_info *info)
173 {
174 if (info->var.bits_per_pixel > 8)
175 info->fix.visual = FB_VISUAL_TRUECOLOR;
176 else
177 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
178
179 info->fix.line_length = gx_line_delta(info->var.xres, info->var.bits_per_pixel);
180
181 gx_set_mode(info);
182
183 return 0;
184 }
185
chan_to_field(u_int chan,struct fb_bitfield * bf)186 static inline u_int chan_to_field(u_int chan, struct fb_bitfield *bf)
187 {
188 chan &= 0xffff;
189 chan >>= 16 - bf->length;
190 return chan << bf->offset;
191 }
192
gxfb_setcolreg(unsigned regno,unsigned red,unsigned green,unsigned blue,unsigned transp,struct fb_info * info)193 static int gxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
194 unsigned blue, unsigned transp,
195 struct fb_info *info)
196 {
197 if (info->var.grayscale) {
198 /* grayscale = 0.30*R + 0.59*G + 0.11*B */
199 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
200 }
201
202 /* Truecolor has hardware independent palette */
203 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
204 u32 *pal = info->pseudo_palette;
205 u32 v;
206
207 if (regno >= 16)
208 return -EINVAL;
209
210 v = chan_to_field(red, &info->var.red);
211 v |= chan_to_field(green, &info->var.green);
212 v |= chan_to_field(blue, &info->var.blue);
213
214 pal[regno] = v;
215 } else {
216 if (regno >= 256)
217 return -EINVAL;
218
219 gx_set_hw_palette_reg(info, regno, red, green, blue);
220 }
221
222 return 0;
223 }
224
gxfb_blank(int blank_mode,struct fb_info * info)225 static int gxfb_blank(int blank_mode, struct fb_info *info)
226 {
227 return gx_blank_display(info, blank_mode);
228 }
229
gxfb_map_video_memory(struct fb_info * info,struct pci_dev * dev)230 static int __init gxfb_map_video_memory(struct fb_info *info, struct pci_dev *dev)
231 {
232 struct gxfb_par *par = info->par;
233 int ret;
234
235 ret = pci_enable_device(dev);
236 if (ret < 0)
237 return ret;
238
239 ret = pci_request_region(dev, 3, "gxfb (video processor)");
240 if (ret < 0)
241 return ret;
242 par->vid_regs = pci_ioremap_bar(dev, 3);
243 if (!par->vid_regs)
244 return -ENOMEM;
245
246 ret = pci_request_region(dev, 2, "gxfb (display controller)");
247 if (ret < 0)
248 return ret;
249 par->dc_regs = pci_ioremap_bar(dev, 2);
250 if (!par->dc_regs)
251 return -ENOMEM;
252
253 ret = pci_request_region(dev, 1, "gxfb (graphics processor)");
254 if (ret < 0)
255 return ret;
256 par->gp_regs = pci_ioremap_bar(dev, 1);
257
258 if (!par->gp_regs)
259 return -ENOMEM;
260
261 ret = pci_request_region(dev, 0, "gxfb (framebuffer)");
262 if (ret < 0)
263 return ret;
264
265 info->fix.smem_start = pci_resource_start(dev, 0);
266 info->fix.smem_len = vram ? vram : gx_frame_buffer_size();
267 info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len);
268 if (!info->screen_base)
269 return -ENOMEM;
270
271 /* Set the 16MiB aligned base address of the graphics memory region
272 * in the display controller */
273
274 write_dc(par, DC_GLIU0_MEM_OFFSET, info->fix.smem_start & 0xFF000000);
275
276 dev_info(&dev->dev, "%d KiB of video memory at 0x%lx\n",
277 info->fix.smem_len / 1024, info->fix.smem_start);
278
279 return 0;
280 }
281
282 static struct fb_ops gxfb_ops = {
283 .owner = THIS_MODULE,
284 .fb_check_var = gxfb_check_var,
285 .fb_set_par = gxfb_set_par,
286 .fb_setcolreg = gxfb_setcolreg,
287 .fb_blank = gxfb_blank,
288 /* No HW acceleration for now. */
289 .fb_fillrect = cfb_fillrect,
290 .fb_copyarea = cfb_copyarea,
291 .fb_imageblit = cfb_imageblit,
292 };
293
gxfb_init_fbinfo(struct device * dev)294 static struct fb_info * __init gxfb_init_fbinfo(struct device *dev)
295 {
296 struct gxfb_par *par;
297 struct fb_info *info;
298
299 /* Alloc enough space for the pseudo palette. */
300 info = framebuffer_alloc(sizeof(struct gxfb_par) + sizeof(u32) * 16,
301 dev);
302 if (!info)
303 return NULL;
304
305 par = info->par;
306
307 strcpy(info->fix.id, "Geode GX");
308
309 info->fix.type = FB_TYPE_PACKED_PIXELS;
310 info->fix.type_aux = 0;
311 info->fix.xpanstep = 0;
312 info->fix.ypanstep = 0;
313 info->fix.ywrapstep = 0;
314 info->fix.accel = FB_ACCEL_NONE;
315
316 info->var.nonstd = 0;
317 info->var.activate = FB_ACTIVATE_NOW;
318 info->var.height = -1;
319 info->var.width = -1;
320 info->var.accel_flags = 0;
321 info->var.vmode = FB_VMODE_NONINTERLACED;
322
323 info->fbops = &gxfb_ops;
324 info->flags = FBINFO_DEFAULT;
325 info->node = -1;
326
327 info->pseudo_palette = (void *)par + sizeof(struct gxfb_par);
328
329 info->var.grayscale = 0;
330
331 if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
332 framebuffer_release(info);
333 return NULL;
334 }
335
336 return info;
337 }
338
339 #ifdef CONFIG_PM
gxfb_suspend(struct pci_dev * pdev,pm_message_t state)340 static int gxfb_suspend(struct pci_dev *pdev, pm_message_t state)
341 {
342 struct fb_info *info = pci_get_drvdata(pdev);
343
344 if (state.event == PM_EVENT_SUSPEND) {
345 acquire_console_sem();
346 gx_powerdown(info);
347 fb_set_suspend(info, 1);
348 release_console_sem();
349 }
350
351 /* there's no point in setting PCI states; we emulate PCI, so
352 * we don't end up getting power savings anyways */
353
354 return 0;
355 }
356
gxfb_resume(struct pci_dev * pdev)357 static int gxfb_resume(struct pci_dev *pdev)
358 {
359 struct fb_info *info = pci_get_drvdata(pdev);
360 int ret;
361
362 acquire_console_sem();
363 ret = gx_powerup(info);
364 if (ret) {
365 printk(KERN_ERR "gxfb: power up failed!\n");
366 return ret;
367 }
368
369 fb_set_suspend(info, 0);
370 release_console_sem();
371 return 0;
372 }
373 #endif
374
gxfb_probe(struct pci_dev * pdev,const struct pci_device_id * id)375 static int __init gxfb_probe(struct pci_dev *pdev, const struct pci_device_id *id)
376 {
377 struct gxfb_par *par;
378 struct fb_info *info;
379 int ret;
380 unsigned long val;
381
382 struct fb_videomode *modedb_ptr;
383 unsigned int modedb_size;
384
385 info = gxfb_init_fbinfo(&pdev->dev);
386 if (!info)
387 return -ENOMEM;
388 par = info->par;
389
390 if ((ret = gxfb_map_video_memory(info, pdev)) < 0) {
391 dev_err(&pdev->dev, "failed to map frame buffer or controller registers\n");
392 goto err;
393 }
394
395 /* Figure out if this is a TFT or CRT part */
396
397 rdmsrl(MSR_GX_GLD_MSR_CONFIG, val);
398
399 if ((val & MSR_GX_GLD_MSR_CONFIG_FP) == MSR_GX_GLD_MSR_CONFIG_FP)
400 par->enable_crt = 0;
401 else
402 par->enable_crt = 1;
403
404 get_modedb(&modedb_ptr, &modedb_size);
405 ret = fb_find_mode(&info->var, info, mode_option,
406 modedb_ptr, modedb_size, NULL, 16);
407 if (ret == 0 || ret == 4) {
408 dev_err(&pdev->dev, "could not find valid video mode\n");
409 ret = -EINVAL;
410 goto err;
411 }
412
413
414 /* Clear the frame buffer of garbage. */
415 memset_io(info->screen_base, 0, info->fix.smem_len);
416
417 gxfb_check_var(&info->var, info);
418 gxfb_set_par(info);
419
420 pm_set_vt_switch(vt_switch);
421
422 if (register_framebuffer(info) < 0) {
423 ret = -EINVAL;
424 goto err;
425 }
426 pci_set_drvdata(pdev, info);
427 printk(KERN_INFO "fb%d: %s frame buffer device\n", info->node, info->fix.id);
428 return 0;
429
430 err:
431 if (info->screen_base) {
432 iounmap(info->screen_base);
433 pci_release_region(pdev, 0);
434 }
435 if (par->vid_regs) {
436 iounmap(par->vid_regs);
437 pci_release_region(pdev, 3);
438 }
439 if (par->dc_regs) {
440 iounmap(par->dc_regs);
441 pci_release_region(pdev, 2);
442 }
443 if (par->gp_regs) {
444 iounmap(par->gp_regs);
445 pci_release_region(pdev, 1);
446 }
447
448 if (info) {
449 fb_dealloc_cmap(&info->cmap);
450 framebuffer_release(info);
451 }
452 return ret;
453 }
454
gxfb_remove(struct pci_dev * pdev)455 static void gxfb_remove(struct pci_dev *pdev)
456 {
457 struct fb_info *info = pci_get_drvdata(pdev);
458 struct gxfb_par *par = info->par;
459
460 unregister_framebuffer(info);
461
462 iounmap((void __iomem *)info->screen_base);
463 pci_release_region(pdev, 0);
464
465 iounmap(par->vid_regs);
466 pci_release_region(pdev, 3);
467
468 iounmap(par->dc_regs);
469 pci_release_region(pdev, 2);
470
471 iounmap(par->gp_regs);
472 pci_release_region(pdev, 1);
473
474 fb_dealloc_cmap(&info->cmap);
475 pci_set_drvdata(pdev, NULL);
476
477 framebuffer_release(info);
478 }
479
480 static struct pci_device_id gxfb_id_table[] = {
481 { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_GX_VIDEO) },
482 { 0, }
483 };
484
485 MODULE_DEVICE_TABLE(pci, gxfb_id_table);
486
487 static struct pci_driver gxfb_driver = {
488 .name = "gxfb",
489 .id_table = gxfb_id_table,
490 .probe = gxfb_probe,
491 .remove = gxfb_remove,
492 #ifdef CONFIG_PM
493 .suspend = gxfb_suspend,
494 .resume = gxfb_resume,
495 #endif
496 };
497
498 #ifndef MODULE
gxfb_setup(char * options)499 static int __init gxfb_setup(char *options)
500 {
501
502 char *opt;
503
504 if (!options || !*options)
505 return 0;
506
507 while ((opt = strsep(&options, ",")) != NULL) {
508 if (!*opt)
509 continue;
510
511 mode_option = opt;
512 }
513
514 return 0;
515 }
516 #endif
517
gxfb_init(void)518 static int __init gxfb_init(void)
519 {
520 #ifndef MODULE
521 char *option = NULL;
522
523 if (fb_get_options("gxfb", &option))
524 return -ENODEV;
525
526 gxfb_setup(option);
527 #endif
528 return pci_register_driver(&gxfb_driver);
529 }
530
gxfb_cleanup(void)531 static void __exit gxfb_cleanup(void)
532 {
533 pci_unregister_driver(&gxfb_driver);
534 }
535
536 module_init(gxfb_init);
537 module_exit(gxfb_cleanup);
538
539 module_param(mode_option, charp, 0);
540 MODULE_PARM_DESC(mode_option, "video mode (<x>x<y>[-<bpp>][@<refr>])");
541
542 module_param(vram, int, 0);
543 MODULE_PARM_DESC(vram, "video memory size");
544
545 module_param(vt_switch, int, 0);
546 MODULE_PARM_DESC(vt_switch, "enable VT switch during suspend/resume");
547
548 MODULE_DESCRIPTION("Framebuffer driver for the AMD Geode GX");
549 MODULE_LICENSE("GPL");
550