1 /*
2 * Copyright (c) Intel Corp. 2007.
3 * All Rights Reserved.
4 *
5 * Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
6 * develop this driver.
7 *
8 * This file is part of the Vermilion Range fb driver.
9 * The Vermilion Range fb driver is free software;
10 * you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * The Vermilion Range fb driver is distributed
16 * in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License
22 * along with this driver; if not, write to the Free Software
23 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
24 *
25 * Authors:
26 * Thomas Hellström <thomas-at-tungstengraphics-dot-com>
27 * Michel Dänzer <michel-at-tungstengraphics-dot-com>
28 * Alan Hourihane <alanh-at-tungstengraphics-dot-com>
29 */
30
31 #include <linux/module.h>
32 #include <linux/kernel.h>
33 #include <linux/errno.h>
34 #include <linux/string.h>
35 #include <linux/delay.h>
36 #include <linux/mm.h>
37 #include <linux/fb.h>
38 #include <linux/pci.h>
39 #include <asm/cacheflush.h>
40 #include <asm/tlbflush.h>
41 #include <linux/mmzone.h>
42
43 /* #define VERMILION_DEBUG */
44
45 #include "vermilion.h"
46
47 #define MODULE_NAME "vmlfb"
48
49 #define VML_TOHW(_val, _width) ((((_val) << (_width)) + 0x7FFF - (_val)) >> 16)
50
51 static struct mutex vml_mutex;
52 static struct list_head global_no_mode;
53 static struct list_head global_has_mode;
54 static struct fb_ops vmlfb_ops;
55 static struct vml_sys *subsys = NULL;
56 static char *vml_default_mode = "1024x768@60";
57 static struct fb_videomode defaultmode = {
58 NULL, 60, 1024, 768, 12896, 144, 24, 29, 3, 136, 6,
59 0, FB_VMODE_NONINTERLACED
60 };
61
62 static u32 vml_mem_requested = (10 * 1024 * 1024);
63 static u32 vml_mem_contig = (4 * 1024 * 1024);
64 static u32 vml_mem_min = (4 * 1024 * 1024);
65
66 static u32 vml_clocks[] = {
67 6750,
68 13500,
69 27000,
70 29700,
71 37125,
72 54000,
73 59400,
74 74250,
75 120000,
76 148500
77 };
78
79 static u32 vml_num_clocks = ARRAY_SIZE(vml_clocks);
80
81 /*
82 * Allocate a contiguous vram area and make its linear kernel map
83 * uncached.
84 */
85
vmlfb_alloc_vram_area(struct vram_area * va,unsigned max_order,unsigned min_order)86 static int vmlfb_alloc_vram_area(struct vram_area *va, unsigned max_order,
87 unsigned min_order)
88 {
89 gfp_t flags;
90 unsigned long i;
91
92 max_order++;
93 do {
94 /*
95 * Really try hard to get the needed memory.
96 * We need memory below the first 32MB, so we
97 * add the __GFP_DMA flag that guarantees that we are
98 * below the first 16MB.
99 */
100
101 flags = __GFP_DMA | __GFP_HIGH;
102 va->logical =
103 __get_free_pages(flags, --max_order);
104 } while (va->logical == 0 && max_order > min_order);
105
106 if (!va->logical)
107 return -ENOMEM;
108
109 va->phys = virt_to_phys((void *)va->logical);
110 va->size = PAGE_SIZE << max_order;
111 va->order = max_order;
112
113 /*
114 * It seems like __get_free_pages only ups the usage count
115 * of the first page. This doesn't work with fault mapping, so
116 * up the usage count once more (XXX: should use split_page or
117 * compound page).
118 */
119
120 memset((void *)va->logical, 0x00, va->size);
121 for (i = va->logical; i < va->logical + va->size; i += PAGE_SIZE) {
122 get_page(virt_to_page(i));
123 }
124
125 /*
126 * Change caching policy of the linear kernel map to avoid
127 * mapping type conflicts with user-space mappings.
128 */
129 set_pages_uc(virt_to_page(va->logical), va->size >> PAGE_SHIFT);
130
131 printk(KERN_DEBUG MODULE_NAME
132 ": Allocated %ld bytes vram area at 0x%08lx\n",
133 va->size, va->phys);
134
135 return 0;
136 }
137
138 /*
139 * Free a contiguous vram area and reset its linear kernel map
140 * mapping type.
141 */
142
vmlfb_free_vram_area(struct vram_area * va)143 static void vmlfb_free_vram_area(struct vram_area *va)
144 {
145 unsigned long j;
146
147 if (va->logical) {
148
149 /*
150 * Reset the linear kernel map caching policy.
151 */
152
153 set_pages_wb(virt_to_page(va->logical),
154 va->size >> PAGE_SHIFT);
155
156 /*
157 * Decrease the usage count on the pages we've used
158 * to compensate for upping when allocating.
159 */
160
161 for (j = va->logical; j < va->logical + va->size;
162 j += PAGE_SIZE) {
163 (void)put_page_testzero(virt_to_page(j));
164 }
165
166 printk(KERN_DEBUG MODULE_NAME
167 ": Freeing %ld bytes vram area at 0x%08lx\n",
168 va->size, va->phys);
169 free_pages(va->logical, va->order);
170
171 va->logical = 0;
172 }
173 }
174
175 /*
176 * Free allocated vram.
177 */
178
vmlfb_free_vram(struct vml_info * vinfo)179 static void vmlfb_free_vram(struct vml_info *vinfo)
180 {
181 int i;
182
183 for (i = 0; i < vinfo->num_areas; ++i) {
184 vmlfb_free_vram_area(&vinfo->vram[i]);
185 }
186 vinfo->num_areas = 0;
187 }
188
189 /*
190 * Allocate vram. Currently we try to allocate contiguous areas from the
191 * __GFP_DMA zone and puzzle them together. A better approach would be to
192 * allocate one contiguous area for scanout and use one-page allocations for
193 * offscreen areas. This requires user-space and GPU virtual mappings.
194 */
195
vmlfb_alloc_vram(struct vml_info * vinfo,size_t requested,size_t min_total,size_t min_contig)196 static int vmlfb_alloc_vram(struct vml_info *vinfo,
197 size_t requested,
198 size_t min_total, size_t min_contig)
199 {
200 int i, j;
201 int order;
202 int contiguous;
203 int err;
204 struct vram_area *va;
205 struct vram_area *va2;
206
207 vinfo->num_areas = 0;
208 for (i = 0; i < VML_VRAM_AREAS; ++i) {
209 va = &vinfo->vram[i];
210 order = 0;
211
212 while (requested > (PAGE_SIZE << order) && order < MAX_ORDER)
213 order++;
214
215 err = vmlfb_alloc_vram_area(va, order, 0);
216
217 if (err)
218 break;
219
220 if (i == 0) {
221 vinfo->vram_start = va->phys;
222 vinfo->vram_logical = (void __iomem *) va->logical;
223 vinfo->vram_contig_size = va->size;
224 vinfo->num_areas = 1;
225 } else {
226 contiguous = 0;
227
228 for (j = 0; j < i; ++j) {
229 va2 = &vinfo->vram[j];
230 if (va->phys + va->size == va2->phys ||
231 va2->phys + va2->size == va->phys) {
232 contiguous = 1;
233 break;
234 }
235 }
236
237 if (contiguous) {
238 vinfo->num_areas++;
239 if (va->phys < vinfo->vram_start) {
240 vinfo->vram_start = va->phys;
241 vinfo->vram_logical =
242 (void __iomem *)va->logical;
243 }
244 vinfo->vram_contig_size += va->size;
245 } else {
246 vmlfb_free_vram_area(va);
247 break;
248 }
249 }
250
251 if (requested < va->size)
252 break;
253 else
254 requested -= va->size;
255 }
256
257 if (vinfo->vram_contig_size > min_total &&
258 vinfo->vram_contig_size > min_contig) {
259
260 printk(KERN_DEBUG MODULE_NAME
261 ": Contiguous vram: %ld bytes at physical 0x%08lx.\n",
262 (unsigned long)vinfo->vram_contig_size,
263 (unsigned long)vinfo->vram_start);
264
265 return 0;
266 }
267
268 printk(KERN_ERR MODULE_NAME
269 ": Could not allocate requested minimal amount of vram.\n");
270
271 vmlfb_free_vram(vinfo);
272
273 return -ENOMEM;
274 }
275
276 /*
277 * Find the GPU to use with our display controller.
278 */
279
vmlfb_get_gpu(struct vml_par * par)280 static int vmlfb_get_gpu(struct vml_par *par)
281 {
282 mutex_lock(&vml_mutex);
283
284 par->gpu = pci_get_device(PCI_VENDOR_ID_INTEL, VML_DEVICE_GPU, NULL);
285
286 if (!par->gpu) {
287 mutex_unlock(&vml_mutex);
288 return -ENODEV;
289 }
290
291 mutex_unlock(&vml_mutex);
292
293 if (pci_enable_device(par->gpu) < 0)
294 return -ENODEV;
295
296 return 0;
297 }
298
299 /*
300 * Find a contiguous vram area that contains a given offset from vram start.
301 */
vmlfb_vram_offset(struct vml_info * vinfo,unsigned long offset)302 static int vmlfb_vram_offset(struct vml_info *vinfo, unsigned long offset)
303 {
304 unsigned long aoffset;
305 unsigned i;
306
307 for (i = 0; i < vinfo->num_areas; ++i) {
308 aoffset = offset - (vinfo->vram[i].phys - vinfo->vram_start);
309
310 if (aoffset < vinfo->vram[i].size) {
311 return 0;
312 }
313 }
314
315 return -EINVAL;
316 }
317
318 /*
319 * Remap the MMIO register spaces of the VDC and the GPU.
320 */
321
vmlfb_enable_mmio(struct vml_par * par)322 static int vmlfb_enable_mmio(struct vml_par *par)
323 {
324 int err;
325
326 par->vdc_mem_base = pci_resource_start(par->vdc, 0);
327 par->vdc_mem_size = pci_resource_len(par->vdc, 0);
328 if (!request_mem_region(par->vdc_mem_base, par->vdc_mem_size, "vmlfb")) {
329 printk(KERN_ERR MODULE_NAME
330 ": Could not claim display controller MMIO.\n");
331 return -EBUSY;
332 }
333 par->vdc_mem = ioremap_nocache(par->vdc_mem_base, par->vdc_mem_size);
334 if (par->vdc_mem == NULL) {
335 printk(KERN_ERR MODULE_NAME
336 ": Could not map display controller MMIO.\n");
337 err = -ENOMEM;
338 goto out_err_0;
339 }
340
341 par->gpu_mem_base = pci_resource_start(par->gpu, 0);
342 par->gpu_mem_size = pci_resource_len(par->gpu, 0);
343 if (!request_mem_region(par->gpu_mem_base, par->gpu_mem_size, "vmlfb")) {
344 printk(KERN_ERR MODULE_NAME ": Could not claim GPU MMIO.\n");
345 err = -EBUSY;
346 goto out_err_1;
347 }
348 par->gpu_mem = ioremap_nocache(par->gpu_mem_base, par->gpu_mem_size);
349 if (par->gpu_mem == NULL) {
350 printk(KERN_ERR MODULE_NAME ": Could not map GPU MMIO.\n");
351 err = -ENOMEM;
352 goto out_err_2;
353 }
354
355 return 0;
356
357 out_err_2:
358 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
359 out_err_1:
360 iounmap(par->vdc_mem);
361 out_err_0:
362 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
363 return err;
364 }
365
366 /*
367 * Unmap the VDC and GPU register spaces.
368 */
369
vmlfb_disable_mmio(struct vml_par * par)370 static void vmlfb_disable_mmio(struct vml_par *par)
371 {
372 iounmap(par->gpu_mem);
373 release_mem_region(par->gpu_mem_base, par->gpu_mem_size);
374 iounmap(par->vdc_mem);
375 release_mem_region(par->vdc_mem_base, par->vdc_mem_size);
376 }
377
378 /*
379 * Release and uninit the VDC and GPU.
380 */
381
vmlfb_release_devices(struct vml_par * par)382 static void vmlfb_release_devices(struct vml_par *par)
383 {
384 if (atomic_dec_and_test(&par->refcount)) {
385 pci_set_drvdata(par->vdc, NULL);
386 pci_disable_device(par->gpu);
387 pci_disable_device(par->vdc);
388 }
389 }
390
391 /*
392 * Free up allocated resources for a device.
393 */
394
vml_pci_remove(struct pci_dev * dev)395 static void __devexit vml_pci_remove(struct pci_dev *dev)
396 {
397 struct fb_info *info;
398 struct vml_info *vinfo;
399 struct vml_par *par;
400
401 info = pci_get_drvdata(dev);
402 if (info) {
403 vinfo = container_of(info, struct vml_info, info);
404 par = vinfo->par;
405 mutex_lock(&vml_mutex);
406 unregister_framebuffer(info);
407 fb_dealloc_cmap(&info->cmap);
408 vmlfb_free_vram(vinfo);
409 vmlfb_disable_mmio(par);
410 vmlfb_release_devices(par);
411 kfree(vinfo);
412 kfree(par);
413 mutex_unlock(&vml_mutex);
414 }
415 }
416
vmlfb_set_pref_pixel_format(struct fb_var_screeninfo * var)417 static void vmlfb_set_pref_pixel_format(struct fb_var_screeninfo *var)
418 {
419 switch (var->bits_per_pixel) {
420 case 16:
421 var->blue.offset = 0;
422 var->blue.length = 5;
423 var->green.offset = 5;
424 var->green.length = 5;
425 var->red.offset = 10;
426 var->red.length = 5;
427 var->transp.offset = 15;
428 var->transp.length = 1;
429 break;
430 case 32:
431 var->blue.offset = 0;
432 var->blue.length = 8;
433 var->green.offset = 8;
434 var->green.length = 8;
435 var->red.offset = 16;
436 var->red.length = 8;
437 var->transp.offset = 24;
438 var->transp.length = 0;
439 break;
440 default:
441 break;
442 }
443
444 var->blue.msb_right = var->green.msb_right =
445 var->red.msb_right = var->transp.msb_right = 0;
446 }
447
448 /*
449 * Device initialization.
450 * We initialize one vml_par struct per device and one vml_info
451 * struct per pipe. Currently we have only one pipe.
452 */
453
vml_pci_probe(struct pci_dev * dev,const struct pci_device_id * id)454 static int __devinit vml_pci_probe(struct pci_dev *dev,
455 const struct pci_device_id *id)
456 {
457 struct vml_info *vinfo;
458 struct fb_info *info;
459 struct vml_par *par;
460 int err = 0;
461
462 par = kzalloc(sizeof(*par), GFP_KERNEL);
463 if (par == NULL)
464 return -ENOMEM;
465
466 vinfo = kzalloc(sizeof(*vinfo), GFP_KERNEL);
467 if (vinfo == NULL) {
468 err = -ENOMEM;
469 goto out_err_0;
470 }
471
472 vinfo->par = par;
473 par->vdc = dev;
474 atomic_set(&par->refcount, 1);
475
476 switch (id->device) {
477 case VML_DEVICE_VDC:
478 if ((err = vmlfb_get_gpu(par)))
479 goto out_err_1;
480 pci_set_drvdata(dev, &vinfo->info);
481 break;
482 default:
483 err = -ENODEV;
484 goto out_err_1;
485 break;
486 }
487
488 info = &vinfo->info;
489 info->flags = FBINFO_DEFAULT | FBINFO_PARTIAL_PAN_OK;
490
491 err = vmlfb_enable_mmio(par);
492 if (err)
493 goto out_err_2;
494
495 err = vmlfb_alloc_vram(vinfo, vml_mem_requested,
496 vml_mem_contig, vml_mem_min);
497 if (err)
498 goto out_err_3;
499
500 strcpy(info->fix.id, "Vermilion Range");
501 info->fix.mmio_start = 0;
502 info->fix.mmio_len = 0;
503 info->fix.smem_start = vinfo->vram_start;
504 info->fix.smem_len = vinfo->vram_contig_size;
505 info->fix.type = FB_TYPE_PACKED_PIXELS;
506 info->fix.visual = FB_VISUAL_TRUECOLOR;
507 info->fix.ypanstep = 1;
508 info->fix.xpanstep = 1;
509 info->fix.ywrapstep = 0;
510 info->fix.accel = FB_ACCEL_NONE;
511 info->screen_base = vinfo->vram_logical;
512 info->pseudo_palette = vinfo->pseudo_palette;
513 info->par = par;
514 info->fbops = &vmlfb_ops;
515 info->device = &dev->dev;
516
517 INIT_LIST_HEAD(&vinfo->head);
518 vinfo->pipe_disabled = 1;
519 vinfo->cur_blank_mode = FB_BLANK_UNBLANK;
520
521 info->var.grayscale = 0;
522 info->var.bits_per_pixel = 16;
523 vmlfb_set_pref_pixel_format(&info->var);
524
525 if (!fb_find_mode
526 (&info->var, info, vml_default_mode, NULL, 0, &defaultmode, 16)) {
527 printk(KERN_ERR MODULE_NAME ": Could not find initial mode\n");
528 }
529
530 if (fb_alloc_cmap(&info->cmap, 256, 1) < 0) {
531 err = -ENOMEM;
532 goto out_err_4;
533 }
534
535 err = register_framebuffer(info);
536 if (err) {
537 printk(KERN_ERR MODULE_NAME ": Register framebuffer error.\n");
538 goto out_err_5;
539 }
540
541 printk("Initialized vmlfb\n");
542
543 return 0;
544
545 out_err_5:
546 fb_dealloc_cmap(&info->cmap);
547 out_err_4:
548 vmlfb_free_vram(vinfo);
549 out_err_3:
550 vmlfb_disable_mmio(par);
551 out_err_2:
552 vmlfb_release_devices(par);
553 out_err_1:
554 kfree(vinfo);
555 out_err_0:
556 kfree(par);
557 return err;
558 }
559
vmlfb_open(struct fb_info * info,int user)560 static int vmlfb_open(struct fb_info *info, int user)
561 {
562 /*
563 * Save registers here?
564 */
565 return 0;
566 }
567
vmlfb_release(struct fb_info * info,int user)568 static int vmlfb_release(struct fb_info *info, int user)
569 {
570 /*
571 * Restore registers here.
572 */
573
574 return 0;
575 }
576
vml_nearest_clock(int clock)577 static int vml_nearest_clock(int clock)
578 {
579
580 int i;
581 int cur_index;
582 int cur_diff;
583 int diff;
584
585 cur_index = 0;
586 cur_diff = clock - vml_clocks[0];
587 cur_diff = (cur_diff < 0) ? -cur_diff : cur_diff;
588 for (i = 1; i < vml_num_clocks; ++i) {
589 diff = clock - vml_clocks[i];
590 diff = (diff < 0) ? -diff : diff;
591 if (diff < cur_diff) {
592 cur_index = i;
593 cur_diff = diff;
594 }
595 }
596 return vml_clocks[cur_index];
597 }
598
vmlfb_check_var_locked(struct fb_var_screeninfo * var,struct vml_info * vinfo)599 static int vmlfb_check_var_locked(struct fb_var_screeninfo *var,
600 struct vml_info *vinfo)
601 {
602 u32 pitch;
603 u64 mem;
604 int nearest_clock;
605 int clock;
606 int clock_diff;
607 struct fb_var_screeninfo v;
608
609 v = *var;
610 clock = PICOS2KHZ(var->pixclock);
611
612 if (subsys && subsys->nearest_clock) {
613 nearest_clock = subsys->nearest_clock(subsys, clock);
614 } else {
615 nearest_clock = vml_nearest_clock(clock);
616 }
617
618 /*
619 * Accept a 20% diff.
620 */
621
622 clock_diff = nearest_clock - clock;
623 clock_diff = (clock_diff < 0) ? -clock_diff : clock_diff;
624 if (clock_diff > clock / 5) {
625 #if 0
626 printk(KERN_DEBUG MODULE_NAME ": Diff failure. %d %d\n",clock_diff,clock);
627 #endif
628 return -EINVAL;
629 }
630
631 v.pixclock = KHZ2PICOS(nearest_clock);
632
633 if (var->xres > VML_MAX_XRES || var->yres > VML_MAX_YRES) {
634 printk(KERN_DEBUG MODULE_NAME ": Resolution failure.\n");
635 return -EINVAL;
636 }
637 if (var->xres_virtual > VML_MAX_XRES_VIRTUAL) {
638 printk(KERN_DEBUG MODULE_NAME
639 ": Virtual resolution failure.\n");
640 return -EINVAL;
641 }
642 switch (v.bits_per_pixel) {
643 case 0 ... 16:
644 v.bits_per_pixel = 16;
645 break;
646 case 17 ... 32:
647 v.bits_per_pixel = 32;
648 break;
649 default:
650 printk(KERN_DEBUG MODULE_NAME ": Invalid bpp: %d.\n",
651 var->bits_per_pixel);
652 return -EINVAL;
653 }
654
655 pitch = ALIGN((var->xres * var->bits_per_pixel) >> 3, 0x40);
656 mem = pitch * var->yres_virtual;
657 if (mem > vinfo->vram_contig_size) {
658 return -ENOMEM;
659 }
660
661 switch (v.bits_per_pixel) {
662 case 16:
663 if (var->blue.offset != 0 ||
664 var->blue.length != 5 ||
665 var->green.offset != 5 ||
666 var->green.length != 5 ||
667 var->red.offset != 10 ||
668 var->red.length != 5 ||
669 var->transp.offset != 15 || var->transp.length != 1) {
670 vmlfb_set_pref_pixel_format(&v);
671 }
672 break;
673 case 32:
674 if (var->blue.offset != 0 ||
675 var->blue.length != 8 ||
676 var->green.offset != 8 ||
677 var->green.length != 8 ||
678 var->red.offset != 16 ||
679 var->red.length != 8 ||
680 (var->transp.length != 0 && var->transp.length != 8) ||
681 (var->transp.length == 8 && var->transp.offset != 24)) {
682 vmlfb_set_pref_pixel_format(&v);
683 }
684 break;
685 default:
686 return -EINVAL;
687 }
688
689 *var = v;
690
691 return 0;
692 }
693
vmlfb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)694 static int vmlfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
695 {
696 struct vml_info *vinfo = container_of(info, struct vml_info, info);
697 int ret;
698
699 mutex_lock(&vml_mutex);
700 ret = vmlfb_check_var_locked(var, vinfo);
701 mutex_unlock(&vml_mutex);
702
703 return ret;
704 }
705
vml_wait_vblank(struct vml_info * vinfo)706 static void vml_wait_vblank(struct vml_info *vinfo)
707 {
708 /* Wait for vblank. For now, just wait for a 50Hz cycle (20ms)) */
709 mdelay(20);
710 }
711
vmlfb_disable_pipe(struct vml_info * vinfo)712 static void vmlfb_disable_pipe(struct vml_info *vinfo)
713 {
714 struct vml_par *par = vinfo->par;
715
716 /* Disable the MDVO pad */
717 VML_WRITE32(par, VML_RCOMPSTAT, 0);
718 while (!(VML_READ32(par, VML_RCOMPSTAT) & VML_MDVO_VDC_I_RCOMP)) ;
719
720 /* Disable display planes */
721 VML_WRITE32(par, VML_DSPCCNTR,
722 VML_READ32(par, VML_DSPCCNTR) & ~VML_GFX_ENABLE);
723 (void)VML_READ32(par, VML_DSPCCNTR);
724 /* Wait for vblank for the disable to take effect */
725 vml_wait_vblank(vinfo);
726
727 /* Next, disable display pipes */
728 VML_WRITE32(par, VML_PIPEACONF, 0);
729 (void)VML_READ32(par, VML_PIPEACONF);
730
731 vinfo->pipe_disabled = 1;
732 }
733
734 #ifdef VERMILION_DEBUG
vml_dump_regs(struct vml_info * vinfo)735 static void vml_dump_regs(struct vml_info *vinfo)
736 {
737 struct vml_par *par = vinfo->par;
738
739 printk(KERN_DEBUG MODULE_NAME ": Modesetting register dump:\n");
740 printk(KERN_DEBUG MODULE_NAME ": \tHTOTAL_A : 0x%08x\n",
741 (unsigned)VML_READ32(par, VML_HTOTAL_A));
742 printk(KERN_DEBUG MODULE_NAME ": \tHBLANK_A : 0x%08x\n",
743 (unsigned)VML_READ32(par, VML_HBLANK_A));
744 printk(KERN_DEBUG MODULE_NAME ": \tHSYNC_A : 0x%08x\n",
745 (unsigned)VML_READ32(par, VML_HSYNC_A));
746 printk(KERN_DEBUG MODULE_NAME ": \tVTOTAL_A : 0x%08x\n",
747 (unsigned)VML_READ32(par, VML_VTOTAL_A));
748 printk(KERN_DEBUG MODULE_NAME ": \tVBLANK_A : 0x%08x\n",
749 (unsigned)VML_READ32(par, VML_VBLANK_A));
750 printk(KERN_DEBUG MODULE_NAME ": \tVSYNC_A : 0x%08x\n",
751 (unsigned)VML_READ32(par, VML_VSYNC_A));
752 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSTRIDE : 0x%08x\n",
753 (unsigned)VML_READ32(par, VML_DSPCSTRIDE));
754 printk(KERN_DEBUG MODULE_NAME ": \tDSPCSIZE : 0x%08x\n",
755 (unsigned)VML_READ32(par, VML_DSPCSIZE));
756 printk(KERN_DEBUG MODULE_NAME ": \tDSPCPOS : 0x%08x\n",
757 (unsigned)VML_READ32(par, VML_DSPCPOS));
758 printk(KERN_DEBUG MODULE_NAME ": \tDSPARB : 0x%08x\n",
759 (unsigned)VML_READ32(par, VML_DSPARB));
760 printk(KERN_DEBUG MODULE_NAME ": \tDSPCADDR : 0x%08x\n",
761 (unsigned)VML_READ32(par, VML_DSPCADDR));
762 printk(KERN_DEBUG MODULE_NAME ": \tBCLRPAT_A : 0x%08x\n",
763 (unsigned)VML_READ32(par, VML_BCLRPAT_A));
764 printk(KERN_DEBUG MODULE_NAME ": \tCANVSCLR_A : 0x%08x\n",
765 (unsigned)VML_READ32(par, VML_CANVSCLR_A));
766 printk(KERN_DEBUG MODULE_NAME ": \tPIPEASRC : 0x%08x\n",
767 (unsigned)VML_READ32(par, VML_PIPEASRC));
768 printk(KERN_DEBUG MODULE_NAME ": \tPIPEACONF : 0x%08x\n",
769 (unsigned)VML_READ32(par, VML_PIPEACONF));
770 printk(KERN_DEBUG MODULE_NAME ": \tDSPCCNTR : 0x%08x\n",
771 (unsigned)VML_READ32(par, VML_DSPCCNTR));
772 printk(KERN_DEBUG MODULE_NAME ": \tRCOMPSTAT : 0x%08x\n",
773 (unsigned)VML_READ32(par, VML_RCOMPSTAT));
774 printk(KERN_DEBUG MODULE_NAME ": End of modesetting register dump.\n");
775 }
776 #endif
777
vmlfb_set_par_locked(struct vml_info * vinfo)778 static int vmlfb_set_par_locked(struct vml_info *vinfo)
779 {
780 struct vml_par *par = vinfo->par;
781 struct fb_info *info = &vinfo->info;
782 struct fb_var_screeninfo *var = &info->var;
783 u32 htotal, hactive, hblank_start, hblank_end, hsync_start, hsync_end;
784 u32 vtotal, vactive, vblank_start, vblank_end, vsync_start, vsync_end;
785 u32 dspcntr;
786 int clock;
787
788 vinfo->bytes_per_pixel = var->bits_per_pixel >> 3;
789 vinfo->stride = ALIGN(var->xres_virtual * vinfo->bytes_per_pixel, 0x40);
790 info->fix.line_length = vinfo->stride;
791
792 if (!subsys)
793 return 0;
794
795 htotal =
796 var->xres + var->right_margin + var->hsync_len + var->left_margin;
797 hactive = var->xres;
798 hblank_start = var->xres;
799 hblank_end = htotal;
800 hsync_start = hactive + var->right_margin;
801 hsync_end = hsync_start + var->hsync_len;
802
803 vtotal =
804 var->yres + var->lower_margin + var->vsync_len + var->upper_margin;
805 vactive = var->yres;
806 vblank_start = var->yres;
807 vblank_end = vtotal;
808 vsync_start = vactive + var->lower_margin;
809 vsync_end = vsync_start + var->vsync_len;
810
811 dspcntr = VML_GFX_ENABLE | VML_GFX_GAMMABYPASS;
812 clock = PICOS2KHZ(var->pixclock);
813
814 if (subsys->nearest_clock) {
815 clock = subsys->nearest_clock(subsys, clock);
816 } else {
817 clock = vml_nearest_clock(clock);
818 }
819 printk(KERN_DEBUG MODULE_NAME
820 ": Set mode Hfreq : %d kHz, Vfreq : %d Hz.\n", clock / htotal,
821 ((clock / htotal) * 1000) / vtotal);
822
823 switch (var->bits_per_pixel) {
824 case 16:
825 dspcntr |= VML_GFX_ARGB1555;
826 break;
827 case 32:
828 if (var->transp.length == 8)
829 dspcntr |= VML_GFX_ARGB8888 | VML_GFX_ALPHAMULT;
830 else
831 dspcntr |= VML_GFX_RGB0888;
832 break;
833 default:
834 return -EINVAL;
835 }
836
837 vmlfb_disable_pipe(vinfo);
838 mb();
839
840 if (subsys->set_clock)
841 subsys->set_clock(subsys, clock);
842 else
843 return -EINVAL;
844
845 VML_WRITE32(par, VML_HTOTAL_A, ((htotal - 1) << 16) | (hactive - 1));
846 VML_WRITE32(par, VML_HBLANK_A,
847 ((hblank_end - 1) << 16) | (hblank_start - 1));
848 VML_WRITE32(par, VML_HSYNC_A,
849 ((hsync_end - 1) << 16) | (hsync_start - 1));
850 VML_WRITE32(par, VML_VTOTAL_A, ((vtotal - 1) << 16) | (vactive - 1));
851 VML_WRITE32(par, VML_VBLANK_A,
852 ((vblank_end - 1) << 16) | (vblank_start - 1));
853 VML_WRITE32(par, VML_VSYNC_A,
854 ((vsync_end - 1) << 16) | (vsync_start - 1));
855 VML_WRITE32(par, VML_DSPCSTRIDE, vinfo->stride);
856 VML_WRITE32(par, VML_DSPCSIZE,
857 ((var->yres - 1) << 16) | (var->xres - 1));
858 VML_WRITE32(par, VML_DSPCPOS, 0x00000000);
859 VML_WRITE32(par, VML_DSPARB, VML_FIFO_DEFAULT);
860 VML_WRITE32(par, VML_BCLRPAT_A, 0x00000000);
861 VML_WRITE32(par, VML_CANVSCLR_A, 0x00000000);
862 VML_WRITE32(par, VML_PIPEASRC,
863 ((var->xres - 1) << 16) | (var->yres - 1));
864
865 wmb();
866 VML_WRITE32(par, VML_PIPEACONF, VML_PIPE_ENABLE);
867 wmb();
868 VML_WRITE32(par, VML_DSPCCNTR, dspcntr);
869 wmb();
870 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
871 var->yoffset * vinfo->stride +
872 var->xoffset * vinfo->bytes_per_pixel);
873
874 VML_WRITE32(par, VML_RCOMPSTAT, VML_MDVO_PAD_ENABLE);
875
876 while (!(VML_READ32(par, VML_RCOMPSTAT) &
877 (VML_MDVO_VDC_I_RCOMP | VML_MDVO_PAD_ENABLE))) ;
878
879 vinfo->pipe_disabled = 0;
880 #ifdef VERMILION_DEBUG
881 vml_dump_regs(vinfo);
882 #endif
883
884 return 0;
885 }
886
vmlfb_set_par(struct fb_info * info)887 static int vmlfb_set_par(struct fb_info *info)
888 {
889 struct vml_info *vinfo = container_of(info, struct vml_info, info);
890 int ret;
891
892 mutex_lock(&vml_mutex);
893 list_del(&vinfo->head);
894 list_add(&vinfo->head, (subsys) ? &global_has_mode : &global_no_mode);
895 ret = vmlfb_set_par_locked(vinfo);
896
897 mutex_unlock(&vml_mutex);
898 return ret;
899 }
900
vmlfb_blank_locked(struct vml_info * vinfo)901 static int vmlfb_blank_locked(struct vml_info *vinfo)
902 {
903 struct vml_par *par = vinfo->par;
904 u32 cur = VML_READ32(par, VML_PIPEACONF);
905
906 switch (vinfo->cur_blank_mode) {
907 case FB_BLANK_UNBLANK:
908 if (vinfo->pipe_disabled) {
909 vmlfb_set_par_locked(vinfo);
910 }
911 VML_WRITE32(par, VML_PIPEACONF, cur & ~VML_PIPE_FORCE_BORDER);
912 (void)VML_READ32(par, VML_PIPEACONF);
913 break;
914 case FB_BLANK_NORMAL:
915 if (vinfo->pipe_disabled) {
916 vmlfb_set_par_locked(vinfo);
917 }
918 VML_WRITE32(par, VML_PIPEACONF, cur | VML_PIPE_FORCE_BORDER);
919 (void)VML_READ32(par, VML_PIPEACONF);
920 break;
921 case FB_BLANK_VSYNC_SUSPEND:
922 case FB_BLANK_HSYNC_SUSPEND:
923 if (!vinfo->pipe_disabled) {
924 vmlfb_disable_pipe(vinfo);
925 }
926 break;
927 case FB_BLANK_POWERDOWN:
928 if (!vinfo->pipe_disabled) {
929 vmlfb_disable_pipe(vinfo);
930 }
931 break;
932 default:
933 return -EINVAL;
934 }
935
936 return 0;
937 }
938
vmlfb_blank(int blank_mode,struct fb_info * info)939 static int vmlfb_blank(int blank_mode, struct fb_info *info)
940 {
941 struct vml_info *vinfo = container_of(info, struct vml_info, info);
942 int ret;
943
944 mutex_lock(&vml_mutex);
945 vinfo->cur_blank_mode = blank_mode;
946 ret = vmlfb_blank_locked(vinfo);
947 mutex_unlock(&vml_mutex);
948 return ret;
949 }
950
vmlfb_pan_display(struct fb_var_screeninfo * var,struct fb_info * info)951 static int vmlfb_pan_display(struct fb_var_screeninfo *var,
952 struct fb_info *info)
953 {
954 struct vml_info *vinfo = container_of(info, struct vml_info, info);
955 struct vml_par *par = vinfo->par;
956
957 mutex_lock(&vml_mutex);
958 VML_WRITE32(par, VML_DSPCADDR, (u32) vinfo->vram_start +
959 var->yoffset * vinfo->stride +
960 var->xoffset * vinfo->bytes_per_pixel);
961 (void)VML_READ32(par, VML_DSPCADDR);
962 mutex_unlock(&vml_mutex);
963
964 return 0;
965 }
966
vmlfb_setcolreg(u_int regno,u_int red,u_int green,u_int blue,u_int transp,struct fb_info * info)967 static int vmlfb_setcolreg(u_int regno, u_int red, u_int green, u_int blue,
968 u_int transp, struct fb_info *info)
969 {
970 u32 v;
971
972 if (regno >= 16)
973 return -EINVAL;
974
975 if (info->var.grayscale) {
976 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
977 }
978
979 if (info->fix.visual != FB_VISUAL_TRUECOLOR)
980 return -EINVAL;
981
982 red = VML_TOHW(red, info->var.red.length);
983 blue = VML_TOHW(blue, info->var.blue.length);
984 green = VML_TOHW(green, info->var.green.length);
985 transp = VML_TOHW(transp, info->var.transp.length);
986
987 v = (red << info->var.red.offset) |
988 (green << info->var.green.offset) |
989 (blue << info->var.blue.offset) |
990 (transp << info->var.transp.offset);
991
992 switch (info->var.bits_per_pixel) {
993 case 16:
994 ((u32 *) info->pseudo_palette)[regno] = v;
995 break;
996 case 24:
997 case 32:
998 ((u32 *) info->pseudo_palette)[regno] = v;
999 break;
1000 }
1001 return 0;
1002 }
1003
vmlfb_mmap(struct fb_info * info,struct vm_area_struct * vma)1004 static int vmlfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
1005 {
1006 struct vml_info *vinfo = container_of(info, struct vml_info, info);
1007 unsigned long size = vma->vm_end - vma->vm_start;
1008 unsigned long offset = vma->vm_pgoff << PAGE_SHIFT;
1009 int ret;
1010
1011 if (vma->vm_pgoff > (~0UL >> PAGE_SHIFT))
1012 return -EINVAL;
1013 if (offset + size > vinfo->vram_contig_size)
1014 return -EINVAL;
1015 ret = vmlfb_vram_offset(vinfo, offset);
1016 if (ret)
1017 return -EINVAL;
1018 offset += vinfo->vram_start;
1019 pgprot_val(vma->vm_page_prot) |= _PAGE_PCD;
1020 pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT;
1021 vma->vm_flags |= VM_RESERVED | VM_IO;
1022 if (remap_pfn_range(vma, vma->vm_start, offset >> PAGE_SHIFT,
1023 size, vma->vm_page_prot))
1024 return -EAGAIN;
1025 return 0;
1026 }
1027
vmlfb_sync(struct fb_info * info)1028 static int vmlfb_sync(struct fb_info *info)
1029 {
1030 return 0;
1031 }
1032
vmlfb_cursor(struct fb_info * info,struct fb_cursor * cursor)1033 static int vmlfb_cursor(struct fb_info *info, struct fb_cursor *cursor)
1034 {
1035 return -EINVAL; /* just to force soft_cursor() call */
1036 }
1037
1038 static struct fb_ops vmlfb_ops = {
1039 .owner = THIS_MODULE,
1040 .fb_open = vmlfb_open,
1041 .fb_release = vmlfb_release,
1042 .fb_check_var = vmlfb_check_var,
1043 .fb_set_par = vmlfb_set_par,
1044 .fb_blank = vmlfb_blank,
1045 .fb_pan_display = vmlfb_pan_display,
1046 .fb_fillrect = cfb_fillrect,
1047 .fb_copyarea = cfb_copyarea,
1048 .fb_imageblit = cfb_imageblit,
1049 .fb_cursor = vmlfb_cursor,
1050 .fb_sync = vmlfb_sync,
1051 .fb_mmap = vmlfb_mmap,
1052 .fb_setcolreg = vmlfb_setcolreg
1053 };
1054
1055 static struct pci_device_id vml_ids[] = {
1056 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, VML_DEVICE_VDC)},
1057 {0}
1058 };
1059
1060 static struct pci_driver vmlfb_pci_driver = {
1061 .name = "vmlfb",
1062 .id_table = vml_ids,
1063 .probe = vml_pci_probe,
1064 .remove = __devexit_p(vml_pci_remove)
1065 };
1066
vmlfb_cleanup(void)1067 static void __exit vmlfb_cleanup(void)
1068 {
1069 pci_unregister_driver(&vmlfb_pci_driver);
1070 }
1071
vmlfb_init(void)1072 static int __init vmlfb_init(void)
1073 {
1074
1075 #ifndef MODULE
1076 char *option = NULL;
1077
1078 if (fb_get_options(MODULE_NAME, &option))
1079 return -ENODEV;
1080 #endif
1081
1082 printk(KERN_DEBUG MODULE_NAME ": initializing\n");
1083 mutex_init(&vml_mutex);
1084 INIT_LIST_HEAD(&global_no_mode);
1085 INIT_LIST_HEAD(&global_has_mode);
1086
1087 return pci_register_driver(&vmlfb_pci_driver);
1088 }
1089
vmlfb_register_subsys(struct vml_sys * sys)1090 int vmlfb_register_subsys(struct vml_sys *sys)
1091 {
1092 struct vml_info *entry;
1093 struct list_head *list;
1094 u32 save_activate;
1095
1096 mutex_lock(&vml_mutex);
1097 if (subsys != NULL) {
1098 subsys->restore(subsys);
1099 }
1100 subsys = sys;
1101 subsys->save(subsys);
1102
1103 /*
1104 * We need to restart list traversal for each item, since we
1105 * release the list mutex in the loop.
1106 */
1107
1108 list = global_no_mode.next;
1109 while (list != &global_no_mode) {
1110 list_del_init(list);
1111 entry = list_entry(list, struct vml_info, head);
1112
1113 /*
1114 * First, try the current mode which might not be
1115 * completely validated with respect to the pixel clock.
1116 */
1117
1118 if (!vmlfb_check_var_locked(&entry->info.var, entry)) {
1119 vmlfb_set_par_locked(entry);
1120 list_add_tail(list, &global_has_mode);
1121 } else {
1122
1123 /*
1124 * Didn't work. Try to find another mode,
1125 * that matches this subsys.
1126 */
1127
1128 mutex_unlock(&vml_mutex);
1129 save_activate = entry->info.var.activate;
1130 entry->info.var.bits_per_pixel = 16;
1131 vmlfb_set_pref_pixel_format(&entry->info.var);
1132 if (fb_find_mode(&entry->info.var,
1133 &entry->info,
1134 vml_default_mode, NULL, 0, NULL, 16)) {
1135 entry->info.var.activate |=
1136 FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW;
1137 fb_set_var(&entry->info, &entry->info.var);
1138 } else {
1139 printk(KERN_ERR MODULE_NAME
1140 ": Sorry. no mode found for this subsys.\n");
1141 }
1142 entry->info.var.activate = save_activate;
1143 mutex_lock(&vml_mutex);
1144 }
1145 vmlfb_blank_locked(entry);
1146 list = global_no_mode.next;
1147 }
1148 mutex_unlock(&vml_mutex);
1149
1150 printk(KERN_DEBUG MODULE_NAME ": Registered %s subsystem.\n",
1151 subsys->name ? subsys->name : "unknown");
1152 return 0;
1153 }
1154
1155 EXPORT_SYMBOL_GPL(vmlfb_register_subsys);
1156
vmlfb_unregister_subsys(struct vml_sys * sys)1157 void vmlfb_unregister_subsys(struct vml_sys *sys)
1158 {
1159 struct vml_info *entry, *next;
1160
1161 mutex_lock(&vml_mutex);
1162 if (subsys != sys) {
1163 mutex_unlock(&vml_mutex);
1164 return;
1165 }
1166 subsys->restore(subsys);
1167 subsys = NULL;
1168 list_for_each_entry_safe(entry, next, &global_has_mode, head) {
1169 printk(KERN_DEBUG MODULE_NAME ": subsys disable pipe\n");
1170 vmlfb_disable_pipe(entry);
1171 list_del(&entry->head);
1172 list_add_tail(&entry->head, &global_no_mode);
1173 }
1174 mutex_unlock(&vml_mutex);
1175 }
1176
1177 EXPORT_SYMBOL_GPL(vmlfb_unregister_subsys);
1178
1179 module_init(vmlfb_init);
1180 module_exit(vmlfb_cleanup);
1181
1182 MODULE_AUTHOR("Tungsten Graphics");
1183 MODULE_DESCRIPTION("Initialization of the Vermilion display devices");
1184 MODULE_VERSION("1.0.0");
1185 MODULE_LICENSE("GPL");
1186