1 #ifndef LINUX_SSB_DRIVER_GIGE_H_
2 #define LINUX_SSB_DRIVER_GIGE_H_
3
4 #include <linux/ssb/ssb.h>
5 #include <linux/pci.h>
6 #include <linux/spinlock.h>
7
8
9 #ifdef CONFIG_SSB_DRIVER_GIGE
10
11
12 #define SSB_GIGE_PCIIO 0x0000 /* PCI I/O Registers (1024 bytes) */
13 #define SSB_GIGE_RESERVED 0x0400 /* Reserved (1024 bytes) */
14 #define SSB_GIGE_PCICFG 0x0800 /* PCI config space (256 bytes) */
15 #define SSB_GIGE_SHIM_FLUSHSTAT 0x0C00 /* PCI to OCP: Flush status control (32bit) */
16 #define SSB_GIGE_SHIM_FLUSHRDA 0x0C04 /* PCI to OCP: Flush read address (32bit) */
17 #define SSB_GIGE_SHIM_FLUSHTO 0x0C08 /* PCI to OCP: Flush timeout counter (32bit) */
18 #define SSB_GIGE_SHIM_BARRIER 0x0C0C /* PCI to OCP: Barrier register (32bit) */
19 #define SSB_GIGE_SHIM_MAOCPSI 0x0C10 /* PCI to OCP: MaocpSI Control (32bit) */
20 #define SSB_GIGE_SHIM_SIOCPMA 0x0C14 /* PCI to OCP: SiocpMa Control (32bit) */
21
22 /* TM Status High flags */
23 #define SSB_GIGE_TMSHIGH_RGMII 0x00010000 /* Have an RGMII PHY-bus */
24 /* TM Status Low flags */
25 #define SSB_GIGE_TMSLOW_TXBYPASS 0x00080000 /* TX bypass (no delay) */
26 #define SSB_GIGE_TMSLOW_RXBYPASS 0x00100000 /* RX bypass (no delay) */
27 #define SSB_GIGE_TMSLOW_DLLEN 0x01000000 /* Enable DLL controls */
28
29 /* Boardflags (low) */
30 #define SSB_GIGE_BFL_ROBOSWITCH 0x0010
31
32
33 #define SSB_GIGE_MEM_RES_NAME "SSB Broadcom 47xx GigE memory"
34 #define SSB_GIGE_IO_RES_NAME "SSB Broadcom 47xx GigE I/O"
35
36 struct ssb_gige {
37 struct ssb_device *dev;
38
39 spinlock_t lock;
40
41 /* True, if the device has an RGMII bus.
42 * False, if the device has a GMII bus. */
43 bool has_rgmii;
44
45 /* The PCI controller device. */
46 struct pci_controller pci_controller;
47 struct pci_ops pci_ops;
48 struct resource mem_resource;
49 struct resource io_resource;
50 };
51
52 /* Check whether a PCI device is a SSB Gigabit Ethernet core. */
53 extern bool pdev_is_ssb_gige_core(struct pci_dev *pdev);
54
55 /* Convert a pci_dev pointer to a ssb_gige pointer. */
pdev_to_ssb_gige(struct pci_dev * pdev)56 static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
57 {
58 if (!pdev_is_ssb_gige_core(pdev))
59 return NULL;
60 return container_of(pdev->bus->ops, struct ssb_gige, pci_ops);
61 }
62
63 /* Returns whether the PHY is connected by an RGMII bus. */
ssb_gige_is_rgmii(struct pci_dev * pdev)64 static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
65 {
66 struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
67 return (dev ? dev->has_rgmii : 0);
68 }
69
70 /* Returns whether we have a Roboswitch. */
ssb_gige_have_roboswitch(struct pci_dev * pdev)71 static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
72 {
73 struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
74 if (dev)
75 return !!(dev->dev->bus->sprom.boardflags_lo &
76 SSB_GIGE_BFL_ROBOSWITCH);
77 return 0;
78 }
79
80 /* Returns whether we can only do one DMA at once. */
ssb_gige_one_dma_at_once(struct pci_dev * pdev)81 static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
82 {
83 struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
84 if (dev)
85 return ((dev->dev->bus->chip_id == 0x4785) &&
86 (dev->dev->bus->chip_rev < 2));
87 return 0;
88 }
89
90 /* Returns whether we must flush posted writes. */
ssb_gige_must_flush_posted_writes(struct pci_dev * pdev)91 static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
92 {
93 struct ssb_gige *dev = pdev_to_ssb_gige(pdev);
94 if (dev)
95 return (dev->dev->bus->chip_id == 0x4785);
96 return 0;
97 }
98
99 extern char * nvram_get(const char *name);
100 /* Get the device MAC address */
ssb_gige_get_macaddr(struct pci_dev * pdev,u8 * macaddr)101 static inline void ssb_gige_get_macaddr(struct pci_dev *pdev, u8 *macaddr)
102 {
103 #ifdef CONFIG_BCM47XX
104 char *res = nvram_get("et0macaddr");
105 if (res)
106 memcpy(macaddr, res, 6);
107 #endif
108 }
109
110 extern int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
111 struct pci_dev *pdev);
112 extern int ssb_gige_map_irq(struct ssb_device *sdev,
113 const struct pci_dev *pdev);
114
115 /* The GigE driver is not a standalone module, because we don't have support
116 * for unregistering the driver. So we could not unload the module anyway. */
117 extern int ssb_gige_init(void);
ssb_gige_exit(void)118 static inline void ssb_gige_exit(void)
119 {
120 /* Currently we can not unregister the GigE driver,
121 * because we can not unregister the PCI bridge. */
122 BUG();
123 }
124
125
126 #else /* CONFIG_SSB_DRIVER_GIGE */
127 /* Gigabit Ethernet driver disabled */
128
129
ssb_gige_pcibios_plat_dev_init(struct ssb_device * sdev,struct pci_dev * pdev)130 static inline int ssb_gige_pcibios_plat_dev_init(struct ssb_device *sdev,
131 struct pci_dev *pdev)
132 {
133 return -ENOSYS;
134 }
ssb_gige_map_irq(struct ssb_device * sdev,const struct pci_dev * pdev)135 static inline int ssb_gige_map_irq(struct ssb_device *sdev,
136 const struct pci_dev *pdev)
137 {
138 return -ENOSYS;
139 }
ssb_gige_init(void)140 static inline int ssb_gige_init(void)
141 {
142 return 0;
143 }
ssb_gige_exit(void)144 static inline void ssb_gige_exit(void)
145 {
146 }
147
pdev_is_ssb_gige_core(struct pci_dev * pdev)148 static inline bool pdev_is_ssb_gige_core(struct pci_dev *pdev)
149 {
150 return 0;
151 }
pdev_to_ssb_gige(struct pci_dev * pdev)152 static inline struct ssb_gige * pdev_to_ssb_gige(struct pci_dev *pdev)
153 {
154 return NULL;
155 }
ssb_gige_is_rgmii(struct pci_dev * pdev)156 static inline bool ssb_gige_is_rgmii(struct pci_dev *pdev)
157 {
158 return 0;
159 }
ssb_gige_have_roboswitch(struct pci_dev * pdev)160 static inline bool ssb_gige_have_roboswitch(struct pci_dev *pdev)
161 {
162 return 0;
163 }
ssb_gige_one_dma_at_once(struct pci_dev * pdev)164 static inline bool ssb_gige_one_dma_at_once(struct pci_dev *pdev)
165 {
166 return 0;
167 }
ssb_gige_must_flush_posted_writes(struct pci_dev * pdev)168 static inline bool ssb_gige_must_flush_posted_writes(struct pci_dev *pdev)
169 {
170 return 0;
171 }
172
173 #endif /* CONFIG_SSB_DRIVER_GIGE */
174 #endif /* LINUX_SSB_DRIVER_GIGE_H_ */
175