1// 2// Copyright(c) by Benny Sjostrand (benny@hostmobility.com) 3// 4// This program is free software; you can redistribute it and/or modify 5// it under the terms of the GNU General Public License as published by 6// the Free Software Foundation; either version 2 of the License, or 7// (at your option) any later version. 8// 9// This program is distributed in the hope that it will be useful, 10// but WITHOUT ANY WARRANTY; without even the implied warranty of 11// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12// GNU General Public License for more details. 13// 14// You should have received a copy of the GNU General Public License 15// along with this program; if not, write to the Free Software 16// Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17// 18 19 20// 21// This code runs inside the DSP (cs4610, cs4612, cs4624, or cs4630), 22// to compile it you need a tool named SPASM 3.0 and DSP code owned by 23// Cirrus Logic(R). The SPASM program will generate a object file (cwcdma.osp), 24// the "ospparser" tool will genereate the cwcdma.h file it's included from 25// the cs46xx_lib.c file. 26// 27// 28// The purpose of this code is very simple: make it possible to tranfser 29// the samples 'as they are' with no alteration from a PCMreader SCB (DMA from host) 30// to any other SCB. This is useful for AC3 throug SPDIF. SRC (source rate converters) 31// task always alters the samples in some how, however it's from 48khz -> 48khz. The 32// alterations are not audible, but AC3 wont work. 33// 34// ... 35// | 36// +---------------+ 37// | AsynchFGTxSCB | 38// +---------------+ 39// | 40// subListPtr 41// | 42// +--------------+ 43// | DMAReader | 44// +--------------+ 45// | 46// subListPtr 47// | 48// +-------------+ 49// | PCMReader | 50// +-------------+ 51// (DMA from host) 52// 53 54struct dmaSCB 55 { 56 long dma_reserved1[3]; 57 58 short dma_reserved2:dma_outBufPtr; 59 60 short dma_unused1:dma_unused2; 61 62 long dma_reserved3[4]; 63 64 short dma_subListPtr:dma_nextSCB; 65 short dma_SPBptr:dma_entryPoint; 66 67 long dma_strmRsConfig; 68 long dma_strmBufPtr; 69 70 long dma_reserved4; 71 72 VolumeControl s2m_volume; 73 }; 74 75#export DMAReader 76void DMAReader() 77{ 78 execChild(); 79 r2 = r0->dma_subListPtr; 80 r1 = r0->nextSCB; 81 82 rsConfig01 = r2->strmRsConfig; 83 // Load rsConfig for input buffer 84 85 rsDMA01 = r2->basicReq.daw, , tb = Z(0 - rf); 86 // Load rsDMA in case input buffer is a DMA buffer Test to see if there is any data to transfer 87 88 if (tb) goto execSibling_2ind1 after { 89 r5 = rf + (-1); 90 r6 = r1->dma_entryPoint; // r6 = entry point of sibling task 91 r1 = r1->dma_SPBptr, // r1 = pointer to sibling task's SPB 92 , ind = r6; // Load entry point of sibling task 93 } 94 95 rsConfig23 = r0->dma_strmRsConfig; 96 // Load rsConfig for output buffer (never a DMA buffer) 97 98 r4 = r0->dma_outBufPtr; 99 100 rsa0 = r2->strmBufPtr; 101 // rsa0 = input buffer pointer 102 103 for (i = r5; i >= 0; --i) 104 after { 105 rsa2 = r4; 106 // rsa2 = output buffer pointer 107 108 nop; 109 nop; 110 } 111 //***************************** 112 // TODO: cycles to this point * 113 //***************************** 114 { 115 acc0 = (rsd0 = *rsa0++1); 116 // get sample 117 118 nop; // Those "nop"'s are really uggly, but there's 119 nop; // something with DSP's pipelines which I don't 120 nop; // understand, resulting this code to fail without 121 // having those "nop"'s (Benny) 122 123 rsa0?reqDMA = r2; 124 // Trigger DMA transfer on input stream, 125 // if needed to replenish input buffer 126 127 nop; 128 // Yet another magic "nop" to make stuff work 129 130 ,,r98 = acc0 $+>> 0; 131 // store sample in ALU 132 133 nop; 134 // latency on load register. 135 // (this one is understandable) 136 137 *rsa2++1 = r98; 138 // store sample in output buffer 139 140 nop; // The same story 141 nop; // as above again ... 142 nop; 143 } 144 // TODO: cycles per loop iteration 145 146 r2->strmBufPtr = rsa0,, ; 147 // Update the modified buffer pointers 148 149 r4 = rsa2; 150 // Load output pointer position into r4 151 152 r2 = r0->nextSCB; 153 // Sibling task 154 155 goto execSibling_2ind1 // takes 6 cycles 156 after { 157 r98 = r2->thisSPB:entryPoint; 158 // Load child routine entry and data address 159 160 r1 = r9; 161 // r9 is r2->thisSPB 162 163 r0->dma_outBufPtr = r4,, 164 // Store updated output buffer pointer 165 166 ind = r8; 167 // r8 is r2->entryPoint 168 } 169} 170